Re: [PATCH 11/31] clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC

[Kever Yang <kever.yang@rock-chips.com>]

On 2024/4/1 04:28, Jonas Karlman wrote:
> Sync rk3399-cru.h with one from linux v6.2+ and fix use of the
> SCLK_DDRCLK name that was only used by U-Boot.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk3399-u-boot.dtsi        |  2 +-
>   drivers/clk/rockchip/clk_rk3399.c      |  2 +-
>   include/dt-bindings/clock/rk3399-cru.h | 30 ++++++++++++++------------
>   3 files changed, 18 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
> index 69e6b808a69b..adb64d17e040 100644
> --- a/arch/arm/dts/rk3399-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
> @@ -44,7 +44,7 @@
>   		compatible = "rockchip,rk3399-dmc";
>   		devfreq-events = <&dfi>;
>   		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
> -		clocks = <&cru SCLK_DDRCLK>;
> +		clocks = <&cru SCLK_DDRC>;
>   		clock-names = "dmc_clk";
>   		reg = <0x0 0xffa80000 0x0 0x0800
>   		       0x0 0xffa80800 0x0 0x1800
> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
> index 80f65a237e8e..f0ce54067f8c 100644
> --- a/drivers/clk/rockchip/clk_rk3399.c
> +++ b/drivers/clk/rockchip/clk_rk3399.c
> @@ -1049,7 +1049,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
>   		 * return 0 to satisfy clk_set_defaults during device probe.
>   		 */
>   		return 0;
> -	case SCLK_DDRCLK:
> +	case SCLK_DDRC:
>   		ret = rk3399_ddr_set_clk(priv->cru, rate);
>   		break;
>   	case PCLK_EFUSE1024NS:
> diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
> index 211faf8fa891..39169d94a44e 100644
> --- a/include/dt-bindings/clock/rk3399-cru.h
> +++ b/include/dt-bindings/clock/rk3399-cru.h
> @@ -1,6 +1,7 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>   /*
>    * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
> + * Author: Xing Zheng <zhengxing@rock-chips.com>
>    */
>   
>   #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
> @@ -121,16 +122,17 @@
>   #define SCLK_DPHY_RX0_CFG		165
>   #define SCLK_RMII_SRC			166
>   #define SCLK_PCIEPHY_REF100M		167
> -#define SCLK_USBPHY0_480M_SRC		168
> -#define SCLK_USBPHY1_480M_SRC		169
> -#define SCLK_DDRCLK			170
> -#define SCLK_TESTOUT2			171
> +#define SCLK_DDRC			168
> +#define SCLK_TESTCLKOUT1		169
> +#define SCLK_TESTCLKOUT2		170
>   
>   #define DCLK_VOP0			180
>   #define DCLK_VOP1			181
>   #define DCLK_VOP0_DIV			182
>   #define DCLK_VOP1_DIV			183
>   #define DCLK_M0_PERILP			184
> +#define DCLK_VOP0_FRAC			185
> +#define DCLK_VOP1_FRAC			186
>   
>   #define FCLK_CM0S			190
>   
> @@ -545,8 +547,8 @@
>   #define SRST_H_PERILP0			171
>   #define SRST_H_PERILP0_NOC		172
>   #define SRST_ROM			173
> -#define SRST_CRYPTO_S			174
> -#define SRST_CRYPTO_M			175
> +#define SRST_CRYPTO0_S			174
> +#define SRST_CRYPTO0_M			175
>   
>   /* cru_softrst_con11 */
>   #define SRST_P_DCF			176
> @@ -554,7 +556,7 @@
>   #define SRST_CM0S			178
>   #define SRST_CM0S_DBG			179
>   #define SRST_CM0S_PO			180
> -#define SRST_CRYPTO			181
> +#define SRST_CRYPTO0			181
>   #define SRST_P_PERILP1_SGRF		182
>   #define SRST_P_PERILP1_GRF		183
>   #define SRST_CRYPTO1_S			184
> @@ -592,13 +594,13 @@
>   #define SRST_P_SPI0			214
>   #define SRST_P_SPI1			215
>   #define SRST_P_SPI2			216
> -#define SRST_P_SPI4			217
> -#define SRST_P_SPI5			218
> +#define SRST_P_SPI3			217
> +#define SRST_P_SPI4			218
>   #define SRST_SPI0			219
>   #define SRST_SPI1			220
>   #define SRST_SPI2			221
> -#define SRST_SPI4			222
> -#define SRST_SPI5			223
> +#define SRST_SPI3			222
> +#define SRST_SPI4			223
>   
>   /* cru_softrst_con14 */
>   #define SRST_I2S0_8CH			224
> @@ -720,8 +722,8 @@
>   #define SRST_H_CM0S_NOC			3
>   #define SRST_DBG_CM0S			4
>   #define SRST_PO_CM0S			5
> -#define SRST_P_SPI3			6
> -#define SRST_SPI3			7
> +#define SRST_P_SPI6			6
> +#define SRST_SPI6			7
>   #define SRST_P_TIMER_0_1		8
>   #define SRST_P_TIMER_0			9
>   #define SRST_P_TIMER_1			10