From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A81F3C07E8A for ; Wed, 26 Jul 2023 16:28:07 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D873686905; Wed, 26 Jul 2023 18:28:05 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7F88D868F5; Wed, 26 Jul 2023 18:28:04 +0200 (CEST) Received: from mail-m11886.qiye.163.com (mail-m11886.qiye.163.com [115.236.118.86]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 235B6868C1 for ; Wed, 26 Jul 2023 18:27:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=kever.yang@rock-chips.com Received: from [172.16.12.93] (unknown [58.22.7.114]) by mail-m11886.qiye.163.com (Hmail) with ESMTPA id 753A180248; Wed, 26 Jul 2023 19:01:52 +0800 (CST) Message-ID: Date: Wed, 26 Jul 2023 19:01:52 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v2 6/7] clk: rockchip: rk3328: Handle usb480m phy clock Content-Language: en-US To: Jagan Teki , Simon Glass , Philipp Tomsich Cc: Jonas Karlman , u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Lukasz Majewski , Sean Anderson References: <20230606170918.45581-1-jagan@amarulasolutions.com> <20230606170918.45581-7-jagan@amarulasolutions.com> From: Kever Yang In-Reply-To: <20230606170918.45581-7-jagan@amarulasolutions.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGh0fS1ZITx0dHUMZSEwaGh9VEwETFh oSFyQUDg9ZV1kYEgtZQVlOQ1VJSVVMVUpKT1lXWRYaDxIVHRRZQVlPS0hVSk5MSUpJVUpLS1VKQl kG X-HM-Tid: 0a8991dcc9172ebakusn753a180248 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NzI6Qww*AT1JVkNJKB9IEzwX L09PCwNVSlVKTUJLSE1CSEpIT0xDVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFJQk5INwY+ X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 2023/6/7 01:09, Jagan Teki wrote: > Handle USB480M clock ID in set_rate() and set_parent() > to allow the dt assigned-clocks and assigned-clock-parents > work on rk3328.dtsi > > Cc: Lukasz Majewski > Cc: Sean Anderson > Signed-off-by: Jagan Teki Reviewed-by: Kever Yang Thanks, - Kever > --- > Changes for v2: > - add USB480M to set_parent > > drivers/clk/rockchip/clk_rk3328.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c > index 969b7a8581..ef97381f0e 100644 > --- a/drivers/clk/rockchip/clk_rk3328.c > +++ b/drivers/clk/rockchip/clk_rk3328.c > @@ -681,6 +681,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate) > case ACLK_GMAC: > case PCLK_GMAC: > case SCLK_USB3OTG_SUSPEND: > + case USB480M: > return 0; > default: > return -ENOENT; > @@ -771,6 +772,7 @@ static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent) > case SCLK_MAC2IO_EXT: > return rk3328_gmac2io_ext_set_parent(clk, parent); > case DCLK_LCDC: > + case USB480M: > case SCLK_PDM: > case SCLK_RTC32K: > case SCLK_UART0: