[PATCH 6/8] arm: dts: imx8m: shrink ddr firmware size to actual file size

Peng Fan (OSS)
2022-06-03T06:36:17Z

From: Peng Fan <peng.fan@nxp.com>

After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm/dts/imx8mm-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 4 ++--
arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mn-evk-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mn-venice-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mp-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mq-cm-u-boot.dtsi | 8 ++++----
arch/arm/dts/imx8mq-u-boot.dtsi | 8 ++++----
10 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 86f8e1a284b..8c48678625d 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -41,25 +41,25 @@

ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index d28bb2b2ffe..5f839524028 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -149,26 +149,26 @@

ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};
};

diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
index dc4cec250ef..c4ae7ca4f31 100644
--- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
@@ -113,13 +113,13 @@

ddr-1d-imem-fw {
filename = "ddr3_imem_1d.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-1d-dmem-fw {
filename = "ddr3_dmem_1d.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 30ef8bc47d9..78773c198e4 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -157,26 +157,26 @@

ddr-1d-imem-fw {
filename = "ddr4_imem_1d_201810.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-1d-dmem-fw {
filename = "ddr4_dmem_1d_201810.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-imem-fw {
filename = "ddr4_imem_2d_201810.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-dmem-fw {
filename = "ddr4_dmem_2d_201810.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};
};

diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index f366117f210..c4789488a44 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -38,26 +38,26 @@

ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};
};

diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
index b8df6f749b0..ed1ab10ded3 100644
--- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
@@ -132,25 +132,25 @@

ddr-1d-imem-fw {
filename = "ddr4_imem_1d.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-1d-dmem-fw {
filename = "ddr4_dmem_1d.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-imem-fw {
filename = "ddr4_imem_2d.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-dmem-fw {
filename = "ddr4_dmem_2d.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index bcf2abd0676..9fb38714523 100644
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -128,25 +128,25 @@

ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index dc57ee20411..adb24cccc3b 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -63,26 +63,26 @@

ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem_202006.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem_202006.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};
};

diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
index bc7e9756c23..cb4e36c387d 100644
--- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
@@ -30,26 +30,26 @@

ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
type = "blob-ext";
+ align-end = <4>;
};

ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
type = "blob-ext";
+ align-end = <4>;
};
};

diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 462c470091a..e8b5f83706e 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -48,25 +48,25 @@

ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};

ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};
};
--
2.36.0