[GIT PULL] u-boot-riscv/master

[GIT PULL] u-boot-riscv/master

[Leo Liang]

Hi Tom,

The following changes since commit 10f48365112b164bee6564033ab682747efcb483:

  Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-riscv.git 

for you to fetch changes up to 5ac699efe94f24df561d33e420d3c73f5fb797e8:

  board: starfive: visionfive2: Order board detection logic to match config (2025-04-25 17:04:09 +0800)

CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/25940
----------------------------------------------------------------
- riscv: lib: Simplify FDT retrieving process
- board: k1: pinctrl: Add pinctrl support for bananapi-f3
- binman: riscv: Fix binman_sym functionality
- board: starfive: visionfive2: Reorder board detection logic
- board: starfive: Add DeepComputing FML13V01 support
----------------------------------------------------------------
E Shattow (2):
      doc: board: starfive: visionfive2: add missing format command to Flashing
      board: starfive: visionfive2: Order board detection logic to match config

Heinrich Schuchardt (9):
      configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
      configs: add jh7110-deepcomputing-fml13v01 to VF2 defconfig
      riscv: dts: jh7110: add DeepComputing FML13V01 device-tree
      board: starfive: DeepComputing FML13V01 fdt selection
      board: starfive: spl: support DeepComputing FML13V01
      doc: add DeepComputing FML13V01 documentation
      doc: starfive: use consistent formatting
      doc: starfive: use jh7110_common.rst
      doc: jh7110: describe debug UART

Huan Zhou (2):
      riscv: dts: k1: add pinctrl property in dts.
      config: Enable pinctrl in bananapi-f3

Minda Chen (1):
      MAINTAINERS: visionfive2: Add match N: starfive pattern

Yao Zi (7):
      riscv: lib: Add a default implementation of board_fdt_blob_setup
      board: qemu: riscv: Remove duplicated board_fdt_blob_setup
      board: starfive: Remove duplicated board_fdt_blob_setup
      board: sifive: Remove dead board_fdt_blob_setup
      riscv: dts: binman.dtsi: Switch to u-boot-nodtb entry for proper U-Boot
      riscv: dts: starfive: Prevent binman from relocating symbols in SPL
      riscv: Provide __image_copy_{start_end} symbols in linkerscript

 arch/riscv/cpu/u-boot-spl.lds                      |   2 +
 arch/riscv/cpu/u-boot.lds                          |   3 +
 arch/riscv/dts/binman.dtsi                         |   2 +-
 .../dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi  |   7 ++
 arch/riscv/dts/k1-bananapi-f3.dts                  |   3 +
 arch/riscv/dts/k1-pinctrl.dtsi                     |  19 ++++
 arch/riscv/dts/k1.dtsi                             |   8 +-
 arch/riscv/dts/starfive-visionfive2-binman.dtsi    |   1 +
 arch/riscv/lib/Makefile                            |   1 +
 arch/riscv/lib/board.c                             |  19 ++++
 board/emulation/qemu-riscv/qemu-riscv.c            |   8 --
 board/sifive/unleashed/unleashed.c                 |  11 ---
 board/sifive/unmatched/unmatched.c                 |  10 --
 board/starfive/visionfive2/MAINTAINERS             |   2 +-
 board/starfive/visionfive2/spl.c                   |  43 +++++----
 board/starfive/visionfive2/starfive_visionfive2.c  |  16 +---
 configs/bananapi-f3_defconfig                      |   2 +
 configs/qemu-riscv32_defconfig                     |   1 -
 configs/qemu-riscv32_smode_defconfig               |   1 -
 configs/qemu-riscv32_spl_defconfig                 |   1 -
 configs/qemu-riscv64_defconfig                     |   1 -
 configs/qemu-riscv64_smode_defconfig               |   1 -
 configs/qemu-riscv64_spl_defconfig                 |   1 -
 configs/starfive_visionfive2_defconfig             |   2 +-
 doc/board/starfive/deepcomputing_fml13v01.rst      |  80 ++++++++++++++++
 doc/board/starfive/index.rst                       |   1 +
 doc/board/starfive/jh7110_common.rst               | 103 +++++++++++++++++++++
 doc/board/starfive/milk-v_mars.rst                 |  18 +---
 doc/board/starfive/pine64_star64.rst               |  26 +-----
 doc/board/starfive/visionfive2.rst                 |  48 ++--------
 30 files changed, 292 insertions(+), 149 deletions(-)
 create mode 100644 arch/riscv/dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi
 create mode 100644 arch/riscv/dts/k1-pinctrl.dtsi
 create mode 100644 arch/riscv/lib/board.c
 create mode 100644 doc/board/starfive/deepcomputing_fml13v01.rst
 create mode 100644 doc/board/starfive/jh7110_common.rst


Best regards,
Leo

Re: [GIT PULL] u-boot-riscv/master

[Yao Zi]

Hi Leo,

On Fri, Apr 25, 2025 at 06:07:54PM +0800, Leo Liang wrote:
> Hi Tom,
> 
> The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
> 
>   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git 
> 
> for you to fetch changes up to 5ac699efe94f24df561d33e420d3c73f5fb797e8:
> 
>   board: starfive: visionfive2: Order board detection logic to match config (2025-04-25 17:04:09 +0800)
> 
> CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/25940
> ----------------------------------------------------------------
> - riscv: lib: Simplify FDT retrieving process
> - board: k1: pinctrl: Add pinctrl support for bananapi-f3
> - binman: riscv: Fix binman_sym functionality
> - board: starfive: visionfive2: Reorder board detection logic
> - board: starfive: Add DeepComputing FML13V01 support
> ----------------------------------------------------------------
> E Shattow (2):
>       doc: board: starfive: visionfive2: add missing format command to Flashing
>       board: starfive: visionfive2: Order board detection logic to match config
> 
> Heinrich Schuchardt (9):
>       configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
>       configs: add jh7110-deepcomputing-fml13v01 to VF2 defconfig
>       riscv: dts: jh7110: add DeepComputing FML13V01 device-tree
>       board: starfive: DeepComputing FML13V01 fdt selection
>       board: starfive: spl: support DeepComputing FML13V01
>       doc: add DeepComputing FML13V01 documentation
>       doc: starfive: use consistent formatting
>       doc: starfive: use jh7110_common.rst
>       doc: jh7110: describe debug UART
> 
> Huan Zhou (2):
>       riscv: dts: k1: add pinctrl property in dts.
>       config: Enable pinctrl in bananapi-f3
> 
> Minda Chen (1):
>       MAINTAINERS: visionfive2: Add match N: starfive pattern
> 
> Yao Zi (7):
>       riscv: lib: Add a default implementation of board_fdt_blob_setup
>       board: qemu: riscv: Remove duplicated board_fdt_blob_setup
>       board: starfive: Remove duplicated board_fdt_blob_setup
>       board: sifive: Remove dead board_fdt_blob_setup
>       riscv: dts: binman.dtsi: Switch to u-boot-nodtb entry for proper U-Boot

There's still an unresolved comment for this patch[1], which doesn't
affect the functionality but makes the code cleaner. Should I send
v3 of the series? Or alternatvely I could clean the filename property
up with a separate patch, which may reduce your work. I'm fine with both
ways.

Best regards,
Yao Zi

[1]: https://lore.kernel.org/all/CAFLszTjiRKMLny_RcRB4sUV75c8_QLFkw4u_x6qfs3k1q=KsDg@mail.gmail.com/

>       riscv: dts: starfive: Prevent binman from relocating symbols in SPL
>       riscv: Provide __image_copy_{start_end} symbols in linkerscript
> 
>  arch/riscv/cpu/u-boot-spl.lds                      |   2 +
>  arch/riscv/cpu/u-boot.lds                          |   3 +
>  arch/riscv/dts/binman.dtsi                         |   2 +-
>  .../dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi  |   7 ++
>  arch/riscv/dts/k1-bananapi-f3.dts                  |   3 +
>  arch/riscv/dts/k1-pinctrl.dtsi                     |  19 ++++
>  arch/riscv/dts/k1.dtsi                             |   8 +-
>  arch/riscv/dts/starfive-visionfive2-binman.dtsi    |   1 +
>  arch/riscv/lib/Makefile                            |   1 +
>  arch/riscv/lib/board.c                             |  19 ++++
>  board/emulation/qemu-riscv/qemu-riscv.c            |   8 --
>  board/sifive/unleashed/unleashed.c                 |  11 ---
>  board/sifive/unmatched/unmatched.c                 |  10 --
>  board/starfive/visionfive2/MAINTAINERS             |   2 +-
>  board/starfive/visionfive2/spl.c                   |  43 +++++----
>  board/starfive/visionfive2/starfive_visionfive2.c  |  16 +---
>  configs/bananapi-f3_defconfig                      |   2 +
>  configs/qemu-riscv32_defconfig                     |   1 -
>  configs/qemu-riscv32_smode_defconfig               |   1 -
>  configs/qemu-riscv32_spl_defconfig                 |   1 -
>  configs/qemu-riscv64_defconfig                     |   1 -
>  configs/qemu-riscv64_smode_defconfig               |   1 -
>  configs/qemu-riscv64_spl_defconfig                 |   1 -
>  configs/starfive_visionfive2_defconfig             |   2 +-
>  doc/board/starfive/deepcomputing_fml13v01.rst      |  80 ++++++++++++++++
>  doc/board/starfive/index.rst                       |   1 +
>  doc/board/starfive/jh7110_common.rst               | 103 +++++++++++++++++++++
>  doc/board/starfive/milk-v_mars.rst                 |  18 +---
>  doc/board/starfive/pine64_star64.rst               |  26 +-----
>  doc/board/starfive/visionfive2.rst                 |  48 ++--------
>  30 files changed, 292 insertions(+), 149 deletions(-)
>  create mode 100644 arch/riscv/dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi
>  create mode 100644 arch/riscv/dts/k1-pinctrl.dtsi
>  create mode 100644 arch/riscv/lib/board.c
>  create mode 100644 doc/board/starfive/deepcomputing_fml13v01.rst
>  create mode 100644 doc/board/starfive/jh7110_common.rst
> 
> 
> Best regards,
> Leo

Re: [GIT PULL] u-boot-riscv/master

[E Shattow]

Hi Leo,

On 4/25/25 03:07, Leo Liang wrote:
> Hi Tom,
> 
> The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
> 
>   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git 
> 
> for you to fetch changes up to 5ac699efe94f24df561d33e420d3c73f5fb797e8:
> 
>   board: starfive: visionfive2: Order board detection logic to match config (2025-04-25 17:04:09 +0800)
> 
> CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/25940
> ----------------------------------------------------------------
> - riscv: lib: Simplify FDT retrieving process
> - board: k1: pinctrl: Add pinctrl support for bananapi-f3
> - binman: riscv: Fix binman_sym functionality
> - board: starfive: visionfive2: Reorder board detection logic
> - board: starfive: Add DeepComputing FML13V01 support
> ----------------------------------------------------------------
> E Shattow (2):
>       doc: board: starfive: visionfive2: add missing format command to Flashing
>       board: starfive: visionfive2: Order board detection logic to match config
> 
> Heinrich Schuchardt (9):
>       configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
>       configs: add jh7110-deepcomputing-fml13v01 to VF2 defconfig
>       riscv: dts: jh7110: add DeepComputing FML13V01 device-tree
>       board: starfive: DeepComputing FML13V01 fdt selection
>       board: starfive: spl: support DeepComputing FML13V01
>       doc: add DeepComputing FML13V01 documentation
>       doc: starfive: use consistent formatting
>       doc: starfive: use jh7110_common.rst
>       doc: jh7110: describe debug UART
> 
> Huan Zhou (2):
>       riscv: dts: k1: add pinctrl property in dts.
>       config: Enable pinctrl in bananapi-f3
> 
> Minda Chen (1):
>       MAINTAINERS: visionfive2: Add match N: starfive pattern
> 
> Yao Zi (7):
>       riscv: lib: Add a default implementation of board_fdt_blob_setup
>       board: qemu: riscv: Remove duplicated board_fdt_blob_setup
>       board: starfive: Remove duplicated board_fdt_blob_setup
>       board: sifive: Remove dead board_fdt_blob_setup
>       riscv: dts: binman.dtsi: Switch to u-boot-nodtb entry for proper U-Boot
>       riscv: dts: starfive: Prevent binman from relocating symbols in SPL
>       riscv: Provide __image_copy_{start_end} symbols in linkerscript
> 
>  arch/riscv/cpu/u-boot-spl.lds                      |   2 +
>  arch/riscv/cpu/u-boot.lds                          |   3 +
>  arch/riscv/dts/binman.dtsi                         |   2 +-
>  .../dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi  |   7 ++
>  arch/riscv/dts/k1-bananapi-f3.dts                  |   3 +
>  arch/riscv/dts/k1-pinctrl.dtsi                     |  19 ++++
>  arch/riscv/dts/k1.dtsi                             |   8 +-
>  arch/riscv/dts/starfive-visionfive2-binman.dtsi    |   1 +
>  arch/riscv/lib/Makefile                            |   1 +
>  arch/riscv/lib/board.c                             |  19 ++++
>  board/emulation/qemu-riscv/qemu-riscv.c            |   8 --
>  board/sifive/unleashed/unleashed.c                 |  11 ---
>  board/sifive/unmatched/unmatched.c                 |  10 --
>  board/starfive/visionfive2/MAINTAINERS             |   2 +-
>  board/starfive/visionfive2/spl.c                   |  43 +++++----
>  board/starfive/visionfive2/starfive_visionfive2.c  |  16 +---
>  configs/bananapi-f3_defconfig                      |   2 +
>  configs/qemu-riscv32_defconfig                     |   1 -
>  configs/qemu-riscv32_smode_defconfig               |   1 -
>  configs/qemu-riscv32_spl_defconfig                 |   1 -
>  configs/qemu-riscv64_defconfig                     |   1 -
>  configs/qemu-riscv64_smode_defconfig               |   1 -
>  configs/qemu-riscv64_spl_defconfig                 |   1 -
>  configs/starfive_visionfive2_defconfig             |   2 +-
>  doc/board/starfive/deepcomputing_fml13v01.rst      |  80 ++++++++++++++++
>  doc/board/starfive/index.rst                       |   1 +
>  doc/board/starfive/jh7110_common.rst               | 103 +++++++++++++++++++++
>  doc/board/starfive/milk-v_mars.rst                 |  18 +---
>  doc/board/starfive/pine64_star64.rst               |  26 +-----
>  doc/board/starfive/visionfive2.rst                 |  48 ++--------
>  30 files changed, 292 insertions(+), 149 deletions(-)
>  create mode 100644 arch/riscv/dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi
>  create mode 100644 arch/riscv/dts/k1-pinctrl.dtsi
>  create mode 100644 arch/riscv/lib/board.c
>  create mode 100644 doc/board/starfive/deepcomputing_fml13v01.rst
>  create mode 100644 doc/board/starfive/jh7110_common.rst
> 
> 
> Best regards,
> Leo

Looks to me like merging "Order board detection logic to match config"
series preserves the string pointer math that I deleted with the series.
The intent of the series is for the logic to match the literals in
configs/starfive_visionfive2_defconfig:CONFIG_OF_LIST and not be
obfuscated by this string pointer math. Searching (grep ...) entries
from the list should lead to the code, which is hidden if we have that
bit that strips the prefix. Sorry if that adds a few bytes of
"starfive/" for each target added to SPL code size but the merge as-is
does not reflect all of what I wanted, FYI

Thanks,

-E

Re: [GIT PULL] u-boot-riscv/master

[E Shattow]

Oops! actually, was merge conflict, I see...

On 4/25/25 05:57, E Shattow wrote:
> Hi Leo,
> 
> On 4/25/25 03:07, Leo Liang wrote:
>> Hi Tom,
>>
>> The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
>>
>>   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
>>
>> are available in the Git repository at:
>>
>>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git 
>>
>> for you to fetch changes up to 5ac699efe94f24df561d33e420d3c73f5fb797e8:
>>
>>   board: starfive: visionfive2: Order board detection logic to match config (2025-04-25 17:04:09 +0800)
>>
>> CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/25940
>> ----------------------------------------------------------------
>> - riscv: lib: Simplify FDT retrieving process
>> - board: k1: pinctrl: Add pinctrl support for bananapi-f3
>> - binman: riscv: Fix binman_sym functionality
>> - board: starfive: visionfive2: Reorder board detection logic
>> - board: starfive: Add DeepComputing FML13V01 support
>> ----------------------------------------------------------------
>> E Shattow (2):
>>       doc: board: starfive: visionfive2: add missing format command to Flashing
>>       board: starfive: visionfive2: Order board detection logic to match config
>>
>> Heinrich Schuchardt (9):
>>       configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
>>       configs: add jh7110-deepcomputing-fml13v01 to VF2 defconfig
>>       riscv: dts: jh7110: add DeepComputing FML13V01 device-tree
>>       board: starfive: DeepComputing FML13V01 fdt selection
>>       board: starfive: spl: support DeepComputing FML13V01
>>       doc: add DeepComputing FML13V01 documentation
>>       doc: starfive: use consistent formatting
>>       doc: starfive: use jh7110_common.rst
>>       doc: jh7110: describe debug UART
>>
>> Huan Zhou (2):
>>       riscv: dts: k1: add pinctrl property in dts.
>>       config: Enable pinctrl in bananapi-f3
>>
>> Minda Chen (1):
>>       MAINTAINERS: visionfive2: Add match N: starfive pattern
>>
>> Yao Zi (7):
>>       riscv: lib: Add a default implementation of board_fdt_blob_setup
>>       board: qemu: riscv: Remove duplicated board_fdt_blob_setup
>>       board: starfive: Remove duplicated board_fdt_blob_setup
>>       board: sifive: Remove dead board_fdt_blob_setup
>>       riscv: dts: binman.dtsi: Switch to u-boot-nodtb entry for proper U-Boot
>>       riscv: dts: starfive: Prevent binman from relocating symbols in SPL
>>       riscv: Provide __image_copy_{start_end} symbols in linkerscript
>>
>>  arch/riscv/cpu/u-boot-spl.lds                      |   2 +
>>  arch/riscv/cpu/u-boot.lds                          |   3 +
>>  arch/riscv/dts/binman.dtsi                         |   2 +-
>>  .../dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi  |   7 ++
>>  arch/riscv/dts/k1-bananapi-f3.dts                  |   3 +
>>  arch/riscv/dts/k1-pinctrl.dtsi                     |  19 ++++
>>  arch/riscv/dts/k1.dtsi                             |   8 +-
>>  arch/riscv/dts/starfive-visionfive2-binman.dtsi    |   1 +
>>  arch/riscv/lib/Makefile                            |   1 +
>>  arch/riscv/lib/board.c                             |  19 ++++
>>  board/emulation/qemu-riscv/qemu-riscv.c            |   8 --
>>  board/sifive/unleashed/unleashed.c                 |  11 ---
>>  board/sifive/unmatched/unmatched.c                 |  10 --
>>  board/starfive/visionfive2/MAINTAINERS             |   2 +-
>>  board/starfive/visionfive2/spl.c                   |  43 +++++----
>>  board/starfive/visionfive2/starfive_visionfive2.c  |  16 +---
>>  configs/bananapi-f3_defconfig                      |   2 +
>>  configs/qemu-riscv32_defconfig                     |   1 -
>>  configs/qemu-riscv32_smode_defconfig               |   1 -
>>  configs/qemu-riscv32_spl_defconfig                 |   1 -
>>  configs/qemu-riscv64_defconfig                     |   1 -
>>  configs/qemu-riscv64_smode_defconfig               |   1 -
>>  configs/qemu-riscv64_spl_defconfig                 |   1 -
>>  configs/starfive_visionfive2_defconfig             |   2 +-
>>  doc/board/starfive/deepcomputing_fml13v01.rst      |  80 ++++++++++++++++
>>  doc/board/starfive/index.rst                       |   1 +
>>  doc/board/starfive/jh7110_common.rst               | 103 +++++++++++++++++++++
>>  doc/board/starfive/milk-v_mars.rst                 |  18 +---
>>  doc/board/starfive/pine64_star64.rst               |  26 +-----
>>  doc/board/starfive/visionfive2.rst                 |  48 ++--------
>>  30 files changed, 292 insertions(+), 149 deletions(-)
>>  create mode 100644 arch/riscv/dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi
>>  create mode 100644 arch/riscv/dts/k1-pinctrl.dtsi
>>  create mode 100644 arch/riscv/lib/board.c
>>  create mode 100644 doc/board/starfive/deepcomputing_fml13v01.rst
>>  create mode 100644 doc/board/starfive/jh7110_common.rst
>>
>>
>> Best regards,
>> Leo
> 
> Looks to me like merging "Order board detection logic to match config"
> series preserves the string pointer math that I deleted with the series.
> The intent of the series is for the logic to match the literals in
> configs/starfive_visionfive2_defconfig:CONFIG_OF_LIST and not be
> obfuscated by this string pointer math. Searching (grep ...) entries
> from the list should lead to the code, which is hidden if we have that
> bit that strips the prefix. Sorry if that adds a few bytes of
> "starfive/" for each target added to SPL code size but the merge as-is
> does not reflect all of what I wanted, FYI
> 
> Thanks,
> 
> -E

I can send another version ? -E

Re: [GIT PULL] u-boot-riscv/master

[Tom Rini]

On Fri, 25 Apr 2025 18:07:54 +0800, Leo Liang wrote:

> The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
> 
>   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git
> 
> [...]

Merged into u-boot/master, thanks!

-- 
Tom

Re: [GIT PULL] u-boot-riscv/master

[E Shattow]

The outcome of that merge went a bit weird for
board/starfive/visionfive2/spl.c

On 4/25/25 16:43, Tom Rini wrote:
> On Fri, 25 Apr 2025 18:07:54 +0800, Leo Liang wrote:
> 
>> The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
>>
>>   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
>>
>> are available in the Git repository at:
>>
>>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git
>>
>> [...]
> 
> Merged into u-boot/master, thanks!
> 

# The fix:

diff --git a/board/starfive/visionfive2/spl.c
b/board/starfive/visionfive2/spl.c
index 353313b9e88..5b9f2530470 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -116,44 +116,23 @@ void board_init_f(ulong dummy)
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 int board_fit_config_name_match(const char *name)
 {
-	const char *product_id;
-	u8 version;
-
-	product_id = get_product_id_from_eeprom();
-
-	/* Strip off prefix */
-	if (strncmp(name, "starfive/", 9))
-		return -EINVAL;
-	name += 9;
-	if (!strncmp(product_id, "FML13V01", 8) &&
-	    !strcmp(name, "jh7110-deepcomputing-fml13v01")) {
-		return 0;
-	} else if (!strncmp(product_id, "VF7110", 6)) {
-		version = get_pcb_revision_from_eeprom();
-		if ((version == 'b' || version == 'B') &&
-		    !strcmp(name, "jh7110-starfive-visionfive-2-v1.3b"))
-			return 0;
-
-		if ((version == 'a' || version == 'A') &&
-		    !strcmp(name, "jh7110-starfive-visionfive-2-v1.2a"))
-			return 0;
-	} else if (!strncmp(product_id, "MARS", 4) &&
-		   !strcmp(name, "jh7110-milkv-mars")) {
+	if (!strcmp(name, "starfive/jh7110-deepcomputing-fml13v01") &&
+		    !strncmp(get_product_id_from_eeprom(), "FML13V01", 8)) {
 		return 0;
 	} else if (!strcmp(name, "starfive/jh7110-milkv-mars") &&
-		   !strncmp(get_product_id_from_eeprom(), "MARS", 4)) {
+		    !strncmp(get_product_id_from_eeprom(), "MARS", 4)) {
 		return 0;
-	} else if ((!strcmp(name, "starfive/jh7110-pine64-star64")) &&
+	} else if (!strcmp(name, "starfive/jh7110-pine64-star64") &&
 		    !strncmp(get_product_id_from_eeprom(), "STAR64", 6)) {
 		return 0;
-	} else if ((!strcmp(name,
"starfive/jh7110-starfive-visionfive-2-v1.2a")) &&
+	} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.2a") &&
 		    !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) {
 		switch (get_pcb_revision_from_eeprom()) {
 		case 'a':
 		case 'A':
 			return 0;
 		}
-	} else if ((!strcmp(name,
"starfive/jh7110-starfive-visionfive-2-v1.2b")) &&
+	} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.2b") &&
 		    !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) {
 		switch (get_pcb_revision_from_eeprom()) {
 		case 'b':


# So when applied that function should end up like this:

#if CONFIG_IS_ENABLED(LOAD_FIT)
int board_fit_config_name_match(const char *name)
{
	if (!strcmp(name, "starfive/jh7110-deepcomputing-fml13v01") &&
		    !strncmp(get_product_id_from_eeprom(), "FML13V01", 8)) {
		return 0;
	} else if (!strcmp(name, "starfive/jh7110-milkv-mars") &&
		    !strncmp(get_product_id_from_eeprom(), "MARS", 4)) {
		return 0;
	} else if (!strcmp(name, "starfive/jh7110-pine64-star64") &&
		    !strncmp(get_product_id_from_eeprom(), "STAR64", 6)) {
		return 0;
	} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.2a") &&
		    !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) {
		switch (get_pcb_revision_from_eeprom()) {
		case 'a':
		case 'A':
			return 0;
		}
	} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-v1.2b") &&
		    !strncmp(get_product_id_from_eeprom(), "VF7110", 6)) {
		switch (get_pcb_revision_from_eeprom()) {
		case 'b':
		case 'B':
			return 0;
		}
	}

	return -EINVAL;
}
#endif

Re: [GIT PULL] u-boot-riscv/master

[Tom Rini]

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On Fri, Apr 25, 2025 at 10:35:30AM +0000, Yao Zi wrote:
> Hi Leo,
> 
> On Fri, Apr 25, 2025 at 06:07:54PM +0800, Leo Liang wrote:
> > Hi Tom,
> > 
> > The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
> > 
> >   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
> > 
> > are available in the Git repository at:
> > 
> >   https://source.denx.de/u-boot/custodians/u-boot-riscv.git 
> > 
> > for you to fetch changes up to 5ac699efe94f24df561d33e420d3c73f5fb797e8:
> > 
> >   board: starfive: visionfive2: Order board detection logic to match config (2025-04-25 17:04:09 +0800)
> > 
> > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/25940
> > ----------------------------------------------------------------
> > - riscv: lib: Simplify FDT retrieving process
> > - board: k1: pinctrl: Add pinctrl support for bananapi-f3
> > - binman: riscv: Fix binman_sym functionality
> > - board: starfive: visionfive2: Reorder board detection logic
> > - board: starfive: Add DeepComputing FML13V01 support
> > ----------------------------------------------------------------
> > E Shattow (2):
> >       doc: board: starfive: visionfive2: add missing format command to Flashing
> >       board: starfive: visionfive2: Order board detection logic to match config
> > 
> > Heinrich Schuchardt (9):
> >       configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
> >       configs: add jh7110-deepcomputing-fml13v01 to VF2 defconfig
> >       riscv: dts: jh7110: add DeepComputing FML13V01 device-tree
> >       board: starfive: DeepComputing FML13V01 fdt selection
> >       board: starfive: spl: support DeepComputing FML13V01
> >       doc: add DeepComputing FML13V01 documentation
> >       doc: starfive: use consistent formatting
> >       doc: starfive: use jh7110_common.rst
> >       doc: jh7110: describe debug UART
> > 
> > Huan Zhou (2):
> >       riscv: dts: k1: add pinctrl property in dts.
> >       config: Enable pinctrl in bananapi-f3
> > 
> > Minda Chen (1):
> >       MAINTAINERS: visionfive2: Add match N: starfive pattern
> > 
> > Yao Zi (7):
> >       riscv: lib: Add a default implementation of board_fdt_blob_setup
> >       board: qemu: riscv: Remove duplicated board_fdt_blob_setup
> >       board: starfive: Remove duplicated board_fdt_blob_setup
> >       board: sifive: Remove dead board_fdt_blob_setup
> >       riscv: dts: binman.dtsi: Switch to u-boot-nodtb entry for proper U-Boot
> 
> There's still an unresolved comment for this patch[1], which doesn't
> affect the functionality but makes the code cleaner. Should I send
> v3 of the series? Or alternatvely I could clean the filename property
> up with a separate patch, which may reduce your work. I'm fine with both
> ways.

Please follow-up with a cleanup, thanks.

-- 
Tom

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Re: [GIT PULL] u-boot-riscv/master

[Tom Rini]

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On Fri, Apr 25, 2025 at 06:13:38PM -0700, E Shattow wrote:
> The outcome of that merge went a bit weird for
> board/starfive/visionfive2/spl.c
> 
> On 4/25/25 16:43, Tom Rini wrote:
> > On Fri, 25 Apr 2025 18:07:54 +0800, Leo Liang wrote:
> > 
> >> The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
> >>
> >>   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
> >>
> >> are available in the Git repository at:
> >>
> >>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git
> >>
> >> [...]
> > 
> > Merged into u-boot/master, thanks!
> > 
> 
> # The fix:

Sorry! Can you submit as a proper patch? I'll apply it quickly.  Thanks!

-- 
Tom

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[PATCH] riscv: dts: binman.dtsi: Drop filename property for proper U-Boot

[Yao Zi]

Drop filename property for proper U-Boot entry since binman takes
"u-boot-nodtb.bin" as the default filename for u-boot-nodtb entries.

This follows efe9c12322b ("riscv: dts: binman.dtsi: Switch to
u-boot-nodtb entry for proper U-Boot") to clean binman.dtsi up.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---

Here's the clean up patch, thank you Leo and Tom!

 arch/riscv/dts/binman.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index 5aeeeddb59f..b518560bb94 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -36,7 +36,6 @@
 					load = /bits/ 64 <CONFIG_TEXT_BASE>;
 
 					uboot_blob: u-boot-nodtb {
-						filename = "u-boot-nodtb.bin";
 					};
 				};
 #else
-- 
2.49.0

Re: [GIT PULL] u-boot-riscv/master

[E Shattow]

Hi, Tom!

On 4/26/25 07:14, Tom Rini wrote:
> On Fri, Apr 25, 2025 at 06:13:38PM -0700, E Shattow wrote:
>> The outcome of that merge went a bit weird for
>> board/starfive/visionfive2/spl.c
>>
>> On 4/25/25 16:43, Tom Rini wrote:
>>> On Fri, 25 Apr 2025 18:07:54 +0800, Leo Liang wrote:
>>>
>>>> The following changes since commit 10f48365112b164bee6564033ab682747efcb483:
>>>>
>>>>   Merge patch series "Add PCIe support for TI AM64 SoC" (2025-04-24 10:46:17 -0600)
>>>>
>>>> are available in the Git repository at:
>>>>
>>>>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git
>>>>
>>>> [...]
>>>
>>> Merged into u-boot/master, thanks!
>>>
>>
>> # The fix:
> 
> Sorry! Can you submit as a proper patch? I'll apply it quickly.  Thanks!
> 

Okay, sent [1] with expanded scope to also ordering duplicate of this
same EEPROM checking logic in adjacent code.

Tested on Pine64 Star64.

1: https://lore.kernel.org/u-boot/20250427060301.709506-1-e@freeshell.de

Thanks!

-E

Re: [PATCH] riscv: dts: binman.dtsi: Drop filename property for proper U-Boot

[Leo Liang]

On Sat, Apr 26, 2025 at 05:26:02PM +0000, Yao Zi wrote:
> Drop filename property for proper U-Boot entry since binman takes
> "u-boot-nodtb.bin" as the default filename for u-boot-nodtb entries.
> 
> This follows efe9c12322b ("riscv: dts: binman.dtsi: Switch to
> u-boot-nodtb entry for proper U-Boot") to clean binman.dtsi up.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
> 
> Here's the clean up patch, thank you Leo and Tom!
> 
>  arch/riscv/dts/binman.dtsi | 1 -
>  1 file changed, 1 deletion(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>