* [PATCH] riscv: dts: jh7110: override syscrg assigned clock rates with defaults
@ 2025-05-03 12:29 E Shattow
2025-05-03 21:34 ` E Shattow
2025-05-08 8:29 ` Leo Liang
0 siblings, 2 replies; 3+ messages in thread
From: E Shattow @ 2025-05-03 12:29 UTC (permalink / raw)
To: Rick Chen, Leo, Minda Chen, Hal Feng, Tom Rini; +Cc: E Shattow, u-boot
JH7110 drivers are missing support for CPU frequency scaling, so override
upstream device-tree to use default clock rates for syscrg. This override
duplicates a portion of jh7110-common-u-boot.dtsi file planned for removal.
Signed-off-by: E Shattow <e@freeshell.de>
---
arch/riscv/dts/jh7110-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/jh7110-u-boot.dtsi
index a9e318c4a31..13adbb6922c 100644
--- a/arch/riscv/dts/jh7110-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-u-boot.dtsi
@@ -108,6 +108,7 @@
&syscrg {
bootph-pre-ram;
+ assigned-clock-rates = <0>; /* cpufreq not implemented, use defaults */
};
&stgcrg {
base-commit: 6cc812f8cc55c132458c7da5b9fb7666315cbe8c
--
2.49.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] riscv: dts: jh7110: override syscrg assigned clock rates with defaults
2025-05-03 12:29 [PATCH] riscv: dts: jh7110: override syscrg assigned clock rates with defaults E Shattow
@ 2025-05-03 21:34 ` E Shattow
2025-05-08 8:29 ` Leo Liang
1 sibling, 0 replies; 3+ messages in thread
From: E Shattow @ 2025-05-03 21:34 UTC (permalink / raw)
To: Rick Chen, Leo, Minda Chen, Hal Feng, Tom Rini; +Cc: u-boot
On 5/3/25 05:29, E Shattow wrote:
> JH7110 drivers are missing support for CPU frequency scaling, so override
> upstream device-tree to use default clock rates for syscrg. This override
> duplicates a portion of jh7110-common-u-boot.dtsi file planned for removal.
>
> Signed-off-by: E Shattow <e@freeshell.de>
> ---
> arch/riscv/dts/jh7110-u-boot.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/jh7110-u-boot.dtsi
> index a9e318c4a31..13adbb6922c 100644
> --- a/arch/riscv/dts/jh7110-u-boot.dtsi
> +++ b/arch/riscv/dts/jh7110-u-boot.dtsi
> @@ -108,6 +108,7 @@
>
> &syscrg {
> bootph-pre-ram;
> + assigned-clock-rates = <0>; /* cpufreq not implemented, use defaults */
> };
>
> &stgcrg {
>
> base-commit: 6cc812f8cc55c132458c7da5b9fb7666315cbe8c
I missed the sort ordering on adding this, it should be ordered above
the bootph-pre-ram hint. Will fix with v2 after review and taking
comments. -E
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] riscv: dts: jh7110: override syscrg assigned clock rates with defaults
2025-05-03 12:29 [PATCH] riscv: dts: jh7110: override syscrg assigned clock rates with defaults E Shattow
2025-05-03 21:34 ` E Shattow
@ 2025-05-08 8:29 ` Leo Liang
1 sibling, 0 replies; 3+ messages in thread
From: Leo Liang @ 2025-05-08 8:29 UTC (permalink / raw)
To: E Shattow; +Cc: Rick Chen, Minda Chen, Hal Feng, Tom Rini, u-boot
On Sat, May 03, 2025 at 05:29:44AM -0700, E Shattow wrote:
> JH7110 drivers are missing support for CPU frequency scaling, so override
> upstream device-tree to use default clock rates for syscrg. This override
> duplicates a portion of jh7110-common-u-boot.dtsi file planned for removal.
>
> Signed-off-by: E Shattow <e@freeshell.de>
> ---
> arch/riscv/dts/jh7110-u-boot.dtsi | 1 +
> 1 file changed, 1 insertion(+)
Hi,
You can add my reviewed-by tag when sending v2 patch.
Thanks,
Leo
^ permalink raw reply [flat|nested] 3+ messages in thread
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