From: Leo Liang <ycliang@andestech.com>
To: Yao Zi <ziyao@disroot.org>
Cc: Rick Chen <rick@andestech.com>, Tom Rini <trini@konsulko.com>,
Wei Fu <wefu@redhat.com>, Yixun Lan <dlan@gentoo.org>,
Maksim Kiselev <bigunclemax@gmail.com>,
Jaehoon Chung <jh80.chung@samsung.com>,
Simon Glass <sjg@chromium.org>,
Heinrich Schuchardt <xypron.glpk@gmx.de>,
"Ilias Apalodimas" <ilias.apalodimas@linaro.org>,
Neha Malcom Francis <n-francis@ti.com>,
Jayesh Choudhary <j-choudhary@ti.com>,
Wadim Egorov <w.egorov@phytec.de>,
Vaishnav Achath <vaishnav.a@ti.com>, Andrew Davis <afd@ti.com>,
Chia-Wei Wang <chiawei_wang@aspeedtech.com>,
<u-boot@lists.denx.de>, Han Gao <rabenda.cn@gmail.com>,
Han Gao <gaohan@iscas.ac.cn>
Subject: Re: [PATCH v2 02/10] configs: th1520_lpi4a: Add UART clock frequency
Date: Wed, 21 May 2025 16:22:19 +0800 [thread overview]
Message-ID: <aC2NO2FnD2zApd97@swlinux02> (raw)
In-Reply-To: <20250513090503.46670-3-ziyao@disroot.org>
On Tue, May 13, 2025 at 09:04:55AM +0000, Yao Zi wrote:
> The BROM of TH1520 always initializes UART0's parent clock and
> configures the baudrate to 115200. Describe the clock frequency to make
> UART function correctly in SPL without introducing CCF.
>
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
> include/configs/th1520_lpi4a.h | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
next prev parent reply other threads:[~2025-05-21 8:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-13 9:04 [PATCH v2 00/10] Initial SPL support for T-Head TH1520 SoC Yao Zi
2025-05-13 9:04 ` [PATCH v2 01/10] riscv: lib: Split out support for T-Head cache management operations Yao Zi
2025-05-13 9:04 ` [PATCH v2 02/10] configs: th1520_lpi4a: Add UART clock frequency Yao Zi
2025-05-21 8:22 ` Leo Liang [this message]
2025-05-13 9:04 ` [PATCH v2 03/10] riscv: cpu: Add TH1520 CPU support Yao Zi
2025-05-13 9:04 ` [PATCH v2 04/10] ram: thead: Add initial DDR controller support for TH1520 Yao Zi
2025-05-13 9:04 ` [PATCH v2 05/10] riscv: dts: th1520: Preserve necessary devices for SPL Yao Zi
2025-05-13 9:04 ` [PATCH v2 06/10] riscv: dts: lichee-module-4a: Preserve memory node " Yao Zi
2025-05-13 9:05 ` [PATCH v2 07/10] riscv: dts: th1520: Add DRAM controller Yao Zi
2025-05-13 9:05 ` [PATCH v2 08/10] riscv: dts: th1520: Add binman configuration Yao Zi
2025-05-13 9:05 ` [PATCH v2 09/10] board: thead: licheepi4a: Enable SPL support Yao Zi
2025-05-13 9:05 ` [PATCH v2 10/10] doc: thead: lpi4a: Update documentation Yao Zi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aC2NO2FnD2zApd97@swlinux02 \
--to=ycliang@andestech.com \
--cc=afd@ti.com \
--cc=bigunclemax@gmail.com \
--cc=chiawei_wang@aspeedtech.com \
--cc=dlan@gentoo.org \
--cc=gaohan@iscas.ac.cn \
--cc=ilias.apalodimas@linaro.org \
--cc=j-choudhary@ti.com \
--cc=jh80.chung@samsung.com \
--cc=n-francis@ti.com \
--cc=rabenda.cn@gmail.com \
--cc=rick@andestech.com \
--cc=sjg@chromium.org \
--cc=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
--cc=vaishnav.a@ti.com \
--cc=w.egorov@phytec.de \
--cc=wefu@redhat.com \
--cc=xypron.glpk@gmx.de \
--cc=ziyao@disroot.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox