* [PATCH] riscv: starfive: jh7110: move uart0 clock frequency to config header
@ 2025-05-03 11:52 E Shattow
2025-05-12 18:14 ` Leo Liang
0 siblings, 1 reply; 2+ messages in thread
From: E Shattow @ 2025-05-03 11:52 UTC (permalink / raw)
To: Rick Chen, Leo, Minda Chen, Hal Feng, Tom Rini; +Cc: E Shattow, u-boot
Move unnecessary clock frequency assignment out of device-tree and into the
board config header so that the ns16550 serial driver can successfully init
during SPL after failing to resolve the parent clock from upstream dts. The
serial driver will then resolve clock frequency from device-tree node parent
clock at init during Main app as it is expected by upstream.
Signed-off-by: E Shattow <e@freeshell.de>
---
arch/riscv/dts/jh7110-common-u-boot.dtsi | 1 -
include/configs/starfive-visionfive2.h | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/dts/jh7110-common-u-boot.dtsi b/arch/riscv/dts/jh7110-common-u-boot.dtsi
index 6d85b2d91a7..049b0a7ce28 100644
--- a/arch/riscv/dts/jh7110-common-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-common-u-boot.dtsi
@@ -27,7 +27,6 @@
bootph-pre-ram;
reg-offset = <0>;
current-speed = <115200>;
- clock-frequency = <24000000>;
};
&mmc0 {
diff --git a/include/configs/starfive-visionfive2.h b/include/configs/starfive-visionfive2.h
index 049b0a06301..e7001b26abf 100644
--- a/include/configs/starfive-visionfive2.h
+++ b/include/configs/starfive-visionfive2.h
@@ -39,4 +39,6 @@
"partitions=" PARTS_DEFAULT "\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
+#define CFG_SYS_NS16550_CLK 24000000
+
#endif /* _STARFIVE_VISIONFIVE2_H */
base-commit: 6cc812f8cc55c132458c7da5b9fb7666315cbe8c
--
2.49.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] riscv: starfive: jh7110: move uart0 clock frequency to config header
2025-05-03 11:52 [PATCH] riscv: starfive: jh7110: move uart0 clock frequency to config header E Shattow
@ 2025-05-12 18:14 ` Leo Liang
0 siblings, 0 replies; 2+ messages in thread
From: Leo Liang @ 2025-05-12 18:14 UTC (permalink / raw)
To: E Shattow; +Cc: Rick Chen, Minda Chen, Hal Feng, Tom Rini, u-boot
On Sat, May 03, 2025 at 04:52:52AM -0700, E Shattow wrote:
> Move unnecessary clock frequency assignment out of device-tree and into the
> board config header so that the ns16550 serial driver can successfully init
> during SPL after failing to resolve the parent clock from upstream dts. The
> serial driver will then resolve clock frequency from device-tree node parent
> clock at init during Main app as it is expected by upstream.
>
> Signed-off-by: E Shattow <e@freeshell.de>
> ---
> arch/riscv/dts/jh7110-common-u-boot.dtsi | 1 -
> include/configs/starfive-visionfive2.h | 2 ++
> 2 files changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2025-05-03 11:52 [PATCH] riscv: starfive: jh7110: move uart0 clock frequency to config header E Shattow
2025-05-12 18:14 ` Leo Liang
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