From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A460C61DB2 for ; Mon, 9 Jun 2025 08:04:51 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E329E82A36; Mon, 9 Jun 2025 10:04:49 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id EAF9A82A36; Mon, 9 Jun 2025 10:04:47 +0200 (CEST) Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 79FD380E9A for ; Mon, 9 Jun 2025 10:04:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS34.andestech.com [10.0.1.134]) by Atcsqr.andestech.com with ESMTPS id 55984RC9027768 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Mon, 9 Jun 2025 16:04:27 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from swlinux02 (10.0.15.183) by ATCPCS34.andestech.com (10.0.1.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 9 Jun 2025 16:04:27 +0800 Date: Mon, 9 Jun 2025 16:04:23 +0800 From: Leo Liang To: Yao Zi CC: Tom Rini , , Subject: Re: [PULL] u-boot-riscv/next Message-ID: References: <20250605200506.GF1382132@bill-the-cat> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.10 (e0e92c31) (2023-03-25) X-Originating-IP: [10.0.15.183] X-ClientProxiedBy: ATCPCS33.andestech.com (10.0.1.100) To ATCPCS34.andestech.com (10.0.1.134) X-DKIM-Results: atcpcs34.andestech.com; dkim=none; X-DNSRBL: X-MAIL: Atcsqr.andestech.com 55984RC9027768 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Sun, Jun 08, 2025 at 02:37:04AM +0000, Yao Zi wrote: > [EXTERNAL MAIL] > > On Thu, Jun 05, 2025 at 02:05:06PM -0600, Tom Rini wrote: > > On Tue, Jun 03, 2025 at 02:45:21PM +0800, Leo Liang wrote: > > > > > Hi Tom, > > > > > > The following changes since commit d45b1d4ac94710f88902adc2173d7930700e2869: > > > > > > Merge tag 'u-boot-dfu-next-20250602' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next (2025-06-02 08:43:10 -0600) > > > > > > are available in the Git repository at: > > > > > > https://source.denx.de/u-boot/custodians/u-boot-riscv.git next > > > > > > for you to fetch changes up to b911af6d60d3be570469b92df751874dc376336b: > > > > > > MAINTAINERS: riscv: cpu: th1520: Assign myself as maintainer (2025-06-03 14:17:46 +0800) > > > > > > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/26483 > > > ---------------------------------------------------------------- > > > - board: Convert Lichee Pi 4A to use S-Mode proper U-Boot > > > - RISC-V: configs: Raise SPL_SYS_MALLOC_SIZE to 8 MiB > > > - driver: Add SD card support to the Beagle-V-Fire > > > - MAINTAINERS: Add Yao Zi as maintainer for th1520 > > > ---------------------------------------------------------------- > > > > This introduces a failure to build on microchip_mpfs_icicle currently in > > -next. > > microchip_mpfs_icicle_defconfig fails to build in u-boot-riscv/next as > well. Reverting b73971dea9fed ("spi: coreqspi: add xfer function for > PolarFire SoC") fixes it. > > Seems the patch doesn't adapt the multiple-cs-capable definition of > dm_slave_plat, which was introduced in commit 34da258bb04 ("spi: > spi-uclass: Read chipselect and restrict capabilities") in the last > year. Thus I doubt whether the patch has been built and tested against a > recent version of U-Boot. > Sorry for the negligence. I will respin a PR for next and ask the submitter to send a fixed patch set. Best regards, Leo > > -- > > Tom > > Regards, > Yao Zi