[PATCH 0/2] Add support for FriendlyElec NanoPi Zero2 board

[PATCH 0/2] Add support for FriendlyElec NanoPi Zero2 board

[Yao Zi]

This series cherry-picks the upstream board devicetree, add board
configuration and U-Boot devicetree pieces for the board. A wiki page
for the board could be found here[1].

I've tested booting from SD-card and network through EFI and PXE.
On-board LEDs are driven correctly, and button states could be read.

[1]: https://wiki.friendlyelec.com/wiki/index.php/NanoPi_Zero2

Jonas Karlman (1):
  arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2

Yao Zi (1):
  board: rockchip: Add FriendlyElec NanoPi Zero2

 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi  |  11 +
 arch/arm/mach-rockchip/rk3528/MAINTAINERS     |   6 +
 configs/nanopi-zero2_defconfig                |  46 +++
 doc/board/rockchip/rockchip.rst               |   1 +
 .../arm64/rockchip/rk3528-nanopi-zero2.dts    | 340 ++++++++++++++++++
 5 files changed, 404 insertions(+)
 create mode 100644 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
 create mode 100644 configs/nanopi-zero2_defconfig
 create mode 100644 dts/upstream/src/arm64/rockchip/rk3528-nanopi-zero2.dts

-- 
2.50.1

[PATCH 1/2] arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2

[Yao Zi]

From: Jonas Karlman <jonas@kwiboo.se>

The NanoPi Zero2 is a small single board computer developed by
FriendlyElec, based on the Rockchip RK3528A SoC.

Add initial device tree for the FriendlyElec NanoPi Zero2 board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250717103720.2853031-7-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: b944112abef4e52e81b19be44a7bac5b45779ba1 ]

(cherry picked from commit 6b4efb438e72486e9410c75058ebd71855565e22)
---
 .../arm64/rockchip/rk3528-nanopi-zero2.dts    | 340 ++++++++++++++++++
 1 file changed, 340 insertions(+)
 create mode 100644 dts/upstream/src/arm64/rockchip/rk3528-nanopi-zero2.dts

diff --git a/dts/upstream/src/arm64/rockchip/rk3528-nanopi-zero2.dts b/dts/upstream/src/arm64/rockchip/rk3528-nanopi-zero2.dts
new file mode 100644
index 00000000000..9f683033c5f
--- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3528-nanopi-zero2.dts
@@ -0,0 +1,340 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3528.dtsi"
+
+/ {
+	model = "FriendlyElec NanoPi Zero2";
+	compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";
+
+	aliases {
+		ethernet0 = &gmac1;
+		i2c1 = &i2c1;
+		mmc0 = &sdhci;
+		mmc1 = &sdmmc;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:1500000n8";
+	};
+
+	adc-keys-0 {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		poll-interval = <100>;
+
+		button-maskrom {
+			label = "MASK";
+			linux,code = <KEY_SETUP>;
+			press-threshold-microvolt = <0>;
+		};
+	};
+
+	adc-keys-1 {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		poll-interval = <100>;
+
+		button-recovery {
+			label = "RECOVERY";
+			linux,code = <KEY_VENDOR>;
+			press-threshold-microvolt = <0>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led1>, <&led_sys>;
+
+		led-0 {
+			color = <LED_COLOR_ID_RED>;
+			default-state = "on";
+			function = LED_FUNCTION_HEARTBEAT;
+			gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+		};
+
+		led-1 {
+			color = <LED_COLOR_ID_GREEN>;
+			default-state = "on";
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "default-on";
+		};
+	};
+
+	vcc0v6_ddr: regulator-0v6-vcc-ddr {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc0v6_ddr";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <600000>;
+		regulator-max-microvolt = <600000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vdd_0v9: regulator-0v9-vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_0v9";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <900000>;
+		regulator-max-microvolt = <900000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc_ddr: regulator-1v1-vcc-ddr {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_ddr";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1100000>;
+		regulator-max-microvolt = <1100000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc_1v8: regulator-1v8-vcc {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_1v8";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+	};
+
+	vcc_3v3: regulator-3v3-vcc {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_3v3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc3v3_sd: regulator-3v3-vcc-sd {
+		compatible = "regulator-fixed";
+		gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_pwren_l>;
+		regulator-name = "vcc3v3_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_3v3>;
+	};
+
+	vcc5v0_sys: regulator-5v0-vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	usb2_host_5v: regulator-5v0-usb2-host {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb20_host1_pwren>;
+		regulator-name = "usb2_host_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vccio_sd: regulator-vccio-sd {
+		compatible = "regulator-gpio";
+		gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_vol_ctrl_h>;
+		regulator-name = "vccio_sd";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		states = <1800000 0x0>, <3300000 0x1>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vdd_arm: regulator-vdd-arm {
+		compatible = "pwm-regulator";
+		pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+		pwm-supply = <&vcc5v0_sys>;
+		regulator-name = "vdd_arm";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <746000>;
+		regulator-max-microvolt = <1201000>;
+		regulator-settling-time-up-us = <250>;
+	};
+
+	vdd_logic: regulator-vdd-logic {
+		compatible = "pwm-regulator";
+		pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+		pwm-supply = <&vcc5v0_sys>;
+		regulator-name = "vdd_logic";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <705000>;
+		regulator-max-microvolt = <1006000>;
+		regulator-settling-time-up-us = <250>;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&gmac1 {
+	clock_in_out = "output";
+	phy-handle = <&rgmii_phy>;
+	phy-mode = "rgmii-id";
+	phy-supply = <&vcc_3v3>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+		    <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_logic>;
+	status = "okay";
+};
+
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1m0_xfer>;
+	status = "okay";
+
+	hym8563: rtc@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&rtc_int_l>;
+		wakeup-source;
+	};
+};
+
+&mdio1 {
+	rgmii_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&gmac1_rstn_l>;
+		reset-assert-us = <20000>;
+		reset-deassert-us = <100000>;
+		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&pinctrl {
+	ethernet {
+		gmac1_rstn_l: gmac1-rstn-l {
+			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	leds {
+		led1: led1 {
+			rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		led_sys: led-sys {
+			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	rtc {
+		rtc_int_l: rtc-int-l {
+			rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
+			rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		sdmmc_pwren_l: sdmmc-pwren-l {
+			rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb {
+		usb20_host1_pwren: usb20-host1-pwren {
+			rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm1m0_pins>;
+	status = "okay";
+};
+
+&pwm2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm2m0_pins>;
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	no-sd;
+	no-sdio;
+	non-removable;
+	vmmc-supply = <&vcc_3v3>;
+	vqmmc-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc3v3_sd>;
+	vqmmc-supply = <&vccio_sd>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0m0_xfer>;
+	status = "okay";
+};
-- 
2.50.1

[PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi Zero2

[Yao Zi]

FriendlElec NanoPi Zero2 is a super-tiny development board based on
RK3528A SoC. Add board-level configuration and U-Boot-specific
devicetree piece for it.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi | 11 +++++
 arch/arm/mach-rockchip/rk3528/MAINTAINERS    |  6 +++
 configs/nanopi-zero2_defconfig               | 46 ++++++++++++++++++++
 doc/board/rockchip/rockchip.rst              |  1 +
 4 files changed, 64 insertions(+)
 create mode 100644 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
 create mode 100644 configs/nanopi-zero2_defconfig

diff --git a/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
new file mode 100644
index 00000000000..3f65d2e1ff1
--- /dev/null
+++ b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3528-u-boot.dtsi"
+
+&vdd_arm {
+	regulator-init-microvolt = <953000>;
+};
+
+&vdd_logic {
+	regulator-init-microvolt = <901000>;
+};
diff --git a/arch/arm/mach-rockchip/rk3528/MAINTAINERS b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
index f343f71cf7f..853480a58ce 100644
--- a/arch/arm/mach-rockchip/rk3528/MAINTAINERS
+++ b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
@@ -9,3 +9,9 @@ M:	Jonas Karlman <jonas@kwiboo.se>
 S:	Maintained
 F:	arch/arm/dts/rk3528-radxa-e20c*
 F:	configs/radxa-e20c-rk3528_defconfig
+
+NANOPI-ZERO2
+M:	Yao Zi <ziyao@disroot.org>
+S:	Maintained
+F:	arch/arm/dts/rk3528-nanopi-zero2*
+F:	configs/nanopi-zero2_defconfig
diff --git a/configs/nanopi-zero2_defconfig b/configs/nanopi-zero2_defconfig
new file mode 100644
index 00000000000..af14589568c
--- /dev/null
+++ b/configs/nanopi-zero2_defconfig
@@ -0,0 +1,46 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3528-nanopi-zero2"
+CONFIG_ROCKCHIP_RK3528=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART_BASE=0xFF9F0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+# CONFIG_BOOTMETH_VBE is not set
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3528-nanopi-zero2.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_MAX_SIZE=0x40000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMINFO_MAP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MISC=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_RNG=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_BUTTON=y
+CONFIG_BUTTON_ADC=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ERRNO_STR=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index de3aa79cb5c..b2b7de4e43a 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -100,6 +100,7 @@ List of mainline supported Rockchip boards:
      - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
 
 * rk3528
+     - FriendlyElec NanoPi Zero2 (nanopi-zero2)
      - Generic RK3528 (generic-rk3528)
      - Radxa E20C (radxa-e20c-rk3528)
 
-- 
2.50.1

Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi Zero2

[Jonas Karlman]

Hi Yao Zi,

On 10/19/2025 7:26 AM, Yao Zi wrote:
> FriendlElec NanoPi Zero2 is a super-tiny development board based on
> RK3528A SoC. Add board-level configuration and U-Boot-specific
> devicetree piece for it.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
>  arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi | 11 +++++
>  arch/arm/mach-rockchip/rk3528/MAINTAINERS    |  6 +++
>  configs/nanopi-zero2_defconfig               | 46 ++++++++++++++++++++
>  doc/board/rockchip/rockchip.rst              |  1 +
>  4 files changed, 64 insertions(+)
>  create mode 100644 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
>  create mode 100644 configs/nanopi-zero2_defconfig
> 
> diff --git a/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
> new file mode 100644
> index 00000000000..3f65d2e1ff1
> --- /dev/null
> +++ b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
> @@ -0,0 +1,11 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +#include "rk3528-u-boot.dtsi"
> +
> +&vdd_arm {
> +	regulator-init-microvolt = <953000>;
> +};
> +
> +&vdd_logic {
> +	regulator-init-microvolt = <901000>;
> +};
> diff --git a/arch/arm/mach-rockchip/rk3528/MAINTAINERS b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
> index f343f71cf7f..853480a58ce 100644
> --- a/arch/arm/mach-rockchip/rk3528/MAINTAINERS
> +++ b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
> @@ -9,3 +9,9 @@ M:	Jonas Karlman <jonas@kwiboo.se>
>  S:	Maintained
>  F:	arch/arm/dts/rk3528-radxa-e20c*
>  F:	configs/radxa-e20c-rk3528_defconfig
> +
> +NANOPI-ZERO2
> +M:	Yao Zi <ziyao@disroot.org>

Feel free to also add me as a maintainer (or reviewer):

M:	Jonas Karlman <jonas@kwiboo.se>

> +S:	Maintained
> +F:	arch/arm/dts/rk3528-nanopi-zero2*
> +F:	configs/nanopi-zero2_defconfig

The defconfig should be named nanopi-zero2-rk3528_defconfig to match the
Rockchip board defconfig naming scheme.

> diff --git a/configs/nanopi-zero2_defconfig b/configs/nanopi-zero2_defconfig
> new file mode 100644
> index 00000000000..af14589568c
> --- /dev/null
> +++ b/configs/nanopi-zero2_defconfig

As mentioned above, please name this nanopi-zero2-rk3528_defconfig.

> @@ -0,0 +1,46 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3528-nanopi-zero2"
> +CONFIG_ROCKCHIP_RK3528=y
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_DEBUG_UART_BASE=0xFF9F0000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_DEBUG_UART=y
> +# CONFIG_BOOTMETH_VBE is not set

There should be no need to drop this, I only drop it in generic Rockchip
defconfig because it that defconfig is supposed to be as minimal and
generic as possible.

> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3528-nanopi-zero2.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set

Please add following to seed random generator for linux.

CONFIG_BOARD_RNG_SEED=y

> +CONFIG_SPL_MAX_SIZE=0x40000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +CONFIG_CMD_MEMINFO=y
> +CONFIG_CMD_MEMINFO_MAP=y

Please add following to add the adc command:

CONFIG_CMD_ADC=y

> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_MISC=y
> +CONFIG_CMD_MMC=y

Please add following USB commands to future proof:

CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y

> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_RNG=y

Please add following to enable regulator debug:

CONFIG_CMD_REGULATOR=y

> +# CONFIG_SPL_DOS_PARTITION is not set
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_BUTTON=y
> +CONFIG_BUTTON_ADC=y

Please add following to simplify addition of USB related Kconfig options:

# CONFIG_USB_FUNCTION_FASTBOOT is not set

> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_LED=y
> +CONFIG_LED_GPIO=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_PHY_REALTEK=y

Please add following:

CONFIG_DM_MDIO=y

> +CONFIG_DWC_ETH_QOS=y
> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y

Please add following to prepare for USB3/PCIe:

CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y

Please add following to actually enable support for initializing the two
pwm-regulators on this board.

CONFIG_REGULATOR_PWM=y

> +CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYS_NS16550_MEM32=y

Please add following to prepare for future USB support:

CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y

> +CONFIG_ERRNO_STR=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index de3aa79cb5c..b2b7de4e43a 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -100,6 +100,7 @@ List of mainline supported Rockchip boards:
>       - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
>  
>  * rk3528
> +     - FriendlyElec NanoPi Zero2 (nanopi-zero2)

Please update to include the rk3528 suffix after the defconfig name.

>       - Generic RK3528 (generic-rk3528)
>       - Radxa E20C (radxa-e20c-rk3528)
>  

With above adjustments this closely matches the defconfig I have been
carrying in my rk3528 branch at [1] a few months.

So with above fixed this is:

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

[1] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commits/rk3528

I plan to send out a series with the ROCK-2 and Sige1 board additions shortly.

Regards,
Jonas

Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi Zero2

[Yao Zi]

On Sun, Oct 19, 2025 at 12:52:17PM +0200, Jonas Karlman wrote:
> Hi Yao Zi,
> 
> On 10/19/2025 7:26 AM, Yao Zi wrote:
> > FriendlElec NanoPi Zero2 is a super-tiny development board based on
> > RK3528A SoC. Add board-level configuration and U-Boot-specific
> > devicetree piece for it.
> > 
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> >  arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi | 11 +++++
> >  arch/arm/mach-rockchip/rk3528/MAINTAINERS    |  6 +++
> >  configs/nanopi-zero2_defconfig               | 46 ++++++++++++++++++++
> >  doc/board/rockchip/rockchip.rst              |  1 +
> >  4 files changed, 64 insertions(+)
> >  create mode 100644 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
> >  create mode 100644 configs/nanopi-zero2_defconfig
> > 
> > diff --git a/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
> > new file mode 100644
> > index 00000000000..3f65d2e1ff1
> > --- /dev/null
> > +++ b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
> > @@ -0,0 +1,11 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +
> > +#include "rk3528-u-boot.dtsi"
> > +
> > +&vdd_arm {
> > +	regulator-init-microvolt = <953000>;
> > +};
> > +
> > +&vdd_logic {
> > +	regulator-init-microvolt = <901000>;
> > +};
> > diff --git a/arch/arm/mach-rockchip/rk3528/MAINTAINERS b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
> > index f343f71cf7f..853480a58ce 100644
> > --- a/arch/arm/mach-rockchip/rk3528/MAINTAINERS
> > +++ b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
> > @@ -9,3 +9,9 @@ M:	Jonas Karlman <jonas@kwiboo.se>
> >  S:	Maintained
> >  F:	arch/arm/dts/rk3528-radxa-e20c*
> >  F:	configs/radxa-e20c-rk3528_defconfig
> > +
> > +NANOPI-ZERO2
> > +M:	Yao Zi <ziyao@disroot.org>
> 
> Feel free to also add me as a maintainer (or reviewer):
> 
> M:	Jonas Karlman <jonas@kwiboo.se>

Sure, will add you as a maintainer.

> > +S:	Maintained
> > +F:	arch/arm/dts/rk3528-nanopi-zero2*
> > +F:	configs/nanopi-zero2_defconfig
> 
> The defconfig should be named nanopi-zero2-rk3528_defconfig to match the
> Rockchip board defconfig naming scheme.
> 
> > diff --git a/configs/nanopi-zero2_defconfig b/configs/nanopi-zero2_defconfig
> > new file mode 100644
> > index 00000000000..af14589568c
> > --- /dev/null
> > +++ b/configs/nanopi-zero2_defconfig
> 
> As mentioned above, please name this nanopi-zero2-rk3528_defconfig.
> 
> > @@ -0,0 +1,46 @@
> > +CONFIG_ARM=y
> > +CONFIG_SKIP_LOWLEVEL_INIT=y
> > +CONFIG_COUNTER_FREQUENCY=24000000
> > +CONFIG_ARCH_ROCKCHIP=y
> > +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3528-nanopi-zero2"
> > +CONFIG_ROCKCHIP_RK3528=y
> > +CONFIG_SYS_LOAD_ADDR=0xc00800
> > +CONFIG_DEBUG_UART_BASE=0xFF9F0000
> > +CONFIG_DEBUG_UART_CLOCK=24000000
> > +CONFIG_DEBUG_UART=y
> > +# CONFIG_BOOTMETH_VBE is not set
> 
> There should be no need to drop this, I only drop it in generic Rockchip
> defconfig because it that defconfig is supposed to be as minimal and
> generic as possible.
> 
> > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3528-nanopi-zero2.dtb"
> > +# CONFIG_DISPLAY_CPUINFO is not set
> 
> Please add following to seed random generator for linux.
> 
> CONFIG_BOARD_RNG_SEED=y
> 
> > +CONFIG_SPL_MAX_SIZE=0x40000
> > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> > +CONFIG_CMD_MEMINFO=y
> > +CONFIG_CMD_MEMINFO_MAP=y
> 
> Please add following to add the adc command:
> 
> CONFIG_CMD_ADC=y
> 
> > +CONFIG_CMD_GPIO=y
> > +CONFIG_CMD_GPT=y
> > +CONFIG_CMD_MISC=y
> > +CONFIG_CMD_MMC=y
> 
> Please add following USB commands to future proof:
> 
> CONFIG_CMD_USB=y
> CONFIG_CMD_ROCKUSB=y
> CONFIG_CMD_USB_MASS_STORAGE=y
> 
> > +# CONFIG_CMD_SETEXPR is not set
> > +CONFIG_CMD_RNG=y
> 
> Please add following to enable regulator debug:
> 
> CONFIG_CMD_REGULATOR=y
> 
> > +# CONFIG_SPL_DOS_PARTITION is not set
> > +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> > +CONFIG_BUTTON=y
> > +CONFIG_BUTTON_ADC=y
> 
> Please add following to simplify addition of USB related Kconfig options:
> 
> # CONFIG_USB_FUNCTION_FASTBOOT is not set
> 
> > +CONFIG_ROCKCHIP_GPIO=y
> > +CONFIG_LED=y
> > +CONFIG_LED_GPIO=y
> > +CONFIG_SUPPORT_EMMC_RPMB=y
> > +CONFIG_MMC_DW=y
> > +CONFIG_MMC_DW_ROCKCHIP=y
> > +CONFIG_MMC_SDHCI=y
> > +CONFIG_MMC_SDHCI_SDMA=y
> > +CONFIG_MMC_SDHCI_ROCKCHIP=y
> > +CONFIG_PHY_REALTEK=y
> 
> Please add following:
> 
> CONFIG_DM_MDIO=y
> 
> > +CONFIG_DWC_ETH_QOS=y
> > +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
> > +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> 
> Please add following to prepare for USB3/PCIe:
> 
> CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
> 
> Please add following to actually enable support for initializing the two
> pwm-regulators on this board.
> 
> CONFIG_REGULATOR_PWM=y
> 
> > +CONFIG_DM_REGULATOR_GPIO=y
> > +CONFIG_PWM_ROCKCHIP=y
> > +CONFIG_BAUDRATE=1500000
> > +CONFIG_DEBUG_UART_SHIFT=2
> > +CONFIG_SYS_NS16550_MEM32=y
> 
> Please add following to prepare for future USB support:
> 
> CONFIG_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_EHCI_GENERIC=y
> CONFIG_USB_DWC3=y
> CONFIG_USB_DWC3_GENERIC=y
> CONFIG_USB_GADGET=y
> CONFIG_USB_GADGET_DOWNLOAD=y
> CONFIG_USB_FUNCTION_ROCKUSB=y
> 
> > +CONFIG_ERRNO_STR=y
> > diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> > index de3aa79cb5c..b2b7de4e43a 100644
> > --- a/doc/board/rockchip/rockchip.rst
> > +++ b/doc/board/rockchip/rockchip.rst
> > @@ -100,6 +100,7 @@ List of mainline supported Rockchip boards:
> >       - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
> >  
> >  * rk3528
> > +     - FriendlyElec NanoPi Zero2 (nanopi-zero2)
> 
> Please update to include the rk3528 suffix after the defconfig name.
> 
> >       - Generic RK3528 (generic-rk3528)
> >       - Radxa E20C (radxa-e20c-rk3528)
> >  
> 
> With above adjustments this closely matches the defconfig I have been
> carrying in my rk3528 branch at [1] a few months.
> 
> So with above fixed this is:
> 
> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

Thanks, these changes are all reasonable and I'll adapt them in v2.
Seems I did something wrong when doing savedefconfig and lost some
defconfig changes...

> [1] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commits/rk3528
> 
> I plan to send out a series with the ROCK-2 and Sige1 board additions shortly.
> 
> Regards,
> Jonas

Best regards,
Yao Zi

Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi Zero2

[Quentin Schulz]

Hi Jonas,

On 10/19/25 12:52 PM, Jonas Karlman wrote:
> Hi Yao Zi,
> 
> On 10/19/2025 7:26 AM, Yao Zi wrote:
[...]
>> +CONFIG_DM_REGULATOR_GPIO=y
>> +CONFIG_PWM_ROCKCHIP=y
>> +CONFIG_BAUDRATE=1500000
>> +CONFIG_DEBUG_UART_SHIFT=2
>> +CONFIG_SYS_NS16550_MEM32=y
> 
> Please add following to prepare for future USB support:
> 

I don't like this. Whatever is enabled in the defconfig, I'm expecting 
it to work when I'm testing, so I would rather suggest to postpone this 
to when it actually works?

In the end, I don't own the device nor do I plan to, so whatever floats 
your boat :)

Cheers,
Quentin

Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi Zero2

[Jonas Karlman]

Hi Quentin,

On 10/20/2025 7:02 PM, Quentin Schulz wrote:
> Hi Jonas,
> 
> On 10/19/25 12:52 PM, Jonas Karlman wrote:
>> Hi Yao Zi,
>>
>> On 10/19/2025 7:26 AM, Yao Zi wrote:
> [...]
>>> +CONFIG_DM_REGULATOR_GPIO=y
>>> +CONFIG_PWM_ROCKCHIP=y
>>> +CONFIG_BAUDRATE=1500000
>>> +CONFIG_DEBUG_UART_SHIFT=2
>>> +CONFIG_SYS_NS16550_MEM32=y
>>
>> Please add following to prepare for future USB support:
>>
> 
> I don't like this. Whatever is enabled in the defconfig, I'm expecting 
> it to work when I'm testing, so I would rather suggest to postpone this 
> to when it actually works?

The required driver support for USB 2.0 landed in v2025.07 and USB 3.0
in v2025.10. It is now only the DT nodes (on Linux ML) that is missing
to make USB work for this and other RK3528 boards.

> 
> In the end, I don't own the device nor do I plan to, so whatever floats 
> your boat :)

USB has been working as it should for this and the other rk3528 boards
with my rk3528 branch [1] for the past 5-7 months, so I would very much
prefer to enable these Kconfig options now and just have wait for a
future DT pick or sync to make USB finally work in upstream.

[1] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commits/rk3528

Regards,
Jonas

> 
> Cheers,
> Quentin

Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi Zero2

[Jonas Karlman]

Hi Yao Zi,

On 10/20/2025 4:27 AM, Yao Zi wrote:
> On Sun, Oct 19, 2025 at 12:52:17PM +0200, Jonas Karlman wrote:
>> Hi Yao Zi,
>>
>> On 10/19/2025 7:26 AM, Yao Zi wrote:
>>> FriendlElec NanoPi Zero2 is a super-tiny development board based on
>>> RK3528A SoC. Add board-level configuration and U-Boot-specific
>>> devicetree piece for it.
>>>
>>> Signed-off-by: Yao Zi <ziyao@disroot.org>
>>> ---
>>>  arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi | 11 +++++
>>>  arch/arm/mach-rockchip/rk3528/MAINTAINERS    |  6 +++
>>>  configs/nanopi-zero2_defconfig               | 46 ++++++++++++++++++++
>>>  doc/board/rockchip/rockchip.rst              |  1 +
>>>  4 files changed, 64 insertions(+)
>>>  create mode 100644 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
>>>  create mode 100644 configs/nanopi-zero2_defconfig
>>>
>>> diff --git a/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
>>> new file mode 100644
>>> index 00000000000..3f65d2e1ff1
>>> --- /dev/null
>>> +++ b/arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
>>> @@ -0,0 +1,11 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +
>>> +#include "rk3528-u-boot.dtsi"
>>> +
>>> +&vdd_arm {
>>> +	regulator-init-microvolt = <953000>;
>>> +};
>>> +
>>> +&vdd_logic {
>>> +	regulator-init-microvolt = <901000>;
>>> +};
>>> diff --git a/arch/arm/mach-rockchip/rk3528/MAINTAINERS b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
>>> index f343f71cf7f..853480a58ce 100644
>>> --- a/arch/arm/mach-rockchip/rk3528/MAINTAINERS
>>> +++ b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
>>> @@ -9,3 +9,9 @@ M:	Jonas Karlman <jonas@kwiboo.se>
>>>  S:	Maintained
>>>  F:	arch/arm/dts/rk3528-radxa-e20c*
>>>  F:	configs/radxa-e20c-rk3528_defconfig
>>> +
>>> +NANOPI-ZERO2
>>> +M:	Yao Zi <ziyao@disroot.org>
>>
>> Feel free to also add me as a maintainer (or reviewer):
>>
>> M:	Jonas Karlman <jonas@kwiboo.se>
> 
> Sure, will add you as a maintainer.
> 
>>> +S:	Maintained
>>> +F:	arch/arm/dts/rk3528-nanopi-zero2*
>>> +F:	configs/nanopi-zero2_defconfig
>>
>> The defconfig should be named nanopi-zero2-rk3528_defconfig to match the
>> Rockchip board defconfig naming scheme.
>>
>>> diff --git a/configs/nanopi-zero2_defconfig b/configs/nanopi-zero2_defconfig
>>> new file mode 100644
>>> index 00000000000..af14589568c
>>> --- /dev/null
>>> +++ b/configs/nanopi-zero2_defconfig
>>
>> As mentioned above, please name this nanopi-zero2-rk3528_defconfig.
>>
>>> @@ -0,0 +1,46 @@
>>> +CONFIG_ARM=y
>>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>>> +CONFIG_COUNTER_FREQUENCY=24000000
>>> +CONFIG_ARCH_ROCKCHIP=y
>>> +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3528-nanopi-zero2"
>>> +CONFIG_ROCKCHIP_RK3528=y
>>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>>> +CONFIG_DEBUG_UART_BASE=0xFF9F0000
>>> +CONFIG_DEBUG_UART_CLOCK=24000000
>>> +CONFIG_DEBUG_UART=y
>>> +# CONFIG_BOOTMETH_VBE is not set
>>
>> There should be no need to drop this, I only drop it in generic Rockchip
>> defconfig because it that defconfig is supposed to be as minimal and
>> generic as possible.
>>
>>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3528-nanopi-zero2.dtb"
>>> +# CONFIG_DISPLAY_CPUINFO is not set
>>
>> Please add following to seed random generator for linux.
>>
>> CONFIG_BOARD_RNG_SEED=y
>>
>>> +CONFIG_SPL_MAX_SIZE=0x40000
>>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>>> +CONFIG_CMD_MEMINFO=y
>>> +CONFIG_CMD_MEMINFO_MAP=y
>>
>> Please add following to add the adc command:
>>
>> CONFIG_CMD_ADC=y
>>
>>> +CONFIG_CMD_GPIO=y
>>> +CONFIG_CMD_GPT=y
>>> +CONFIG_CMD_MISC=y
>>> +CONFIG_CMD_MMC=y
>>
>> Please add following USB commands to future proof:
>>
>> CONFIG_CMD_USB=y
>> CONFIG_CMD_ROCKUSB=y
>> CONFIG_CMD_USB_MASS_STORAGE=y
>>
>>> +# CONFIG_CMD_SETEXPR is not set
>>> +CONFIG_CMD_RNG=y
>>
>> Please add following to enable regulator debug:
>>
>> CONFIG_CMD_REGULATOR=y
>>
>>> +# CONFIG_SPL_DOS_PARTITION is not set
>>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>>> +CONFIG_BUTTON=y
>>> +CONFIG_BUTTON_ADC=y
>>
>> Please add following to simplify addition of USB related Kconfig options:
>>
>> # CONFIG_USB_FUNCTION_FASTBOOT is not set
>>
>>> +CONFIG_ROCKCHIP_GPIO=y
>>> +CONFIG_LED=y
>>> +CONFIG_LED_GPIO=y
>>> +CONFIG_SUPPORT_EMMC_RPMB=y
>>> +CONFIG_MMC_DW=y
>>> +CONFIG_MMC_DW_ROCKCHIP=y
>>> +CONFIG_MMC_SDHCI=y
>>> +CONFIG_MMC_SDHCI_SDMA=y
>>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>>> +CONFIG_PHY_REALTEK=y
>>
>> Please add following:
>>
>> CONFIG_DM_MDIO=y
>>
>>> +CONFIG_DWC_ETH_QOS=y
>>> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
>>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>>
>> Please add following to prepare for USB3/PCIe:
>>
>> CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>>
>> Please add following to actually enable support for initializing the two
>> pwm-regulators on this board.
>>
>> CONFIG_REGULATOR_PWM=y
>>
>>> +CONFIG_DM_REGULATOR_GPIO=y
>>> +CONFIG_PWM_ROCKCHIP=y
>>> +CONFIG_BAUDRATE=1500000
>>> +CONFIG_DEBUG_UART_SHIFT=2
>>> +CONFIG_SYS_NS16550_MEM32=y
>>
>> Please add following to prepare for future USB support:
>>
>> CONFIG_USB=y
>> CONFIG_USB_XHCI_HCD=y
>> CONFIG_USB_EHCI_HCD=y
>> CONFIG_USB_EHCI_GENERIC=y
>> CONFIG_USB_DWC3=y
>> CONFIG_USB_DWC3_GENERIC=y
>> CONFIG_USB_GADGET=y
>> CONFIG_USB_GADGET_DOWNLOAD=y
>> CONFIG_USB_FUNCTION_ROCKUSB=y
>>
>>> +CONFIG_ERRNO_STR=y
>>> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
>>> index de3aa79cb5c..b2b7de4e43a 100644
>>> --- a/doc/board/rockchip/rockchip.rst
>>> +++ b/doc/board/rockchip/rockchip.rst
>>> @@ -100,6 +100,7 @@ List of mainline supported Rockchip boards:
>>>       - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
>>>  
>>>  * rk3528
>>> +     - FriendlyElec NanoPi Zero2 (nanopi-zero2)
>>
>> Please update to include the rk3528 suffix after the defconfig name.
>>
>>>       - Generic RK3528 (generic-rk3528)
>>>       - Radxa E20C (radxa-e20c-rk3528)
>>>  
>>
>> With above adjustments this closely matches the defconfig I have been
>> carrying in my rk3528 branch at [1] a few months.
>>
>> So with above fixed this is:
>>
>> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
> 
> Thanks, these changes are all reasonable and I'll adapt them in v2.
> Seems I did something wrong when doing savedefconfig and lost some
> defconfig changes...

Are you planing on sending out a v2 of this?

I still carry my old version of this in my rk3528 branch, see [2], I
can send that commit out if you do not have time to send a v2?

Btw, I should be able to send out a new revision of the Linux RK3528 USB
series any day now, once I have completed re-testing.

[2] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commit/e3f251b7828ddc09f0bc1c2240687c5ad22a40df

Regards,
Jonas

> 
>> [1] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commits/rk3528
>>
>> I plan to send out a series with the ROCK-2 and Sige1 board additions shortly.
>>
>> Regards,
>> Jonas
> 
> Best regards,
> Yao Zi

Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi Zero2

[Yao Zi]

On Fri, Jan 09, 2026 at 02:26:25AM +0100, Jonas Karlman wrote:
> Hi Yao Zi,
> 
> On 10/20/2025 4:27 AM, Yao Zi wrote:
> > On Sun, Oct 19, 2025 at 12:52:17PM +0200, Jonas Karlman wrote:
> >> Hi Yao Zi,
> >>
> >> On 10/19/2025 7:26 AM, Yao Zi wrote:
> >>> FriendlElec NanoPi Zero2 is a super-tiny development board based on
> >>> RK3528A SoC. Add board-level configuration and U-Boot-specific
> >>> devicetree piece for it.
> >>>
> >>> Signed-off-by: Yao Zi <ziyao@disroot.org>
> >>> ---
> >>>  arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi | 11 +++++
> >>>  arch/arm/mach-rockchip/rk3528/MAINTAINERS    |  6 +++
> >>>  configs/nanopi-zero2_defconfig               | 46 ++++++++++++++++++++
> >>>  doc/board/rockchip/rockchip.rst              |  1 +
> >>>  4 files changed, 64 insertions(+)
> >>>  create mode 100644 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi
> >>>  create mode 100644 configs/nanopi-zero2_defconfig

...

> >> With above adjustments this closely matches the defconfig I have been
> >> carrying in my rk3528 branch at [1] a few months.
> >>
> >> So with above fixed this is:
> >>
> >> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
> > 
> > Thanks, these changes are all reasonable and I'll adapt them in v2.
> > Seems I did something wrong when doing savedefconfig and lost some
> > defconfig changes...
> 
> Are you planing on sending out a v2 of this?
> 
> I still carry my old version of this in my rk3528 branch, see [2], I
> can send that commit out if you do not have time to send a v2?

Sure, please go ahead and send yours instead, thanks. Sorry for the huge
delay.

> Btw, I should be able to send out a new revision of the Linux RK3528 USB
> series any day now, once I have completed re-testing.
> 
> [2] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commit/e3f251b7828ddc09f0bc1c2240687c5ad22a40df
> 
> Regards,
> Jonas

Regards,
Yao Zi

> > 
> >> [1] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commits/rk3528
> >>
> >> I plan to send out a series with the ROCK-2 and Sige1 board additions shortly.
> >>
> >> Regards,
> >> Jonas
> > 
> > Best regards,
> > Yao Zi
>