[PATCH 0/3] gpio: Introduce gpio-delay driver and enable it on Kria

[PATCH 0/3] gpio: Introduce gpio-delay driver and enable it on Kria

[Michal Simek]

Hi,

we need to wait more time for getting USB hub out of reset to be able to do
initialiation over i2c that's why use gpio-delay driver instead of changing
waiting time in usb hub driver. Waiting time depends on gpio wiring on the
board which is in some of our case going via SLG programmable device.

Thanks,
Michal


Michal Simek (3):
  gpio: Add GPIO delay driver
  xilinx: Enable GPIO delay driver on Kria platforms
  arm64: zynqmp: Wire gpio-delay driver for USB hub reset

 arch/arm/dts/zynqmp-sck-kd-g-revA.dtso |  13 ++-
 arch/arm/dts/zynqmp-sck-kr-g-revA.dtso |  16 ++-
 arch/arm/dts/zynqmp-sck-kr-g-revB.dtso |  16 ++-
 arch/arm/dts/zynqmp-sck-kv-g-revA.dtso |  13 ++-
 arch/arm/dts/zynqmp-sck-kv-g-revB.dtso |  11 +-
 configs/xilinx_zynqmp_kria_defconfig   |   1 +
 drivers/gpio/Kconfig                   |   8 ++
 drivers/gpio/Makefile                  |   1 +
 drivers/gpio/gpio-delay.c              | 133 +++++++++++++++++++++++++
 9 files changed, 196 insertions(+), 16 deletions(-)
 create mode 100644 drivers/gpio/gpio-delay.c

-- 
2.43.0

base-commit: 1b94b48043bd77fcb837704cba4385e14a4a694e
branch: debian-sent3

[PATCH 1/3] gpio: Add GPIO delay driver

[Michal Simek]

Add a GPIO controller driver that provides configurable delays when
setting GPIO output values. This is useful for hardware that requires
specific timing delays during power sequencing or GPIO state changes.

The driver wraps underlying GPIO controllers and adds programmable
ramp-up and ramp-down delays specified in microseconds through the
device tree. Each GPIO can have independent delay timings.

Device tree binding matches Linux.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 drivers/gpio/Kconfig      |   8 +++
 drivers/gpio/Makefile     |   1 +
 drivers/gpio/gpio-delay.c | 133 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 142 insertions(+)
 create mode 100644 drivers/gpio/gpio-delay.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 60c5c54688e6..f69919abc05b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1,3 +1,11 @@
+config GPIO_DELAY
+	bool "GPIO delay driver"
+	depends on DM_GPIO
+	help
+	  Enable the GPIO delay driver.
+	  This driver allows wrapping another GPIO controller and inserting
+	  ramp-up/ramp-down delays on output changes, as described in the
+	  Linux gpio-delay binding.
 #
 # GPIO infrastructure and drivers
 #
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 910478c0c7a9..fec258f59f52 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_ATMEL_PIO4)	+= atmel_pio4.o
 obj-$(CONFIG_BCM6345_GPIO)	+= bcm6345_gpio.o
 obj-$(CONFIG_CORTINA_GPIO)      += cortina_gpio.o
 obj-$(CONFIG_FXL6408_GPIO)	+= gpio-fxl6408.o
+obj-$(CONFIG_GPIO_DELAY)	+= gpio-delay.o
 obj-$(CONFIG_INTEL_GPIO)	+= intel_gpio.o
 obj-$(CONFIG_INTEL_ICH6_GPIO)	+= intel_ich6_gpio.o
 obj-$(CONFIG_INTEL_BROADWELL_GPIO)	+= intel_broadwell_gpio.o
diff --git a/drivers/gpio/gpio-delay.c b/drivers/gpio/gpio-delay.c
new file mode 100644
index 000000000000..0c0d05ccb493
--- /dev/null
+++ b/drivers/gpio/gpio-delay.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 - 2026, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <asm/gpio.h>
+#include <linux/delay.h>
+
+struct gpio_delay_desc {
+	struct gpio_desc real_gpio;
+	u32 ramp_up_us;
+	u32 ramp_down_us;
+};
+
+struct gpio_delay_priv {
+	struct gpio_delay_desc *descs;
+};
+
+static int gpio_delay_direction_input(struct udevice *dev, unsigned int offset)
+{
+	return -ENOSYS;
+}
+
+static int gpio_delay_get_value(struct udevice *dev, unsigned int offset)
+{
+	return -ENOSYS;
+}
+
+static int gpio_delay_set_value(struct udevice *dev, unsigned int offset,
+				int value)
+{
+	struct gpio_delay_priv *priv = dev_get_priv(dev);
+	struct gpio_delay_desc *desc = &priv->descs[offset];
+	int ret = dm_gpio_set_value(&desc->real_gpio, value);
+	u32 wait;
+
+	dev_dbg(dev, "gpio %d set to %d\n", offset, value);
+
+	if (value)
+		wait = desc->ramp_up_us;
+	else
+		wait = desc->ramp_down_us;
+
+	udelay(wait);
+
+	dev_dbg(dev, "waited for %d us\n", wait);
+
+	return ret;
+}
+
+static int gpio_delay_direction_output(struct udevice *dev, unsigned int offset,
+				       int value)
+{
+	return gpio_delay_set_value(dev, offset, value);
+}
+
+static int gpio_delay_xlate(struct udevice *dev, struct gpio_desc *desc,
+			    struct ofnode_phandle_args *args)
+{
+	struct gpio_delay_priv *priv = dev_get_priv(dev);
+
+	if (args->args_count < 3)
+		return -EINVAL;
+
+	if (args->args[0] >= 32)
+		return -EINVAL;
+
+	struct gpio_delay_desc *d = &priv->descs[args->args[0]];
+
+	d->ramp_up_us = args->args[1];
+	d->ramp_down_us = args->args[2];
+
+	dev_dbg(dev, "pin: %d, ramp_up_us: %d, ramp_down_us: %d\n",
+		args->args[0], d->ramp_up_us, d->ramp_down_us);
+
+	return 0;
+}
+
+static const struct dm_gpio_ops gpio_delay_ops = {
+	.direction_output = gpio_delay_direction_output,
+	.direction_input = gpio_delay_direction_input,
+	.get_value = gpio_delay_get_value,
+	.set_value = gpio_delay_set_value,
+	.xlate = gpio_delay_xlate,
+};
+
+static int gpio_delay_probe(struct udevice *dev)
+{
+	struct gpio_delay_priv *priv = dev_get_priv(dev);
+	struct gpio_delay_desc *d;
+	ofnode node = dev_ofnode(dev);
+	int i = 0, ret, ngpio;
+
+	ngpio = gpio_get_list_count(dev, "gpios");
+	if (ngpio < 0)
+		return ngpio;
+
+	dev_dbg(dev, "gpios: %d\n", ngpio);
+
+	priv->descs = devm_kmalloc_array(dev, ngpio, sizeof(*d), GFP_KERNEL);
+	if (!priv->descs)
+		return -ENOMEM;
+
+	/* Request all GPIOs described in the controller node */
+	for (i = 0; i < ngpio; i++) {
+		d = &priv->descs[i];
+		ret = gpio_request_by_name_nodev(node, "gpios", i,
+						 &d->real_gpio, GPIOD_IS_OUT);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id gpio_delay_ids[] = {
+	{ .compatible = "gpio-delay" },
+	{ }
+};
+
+U_BOOT_DRIVER(gpio_delay) = {
+	.name = "gpio-delay",
+	.id = UCLASS_GPIO,
+	.of_match = gpio_delay_ids,
+	.ops = &gpio_delay_ops,
+	.priv_auto = sizeof(struct gpio_delay_priv),
+	.probe = gpio_delay_probe,
+};
-- 
2.43.0

Re: [PATCH 1/3] gpio: Add GPIO delay driver

[Peng Fan]

Hi Michal,

On Thu, Jan 22, 2026 at 01:50:33PM +0100, Michal Simek wrote:
>Add a GPIO controller driver that provides configurable delays when
>setting GPIO output values. This is useful for hardware that requires
>specific timing delays during power sequencing or GPIO state changes.
>
>The driver wraps underlying GPIO controllers and adds programmable
>ramp-up and ramp-down delays specified in microseconds through the
>device tree. Each GPIO can have independent delay timings.
>
>Device tree binding matches Linux.
>
>Signed-off-by: Michal Simek <michal.simek@amd.com>
>---
>
> drivers/gpio/Kconfig      |   8 +++
> drivers/gpio/Makefile     |   1 +
> drivers/gpio/gpio-delay.c | 133 ++++++++++++++++++++++++++++++++++++++
> 3 files changed, 142 insertions(+)
> create mode 100644 drivers/gpio/gpio-delay.c
>
>diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
>index 60c5c54688e6..f69919abc05b 100644
>--- a/drivers/gpio/Kconfig
>+++ b/drivers/gpio/Kconfig
>@@ -1,3 +1,11 @@
>+config GPIO_DELAY
>+	bool "GPIO delay driver"
>+	depends on DM_GPIO
>+	help
>+	  Enable the GPIO delay driver.
>+	  This driver allows wrapping another GPIO controller and inserting
>+	  ramp-up/ramp-down delays on output changes, as described in the
>+	  Linux gpio-delay binding.

Add an entry for SPL?

> #
> # GPIO infrastructure and drivers
> #
>diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
>index 910478c0c7a9..fec258f59f52 100644
>--- a/drivers/gpio/Makefile
>+++ b/drivers/gpio/Makefile
>@@ -21,6 +21,7 @@ obj-$(CONFIG_ATMEL_PIO4)	+= atmel_pio4.o
> obj-$(CONFIG_BCM6345_GPIO)	+= bcm6345_gpio.o
> obj-$(CONFIG_CORTINA_GPIO)      += cortina_gpio.o
> obj-$(CONFIG_FXL6408_GPIO)	+= gpio-fxl6408.o
>+obj-$(CONFIG_GPIO_DELAY)	+= gpio-delay.o
> obj-$(CONFIG_INTEL_GPIO)	+= intel_gpio.o
> obj-$(CONFIG_INTEL_ICH6_GPIO)	+= intel_ich6_gpio.o
> obj-$(CONFIG_INTEL_BROADWELL_GPIO)	+= intel_broadwell_gpio.o
>diff --git a/drivers/gpio/gpio-delay.c b/drivers/gpio/gpio-delay.c
>new file mode 100644
>index 000000000000..0c0d05ccb493
>--- /dev/null
>+++ b/drivers/gpio/gpio-delay.c
>@@ -0,0 +1,133 @@
>+// SPDX-License-Identifier: GPL-2.0
>+/*
>+ * Copyright (C) 2025 - 2026, Advanced Micro Devices, Inc.

Drop 2025?

>+ *
>+ * Michal Simek <michal.simek@amd.com>
>+ */
>+
>+#include <dm.h>
>+#include <dm/device_compat.h>
>+#include <dm/devres.h>
>+#include <asm/gpio.h>
>+#include <linux/delay.h>
>+
>+struct gpio_delay_desc {
>+	struct gpio_desc real_gpio;
>+	u32 ramp_up_us;
>+	u32 ramp_down_us;
>+};
>+
>+struct gpio_delay_priv {
>+	struct gpio_delay_desc *descs;
>+};
>+
>+static int gpio_delay_direction_input(struct udevice *dev, unsigned int offset)
>+{
>+	return -ENOSYS;
>+}
>+
>+static int gpio_delay_get_value(struct udevice *dev, unsigned int offset)
>+{
>+	return -ENOSYS;
>+}
>+
>+static int gpio_delay_set_value(struct udevice *dev, unsigned int offset,
>+				int value)
>+{
>+	struct gpio_delay_priv *priv = dev_get_priv(dev);
>+	struct gpio_delay_desc *desc = &priv->descs[offset];
>+	int ret = dm_gpio_set_value(&desc->real_gpio, value);
>+	u32 wait;


Check return value.
	if (ret) {
		dev_err(dev, "Failed to set gpio %d\n", offset);
	}

>+
>+	dev_dbg(dev, "gpio %d set to %d\n", offset, value);
>+
>+	if (value)
>+		wait = desc->ramp_up_us;
>+	else
>+		wait = desc->ramp_down_us;
>+
>+	udelay(wait);
>+
>+	dev_dbg(dev, "waited for %d us\n", wait);
>+
>+	return ret;
>+}
>+
>+static int gpio_delay_direction_output(struct udevice *dev, unsigned int offset,
>+				       int value)
>+{
>+	return gpio_delay_set_value(dev, offset, value);
>+}
>+
>+static int gpio_delay_xlate(struct udevice *dev, struct gpio_desc *desc,
>+			    struct ofnode_phandle_args *args)
>+{
>+	struct gpio_delay_priv *priv = dev_get_priv(dev);
>+
>+	if (args->args_count < 3)
>+		return -EINVAL;
>+
>+	if (args->args[0] >= 32)
>+		return -EINVAL;
>+
>+	struct gpio_delay_desc *d = &priv->descs[args->args[0]];
>+
>+	d->ramp_up_us = args->args[1];
>+	d->ramp_down_us = args->args[2];
>+
>+	dev_dbg(dev, "pin: %d, ramp_up_us: %d, ramp_down_us: %d\n",
>+		args->args[0], d->ramp_up_us, d->ramp_down_us);
>+
>+	return 0;
>+}
>+
>+static const struct dm_gpio_ops gpio_delay_ops = {
>+	.direction_output = gpio_delay_direction_output,
>+	.direction_input = gpio_delay_direction_input,
>+	.get_value = gpio_delay_get_value,
>+	.set_value = gpio_delay_set_value,
>+	.xlate = gpio_delay_xlate,
>+};
>+
>+static int gpio_delay_probe(struct udevice *dev)
>+{
>+	struct gpio_delay_priv *priv = dev_get_priv(dev);
>+	struct gpio_delay_desc *d;
>+	ofnode node = dev_ofnode(dev);
>+	int i = 0, ret, ngpio;
>+
>+	ngpio = gpio_get_list_count(dev, "gpios");
>+	if (ngpio < 0)
>+		return ngpio;
>+
>+	dev_dbg(dev, "gpios: %d\n", ngpio);
>+
>+	priv->descs = devm_kmalloc_array(dev, ngpio, sizeof(*d), GFP_KERNEL);
>+	if (!priv->descs)
>+		return -ENOMEM;
>+
>+	/* Request all GPIOs described in the controller node */
>+	for (i = 0; i < ngpio; i++) {
>+		d = &priv->descs[i];
>+		ret = gpio_request_by_name_nodev(node, "gpios", i,
>+						 &d->real_gpio, GPIOD_IS_OUT);

This will configure the GPIO as output and ACTIVE high/low flag will also
be used per my understanding.

Should the dir and value be deferred until set_value is invoked?

Regards,
Peng

>+		if (ret)
>+			return ret;
>+	}
>+
>+	return 0;
>+}
>+
>+static const struct udevice_id gpio_delay_ids[] = {
>+	{ .compatible = "gpio-delay" },
>+	{ }
>+};
>+
>+U_BOOT_DRIVER(gpio_delay) = {
>+	.name = "gpio-delay",
>+	.id = UCLASS_GPIO,
>+	.of_match = gpio_delay_ids,
>+	.ops = &gpio_delay_ops,
>+	.priv_auto = sizeof(struct gpio_delay_priv),
>+	.probe = gpio_delay_probe,
>+};
>-- 
>2.43.0
>

Re: [PATCH 1/3] gpio: Add GPIO delay driver

[Michal Simek]

On 1/30/26 08:21, Peng Fan wrote:
> Hi Michal,
> 
> On Thu, Jan 22, 2026 at 01:50:33PM +0100, Michal Simek wrote:
>> Add a GPIO controller driver that provides configurable delays when
>> setting GPIO output values. This is useful for hardware that requires
>> specific timing delays during power sequencing or GPIO state changes.
>>
>> The driver wraps underlying GPIO controllers and adds programmable
>> ramp-up and ramp-down delays specified in microseconds through the
>> device tree. Each GPIO can have independent delay timings.
>>
>> Device tree binding matches Linux.
>>
>> Signed-off-by: Michal Simek <michal.simek@amd.com>
>> ---
>>
>> drivers/gpio/Kconfig      |   8 +++
>> drivers/gpio/Makefile     |   1 +
>> drivers/gpio/gpio-delay.c | 133 ++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 142 insertions(+)
>> create mode 100644 drivers/gpio/gpio-delay.c
>>
>> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
>> index 60c5c54688e6..f69919abc05b 100644
>> --- a/drivers/gpio/Kconfig
>> +++ b/drivers/gpio/Kconfig
>> @@ -1,3 +1,11 @@
>> +config GPIO_DELAY
>> +	bool "GPIO delay driver"
>> +	depends on DM_GPIO
>> +	help
>> +	  Enable the GPIO delay driver.
>> +	  This driver allows wrapping another GPIO controller and inserting
>> +	  ramp-up/ramp-down delays on output changes, as described in the
>> +	  Linux gpio-delay binding.
> 
> Add an entry for SPL?

Why? I don't have a need for it and someone should test it if this should be 
used in SPL. That can be done on the top of this when tested.


>> #
>> # GPIO infrastructure and drivers
>> #
>> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
>> index 910478c0c7a9..fec258f59f52 100644
>> --- a/drivers/gpio/Makefile
>> +++ b/drivers/gpio/Makefile
>> @@ -21,6 +21,7 @@ obj-$(CONFIG_ATMEL_PIO4)	+= atmel_pio4.o
>> obj-$(CONFIG_BCM6345_GPIO)	+= bcm6345_gpio.o
>> obj-$(CONFIG_CORTINA_GPIO)      += cortina_gpio.o
>> obj-$(CONFIG_FXL6408_GPIO)	+= gpio-fxl6408.o
>> +obj-$(CONFIG_GPIO_DELAY)	+= gpio-delay.o
>> obj-$(CONFIG_INTEL_GPIO)	+= intel_gpio.o
>> obj-$(CONFIG_INTEL_ICH6_GPIO)	+= intel_ich6_gpio.o
>> obj-$(CONFIG_INTEL_BROADWELL_GPIO)	+= intel_broadwell_gpio.o
>> diff --git a/drivers/gpio/gpio-delay.c b/drivers/gpio/gpio-delay.c
>> new file mode 100644
>> index 000000000000..0c0d05ccb493
>> --- /dev/null
>> +++ b/drivers/gpio/gpio-delay.c
>> @@ -0,0 +1,133 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2025 - 2026, Advanced Micro Devices, Inc.
> 
> Drop 2025?

Why? Driver was developed in 2025 but upstreaming happens in 2026.

> 
>> + *
>> + * Michal Simek <michal.simek@amd.com>
>> + */
>> +
>> +#include <dm.h>
>> +#include <dm/device_compat.h>
>> +#include <dm/devres.h>
>> +#include <asm/gpio.h>
>> +#include <linux/delay.h>
>> +
>> +struct gpio_delay_desc {
>> +	struct gpio_desc real_gpio;
>> +	u32 ramp_up_us;
>> +	u32 ramp_down_us;
>> +};
>> +
>> +struct gpio_delay_priv {
>> +	struct gpio_delay_desc *descs;
>> +};
>> +
>> +static int gpio_delay_direction_input(struct udevice *dev, unsigned int offset)
>> +{
>> +	return -ENOSYS;
>> +}
>> +
>> +static int gpio_delay_get_value(struct udevice *dev, unsigned int offset)
>> +{
>> +	return -ENOSYS;
>> +}
>> +
>> +static int gpio_delay_set_value(struct udevice *dev, unsigned int offset,
>> +				int value)
>> +{
>> +	struct gpio_delay_priv *priv = dev_get_priv(dev);
>> +	struct gpio_delay_desc *desc = &priv->descs[offset];
>> +	int ret = dm_gpio_set_value(&desc->real_gpio, value);
>> +	u32 wait;
> 
> 
> Check return value.
> 	if (ret) {
> 		dev_err(dev, "Failed to set gpio %d\n", offset);
> 	}

will add.

> 
>> +
>> +	dev_dbg(dev, "gpio %d set to %d\n", offset, value);
>> +
>> +	if (value)
>> +		wait = desc->ramp_up_us;
>> +	else
>> +		wait = desc->ramp_down_us;
>> +
>> +	udelay(wait);
>> +
>> +	dev_dbg(dev, "waited for %d us\n", wait);
>> +
>> +	return ret;
>> +}
>> +
>> +static int gpio_delay_direction_output(struct udevice *dev, unsigned int offset,
>> +				       int value)
>> +{
>> +	return gpio_delay_set_value(dev, offset, value);
>> +}
>> +
>> +static int gpio_delay_xlate(struct udevice *dev, struct gpio_desc *desc,
>> +			    struct ofnode_phandle_args *args)
>> +{
>> +	struct gpio_delay_priv *priv = dev_get_priv(dev);
>> +
>> +	if (args->args_count < 3)
>> +		return -EINVAL;
>> +
>> +	if (args->args[0] >= 32)
>> +		return -EINVAL;
>> +
>> +	struct gpio_delay_desc *d = &priv->descs[args->args[0]];
>> +
>> +	d->ramp_up_us = args->args[1];
>> +	d->ramp_down_us = args->args[2];
>> +
>> +	dev_dbg(dev, "pin: %d, ramp_up_us: %d, ramp_down_us: %d\n",
>> +		args->args[0], d->ramp_up_us, d->ramp_down_us);
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct dm_gpio_ops gpio_delay_ops = {
>> +	.direction_output = gpio_delay_direction_output,
>> +	.direction_input = gpio_delay_direction_input,
>> +	.get_value = gpio_delay_get_value,
>> +	.set_value = gpio_delay_set_value,
>> +	.xlate = gpio_delay_xlate,
>> +};
>> +
>> +static int gpio_delay_probe(struct udevice *dev)
>> +{
>> +	struct gpio_delay_priv *priv = dev_get_priv(dev);
>> +	struct gpio_delay_desc *d;
>> +	ofnode node = dev_ofnode(dev);
>> +	int i = 0, ret, ngpio;
>> +
>> +	ngpio = gpio_get_list_count(dev, "gpios");
>> +	if (ngpio < 0)
>> +		return ngpio;
>> +
>> +	dev_dbg(dev, "gpios: %d\n", ngpio);
>> +
>> +	priv->descs = devm_kmalloc_array(dev, ngpio, sizeof(*d), GFP_KERNEL);
>> +	if (!priv->descs)
>> +		return -ENOMEM;
>> +
>> +	/* Request all GPIOs described in the controller node */
>> +	for (i = 0; i < ngpio; i++) {
>> +		d = &priv->descs[i];
>> +		ret = gpio_request_by_name_nodev(node, "gpios", i,
>> +						 &d->real_gpio, GPIOD_IS_OUT);
> 
> This will configure the GPIO as output and ACTIVE high/low flag will also
> be used per my understanding.
> 
> Should the dir and value be deferred until set_value is invoked?

It is clear that it should be output because you just setting it up later.
But I don't have any issue not to pass any flag here.
Please let me know if you want me to change it to 0.

Thanks,
Michal

Re: [PATCH 1/3] gpio: Add GPIO delay driver

[Peng Fan]

Hi Michal,

On Fri, Jan 30, 2026 at 09:29:49AM +0100, Michal Simek wrote:
>
>
>> 
>> Add an entry for SPL?
>
>Why? I don't have a need for it and someone should test it if this should be
>used in SPL. That can be done on the top of this when tested.

I see. 

>
>
>> > #
>> > + * Copyright (C) 2025 - 2026, Advanced Micro Devices, Inc.
>> 
>> Drop 2025?
>
>Why? Driver was developed in 2025 but upstreaming happens in 2026.

I think the year should start from the day of upstreaming. Not sure.
Tom may comment.

>
>> 
>> > + *
>> > +
>> > +	/* Request all GPIOs described in the controller node */
>> > +	for (i = 0; i < ngpio; i++) {
>> > +		d = &priv->descs[i];
>> > +		ret = gpio_request_by_name_nodev(node, "gpios", i,
>> > +						 &d->real_gpio, GPIOD_IS_OUT);
>> 
>> This will configure the GPIO as output and ACTIVE high/low flag will also
>> be used per my understanding.
>> 
>> Should the dir and value be deferred until set_value is invoked?
>
>It is clear that it should be output because you just setting it up later.
>But I don't have any issue not to pass any flag here.
>Please let me know if you want me to change it to 0.

Yes, please. Configure it only when user request.

Thanks,
Peng

>
>Thanks,
>Michal
>
>

Re: [PATCH 1/3] gpio: Add GPIO delay driver

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 1038 bytes --]

On Tue, Feb 03, 2026 at 09:36:19AM +0800, Peng Fan wrote:
> Hi Michal,
> 
> On Fri, Jan 30, 2026 at 09:29:49AM +0100, Michal Simek wrote:
> >
> >
> >> 
> >> Add an entry for SPL?
> >
> >Why? I don't have a need for it and someone should test it if this should be
> >used in SPL. That can be done on the top of this when tested.
> 
> I see. 
> 
> >
> >
> >> > #
> >> > + * Copyright (C) 2025 - 2026, Advanced Micro Devices, Inc.
> >> 
> >> Drop 2025?
> >
> >Why? Driver was developed in 2025 but upstreaming happens in 2026.
> 
> I think the year should start from the day of upstreaming. Not sure.
> Tom may comment.

I saw https://daniel.haxx.se/blog/2023/01/08/copyright-without-years/ go
by around January 1st and it's somewhere on my TODO list to ask what SFC
thinks about it.

So to be clear, I don't have an opinion either way on what date this
uses when upstreaming. But it might be good for the project if we can
just drop the years, which is very clearly out of scope for this patch.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH 1/3] gpio: Add GPIO delay driver

[Michal Simek]

On 2/3/26 02:06, Tom Rini wrote:
> On Tue, Feb 03, 2026 at 09:36:19AM +0800, Peng Fan wrote:
>> Hi Michal,
>>
>> On Fri, Jan 30, 2026 at 09:29:49AM +0100, Michal Simek wrote:
>>>
>>>
>>>>
>>>> Add an entry for SPL?
>>>
>>> Why? I don't have a need for it and someone should test it if this should be
>>> used in SPL. That can be done on the top of this when tested.
>>
>> I see.
>>
>>>
>>>
>>>>> #
>>>>> + * Copyright (C) 2025 - 2026, Advanced Micro Devices, Inc.
>>>>
>>>> Drop 2025?
>>>
>>> Why? Driver was developed in 2025 but upstreaming happens in 2026.
>>
>> I think the year should start from the day of upstreaming. Not sure.
>> Tom may comment.
> 
> I saw https://daniel.haxx.se/blog/2023/01/08/copyright-without-years/ go
> by around January 1st and it's somewhere on my TODO list to ask what SFC
> thinks about it.
> 
> So to be clear, I don't have an opinion either way on what date this
> uses when upstreaming. But it might be good for the project if we can
> just drop the years, which is very clearly out of scope for this patch.
> 

Driver was developed 2025 and sent 2026. We have a lot of downstream patches 
which were developed some time ago and then later sent but I can't remember any 
ask to drop previous years. Definitely people are asking to update year to match 
year when driver was sent.
And there could be a lot of development done before too.

If driver is taken from 3rd party/contributor likely you have to keep their 
origin copyright and years too. You can't remove their copyright with old date too.

I don't think there is a need to remove previous year or asking to do it.

Thanks,
Michal

[PATCH 2/3] xilinx: Enable GPIO delay driver on Kria platforms

[Michal Simek]

GPIO delay driver is necessary to use to extend delay times for USB hubs
available on the Kria platforms.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 configs/xilinx_zynqmp_kria_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
index 8ad05e371892..1e0728fa4f3f 100644
--- a/configs/xilinx_zynqmp_kria_defconfig
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -136,6 +136,7 @@ CONFIG_XILINX_DPDMA=y
 CONFIG_ARM_FFA_TRANSPORT=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_GPIO_DELAY=y
 CONFIG_GPIO_HOG=y
 CONFIG_XILINX_GPIO=y
 CONFIG_DM_PCA953X=y
-- 
2.43.0

[PATCH 3/3] arm64: zynqmp: Wire gpio-delay driver for USB hub reset

[Michal Simek]

USB hub requires longer delay to get out of the reason to work properly
that's why use gpio-delay to ensure enough waiting time.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 13 ++++++++++---
 arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 16 ++++++++++++----
 arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 16 ++++++++++++----
 arch/arm/dts/zynqmp-sck-kv-g-revA.dtso | 13 ++++++++++---
 arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 11 +++++++++--
 5 files changed, 53 insertions(+), 16 deletions(-)

diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 832dc5ab2458..8342479b108a 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -3,7 +3,7 @@
  * dts file for KD240 revA Carrier Card
  *
  * Copyright (C) 2021 - 2022, Xilinx, Inc.
- * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
+ * Copyright (C) 2022 - 2026, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  */
@@ -43,6 +43,13 @@
 		#clock-cells = <0>;
 		clock-frequency = <25000000>;
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &can0 {
@@ -116,7 +123,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -125,7 +132,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
index 532f6bf92bc5..db042ffb4f36 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
@@ -77,6 +77,14 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>,
+			<&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -187,7 +195,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -196,7 +204,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
@@ -224,7 +232,7 @@
 		reg = <1>;
 		peer-hub = <&hub1_3_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -233,7 +241,7 @@
 		reg = <2>;
 		peer-hub = <&hub1_2_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 458d79e81192..e3567d0abfe0 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -78,6 +78,14 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>,
+			<&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -188,7 +196,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -197,7 +205,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
@@ -225,7 +233,7 @@
 		reg = <1>;
 		peer-hub = <&hub1_3_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -234,7 +242,7 @@
 		reg = <2>;
 		peer-hub = <&hub1_2_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
index e7417af8ae01..f93c7460a552 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
@@ -3,7 +3,7 @@
  * dts file for KV260 revA Carrier Card
  *
  * (C) Copyright 2020 - 2022, Xilinx, Inc.
- * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
+ * (C) Copyright 2022 - 2026, Advanced Micro Devices, Inc.
  *
  * SD level shifter:
  * "A" - A01 board un-modified (NXP)
@@ -78,6 +78,13 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -161,7 +168,7 @@
 		compatible = "usb424,2744";
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -169,7 +176,7 @@
 		compatible = "usb424,5744";
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index 7a05180e58b4..70de6933600e 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -74,6 +74,13 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -148,7 +155,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -157,7 +164,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
-- 
2.43.0

RE: [PATCH 3/3] arm64: zynqmp: Wire gpio-delay driver for USB hub reset

[Pandey, Radhey Shyam]

[AMD Official Use Only - AMD Internal Distribution Only]

> -----Original Message-----
> From: Michal Simek <michal.simek@amd.com>
> Sent: Thursday, January 22, 2026 6:21 PM
> To: u-boot@lists.denx.de; git (AMD-Xilinx) <git@amd.com>
> Cc: Naroju, Nithish Kumar <NithishKumar.Naroju@amd.com>; Visavalia, Rohit
> <rohit.visavalia@amd.com>; Tom Rini <trini@konsulko.com>
> Subject: [PATCH 3/3] arm64: zynqmp: Wire gpio-delay driver for USB hub reset
>
> USB hub requires longer delay to get out of the reason to work properly that's why

Nit - reason -> reset

> use gpio-delay to ensure enough waiting time.
>
> Signed-off-by: Michal Simek <michal.simek@amd.com>

Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>

> ---
>
>  arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 13 ++++++++++---
> arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 16 ++++++++++++----
> arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 16 ++++++++++++----
> arch/arm/dts/zynqmp-sck-kv-g-revA.dtso | 13 ++++++++++---  arch/arm/dts/zynqmp-
> sck-kv-g-revB.dtso | 11 +++++++++--
>  5 files changed, 53 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-
> revA.dtso
> index 832dc5ab2458..8342479b108a 100644
> --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
> @@ -3,7 +3,7 @@
>   * dts file for KD240 revA Carrier Card
>   *
>   * Copyright (C) 2021 - 2022, Xilinx, Inc.
> - * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
> + * Copyright (C) 2022 - 2026, Advanced Micro Devices, Inc.
>   *
>   * Michal Simek <michal.simek@amd.com>
>   */
> @@ -43,6 +43,13 @@
>               #clock-cells = <0>;
>               clock-frequency = <25000000>;
>       };
> +
> +     slg_delay: enable-delay {
> +             compatible = "gpio-delay";
> +             #gpio-cells = <3>;
> +             gpio-controller;
> +             gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
> +     };
>  };
>
>  &can0 {
> @@ -116,7 +123,7 @@
>               reg = <1>;
>               peer-hub = <&hub_3_0>;
>               i2c-bus = <&hub>;
> -             reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>
>       /* 3.0 hub on port 2 */
> @@ -125,7 +132,7 @@
>               reg = <2>;
>               peer-hub = <&hub_2_0>;
>               i2c-bus = <&hub>;
> -             reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>  };
>
> diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-
> revA.dtso
> index 532f6bf92bc5..db042ffb4f36 100644
> --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
> @@ -77,6 +77,14 @@
>                       };
>               };
>       };
> +
> +     slg_delay: enable-delay {
> +             compatible = "gpio-delay";
> +             #gpio-cells = <3>;
> +             gpio-controller;
> +             gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>,
> +                     <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
> +     };
>  };
>
>  &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ @@ -187,7 +195,7 @@
>               reg = <1>;
>               peer-hub = <&hub_3_0>;
>               i2c-bus = <&hub_1>;
> -             reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>
>       /* 3.0 hub on port 2 */
> @@ -196,7 +204,7 @@
>               reg = <2>;
>               peer-hub = <&hub_2_0>;
>               i2c-bus = <&hub_1>;
> -             reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>  };
>
> @@ -224,7 +232,7 @@
>               reg = <1>;
>               peer-hub = <&hub1_3_0>;
>               i2c-bus = <&hub_2>;
> -             reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 1 10000 10000>;
>       };
>
>       /* 3.0 hub on port 2 */
> @@ -233,7 +241,7 @@
>               reg = <2>;
>               peer-hub = <&hub1_2_0>;
>               i2c-bus = <&hub_2>;
> -             reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 1 10000 10000>;
>       };
>  };
>
> diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-
> revB.dtso
> index 458d79e81192..e3567d0abfe0 100644
> --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> @@ -78,6 +78,14 @@
>                       };
>               };
>       };
> +
> +     slg_delay: enable-delay {
> +             compatible = "gpio-delay";
> +             #gpio-cells = <3>;
> +             gpio-controller;
> +             gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>,
> +                     <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
> +     };
>  };
>
>  &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ @@ -188,7 +196,7 @@
>               reg = <1>;
>               peer-hub = <&hub_3_0>;
>               i2c-bus = <&hub_1>;
> -             reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>
>       /* 3.0 hub on port 2 */
> @@ -197,7 +205,7 @@
>               reg = <2>;
>               peer-hub = <&hub_2_0>;
>               i2c-bus = <&hub_1>;
> -             reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>  };
>
> @@ -225,7 +233,7 @@
>               reg = <1>;
>               peer-hub = <&hub1_3_0>;
>               i2c-bus = <&hub_2>;
> -             reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 1 10000 10000>;
>       };
>
>       /* 3.0 hub on port 2 */
> @@ -234,7 +242,7 @@
>               reg = <2>;
>               peer-hub = <&hub1_2_0>;
>               i2c-bus = <&hub_2>;
> -             reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 1 10000 10000>;
>       };
>  };
>
> diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-
> revA.dtso
> index e7417af8ae01..f93c7460a552 100644
> --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
> @@ -3,7 +3,7 @@
>   * dts file for KV260 revA Carrier Card
>   *
>   * (C) Copyright 2020 - 2022, Xilinx, Inc.
> - * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
> + * (C) Copyright 2022 - 2026, Advanced Micro Devices, Inc.
>   *
>   * SD level shifter:
>   * "A" - A01 board un-modified (NXP)
> @@ -78,6 +78,13 @@
>                       };
>               };
>       };
> +
> +     slg_delay: enable-delay {
> +             compatible = "gpio-delay";
> +             #gpio-cells = <3>;
> +             gpio-controller;
> +             gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
> +     };
>  };
>
>  &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -161,7 +168,7 @@
>               compatible = "usb424,2744";
>               reg = <1>;
>               peer-hub = <&hub_3_0>;
> -             reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>
>       /* 3.0 hub on port 2 */
> @@ -169,7 +176,7 @@
>               compatible = "usb424,5744";
>               reg = <2>;
>               peer-hub = <&hub_2_0>;
> -             reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>  };
>
> diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-
> revB.dtso
> index 7a05180e58b4..70de6933600e 100644
> --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
> @@ -74,6 +74,13 @@
>                       };
>               };
>       };
> +
> +     slg_delay: enable-delay {
> +             compatible = "gpio-delay";
> +             #gpio-cells = <3>;
> +             gpio-controller;
> +             gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
> +     };
>  };
>
>  &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -148,7 +155,7 @@
>               reg = <1>;
>               peer-hub = <&hub_3_0>;
>               i2c-bus = <&hub>;
> -             reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>
>       /* 3.0 hub on port 2 */
> @@ -157,7 +164,7 @@
>               reg = <2>;
>               peer-hub = <&hub_2_0>;
>               i2c-bus = <&hub>;
> -             reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
> +             reset-gpios = <&slg_delay 0 10000 10000>;
>       };
>  };
>
> --
> 2.43.0