* [PATCH v1] drivers: fpga: Enable SOC64 support, remove Agilex/Stratix10 checks for FPGA bridge
@ 2026-02-05 1:58 Chen Huei Lok
2026-02-05 7:29 ` Peng Fan
0 siblings, 1 reply; 3+ messages in thread
From: Chen Huei Lok @ 2026-02-05 1:58 UTC (permalink / raw)
To: u-boot
Cc: Michal Simek, Tom Rini, Alexander Dahl, drosdi, Tien Fong Chee,
Alif Zakuan Yuslaimi, Dinesh Maniyam, Boon Khai Ng, Kok Kiang Hea,
Chen Huei Lok
From: drosdi <danish.ahmad.rosdi@altera.com>
Replace the conditional compilation checks for Agilex and Stratix10
with a check for SOC64 in `drivers/fpga/altera.c`.
Signed-off-by: drosdi <danish.ahmad.rosdi@altera.com>
Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
---
drivers/fpga/altera.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 4a9aa74357e..246df72cb89 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -12,8 +12,7 @@
/*
* Altera FPGA support
*/
-#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) || \
- IS_ENABLED(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_SOC64)
#include <asm/arch/misc.h>
#endif
#include <errno.h>
@@ -48,8 +47,7 @@ static const struct altera_fpga {
#endif
};
-#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) || \
- IS_ENABLED(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_SOC64)
int fpga_is_partial_data(int devnum, size_t img_len)
{
/*
--
2.43.7
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v1] drivers: fpga: Enable SOC64 support, remove Agilex/Stratix10 checks for FPGA bridge
2026-02-05 1:58 [PATCH v1] drivers: fpga: Enable SOC64 support, remove Agilex/Stratix10 checks for FPGA bridge Chen Huei Lok
@ 2026-02-05 7:29 ` Peng Fan
2026-02-05 9:50 ` Lok, Chen Huei
0 siblings, 1 reply; 3+ messages in thread
From: Peng Fan @ 2026-02-05 7:29 UTC (permalink / raw)
To: Chen Huei Lok
Cc: u-boot, Michal Simek, Tom Rini, Alexander Dahl, drosdi,
Tien Fong Chee, Alif Zakuan Yuslaimi, Dinesh Maniyam,
Boon Khai Ng, Kok Kiang Hea
On Thu, Feb 05, 2026 at 09:58:23AM +0800, Chen Huei Lok wrote:
>From: drosdi <danish.ahmad.rosdi@altera.com>
>
>Replace the conditional compilation checks for Agilex and Stratix10
>with a check for SOC64 in `drivers/fpga/altera.c`.
Add an explaination on why this change.
Regards
Peng
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH v1] drivers: fpga: Enable SOC64 support, remove Agilex/Stratix10 checks for FPGA bridge
2026-02-05 7:29 ` Peng Fan
@ 2026-02-05 9:50 ` Lok, Chen Huei
0 siblings, 0 replies; 3+ messages in thread
From: Lok, Chen Huei @ 2026-02-05 9:50 UTC (permalink / raw)
To: Peng Fan
Cc: u-boot@lists.denx.de, Michal Simek, Tom Rini, Alexander Dahl,
Rosdi, Danish Ahmad, Chee, Tien Fong, Yuslaimi, Alif Zakuan,
Maniyam, Dinesh, Ng, Boon Khai, Hea, Kok Kiang
Hi Peng,
> On Thu, Feb 05, 2026 at 09:58:23AM +0800, Chen Huei Lok wrote:
> >From: drosdi <danish.ahmad.rosdi@altera.com>
> >
> >Replace the conditional compilation checks for Agilex and Stratix10
> >with a check for SOC64 in `drivers/fpga/altera.c`.
>
> Add an explaination on why this change.
>
> Regards
> Peng
Thanks for the comment.
The change replaces the Agilex/Stratix10 checks with a SOC64 check
because this code applies not only to Stratix10 and Agilex, but also
to Agilex7M and Agilex5, which are SOC64 devices. Consolidating the
check simplifies the code and ensures it covers all relevant SOC64
platforms.
I will reword the commit message and reflect it in v2.
Best regards,
Lok
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-02-05 1:58 [PATCH v1] drivers: fpga: Enable SOC64 support, remove Agilex/Stratix10 checks for FPGA bridge Chen Huei Lok
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2026-02-05 9:50 ` Lok, Chen Huei
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