[PATCH] driver: cache: Remove SiFive PL2 driver

[PATCH] driver: cache: Remove SiFive PL2 driver

[Jimmy Ho]

From: Nick Hu <nick.hu@sifive.com>

Under single core boot platform, the secondary cores won't enter the
u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
---
 arch/riscv/lib/sifive_cache.c | 3 ---
 drivers/cache/Kconfig         | 6 ------
 drivers/cache/Makefile        | 1 -
 3 files changed, 10 deletions(-)

diff --git a/arch/riscv/lib/sifive_cache.c b/arch/riscv/lib/sifive_cache.c
index d74544b93d8..9a0519af494 100644
--- a/arch/riscv/lib/sifive_cache.c
+++ b/arch/riscv/lib/sifive_cache.c
@@ -41,8 +41,5 @@ static inline void probe_cache_device(struct driver *driver, struct udevice *dev
 
 void enable_caches(void)
 {
-	struct udevice *dev = NULL;
-
-	probe_cache_device(DM_DRIVER_GET(sifive_pl2), dev);
 }
 #endif /* !CONFIG_XPL_BUILD */
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
index 4f358657444..28446c479dc 100644
--- a/drivers/cache/Kconfig
+++ b/drivers/cache/Kconfig
@@ -45,11 +45,5 @@ config SIFIVE_CCACHE
 	  This driver is for SiFive Composable L2/L3 cache. It enables cache
 	  ways of composable cache.
 
-config SIFIVE_PL2
-	bool "SiFive private L2 cache"
-	select CACHE
-	help
-	  This driver is for SiFive Private L2 cache. It configures registers
-	  to enable the clock gating feature.
 
 endmenu
diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile
index 2f683866b87..05ad7d8a33e 100644
--- a/drivers/cache/Makefile
+++ b/drivers/cache/Makefile
@@ -5,4 +5,3 @@ obj-$(CONFIG_L2X0_CACHE) += cache-l2x0.o
 obj-$(CONFIG_NCORE_CACHE) += cache-ncore.o
 obj-$(CONFIG_ANDES_L2_CACHE) += cache-andes-l2.o
 obj-$(CONFIG_SIFIVE_CCACHE) += cache-sifive-ccache.o
-obj-$(CONFIG_SIFIVE_PL2) += cache-sifive-pl2.o
-- 
2.43.7

Re: [PATCH] driver: cache: Remove SiFive PL2 driver

[Jimmy Ho]

just a friendly ping to see if you've had a chance to look at this.

Best regards, jimmy ho

On Mon, Jan 19, 2026 at 1:55 PM Jimmy Ho <jimmy.ho@sifive.com> wrote:
>
> From: Nick Hu <nick.hu@sifive.com>
>
> Under single core boot platform, the secondary cores won't enter the
> u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi.
>
> Signed-off-by: Nick Hu <nick.hu@sifive.com>
> Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
> ---
>  arch/riscv/lib/sifive_cache.c | 3 ---
>  drivers/cache/Kconfig         | 6 ------
>  drivers/cache/Makefile        | 1 -
>  3 files changed, 10 deletions(-)
>
> diff --git a/arch/riscv/lib/sifive_cache.c b/arch/riscv/lib/sifive_cache.c
> index d74544b93d8..9a0519af494 100644
> --- a/arch/riscv/lib/sifive_cache.c
> +++ b/arch/riscv/lib/sifive_cache.c
> @@ -41,8 +41,5 @@ static inline void probe_cache_device(struct driver *driver, struct udevice *dev
>
>  void enable_caches(void)
>  {
> -       struct udevice *dev = NULL;
> -
> -       probe_cache_device(DM_DRIVER_GET(sifive_pl2), dev);
>  }
>  #endif /* !CONFIG_XPL_BUILD */
> diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
> index 4f358657444..28446c479dc 100644
> --- a/drivers/cache/Kconfig
> +++ b/drivers/cache/Kconfig
> @@ -45,11 +45,5 @@ config SIFIVE_CCACHE
>           This driver is for SiFive Composable L2/L3 cache. It enables cache
>           ways of composable cache.
>
> -config SIFIVE_PL2
> -       bool "SiFive private L2 cache"
> -       select CACHE
> -       help
> -         This driver is for SiFive Private L2 cache. It configures registers
> -         to enable the clock gating feature.
>
>  endmenu
> diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile
> index 2f683866b87..05ad7d8a33e 100644
> --- a/drivers/cache/Makefile
> +++ b/drivers/cache/Makefile
> @@ -5,4 +5,3 @@ obj-$(CONFIG_L2X0_CACHE) += cache-l2x0.o
>  obj-$(CONFIG_NCORE_CACHE) += cache-ncore.o
>  obj-$(CONFIG_ANDES_L2_CACHE) += cache-andes-l2.o
>  obj-$(CONFIG_SIFIVE_CCACHE) += cache-sifive-ccache.o
> -obj-$(CONFIG_SIFIVE_PL2) += cache-sifive-pl2.o
> --
> 2.43.7
>

Re: [PATCH] driver: cache: Remove SiFive PL2 driver

[Leo Liang]

On Mon, Jan 19, 2026 at 01:55:23PM +0800, Jimmy Ho wrote:
> From: Nick Hu <nick.hu@sifive.com>
> 
> Under single core boot platform, the secondary cores won't enter the
> u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi.
> 
> Signed-off-by: Nick Hu <nick.hu@sifive.com>
> Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
> ---
>  arch/riscv/lib/sifive_cache.c | 3 ---
>  drivers/cache/Kconfig         | 6 ------
>  drivers/cache/Makefile        | 1 -
>  3 files changed, 10 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

Re: [PATCH] driver: cache: Remove SiFive PL2 driver

[Jimmy Ho]

just a friendly ping to see if this can be merged

Best regards, jimmy ho

On Mon, Feb 9, 2026 at 7:19 PM Leo Liang <ycliang@andestech.com> wrote:
>
> On Mon, Jan 19, 2026 at 01:55:23PM +0800, Jimmy Ho wrote:
> > From: Nick Hu <nick.hu@sifive.com>
> >
> > Under single core boot platform, the secondary cores won't enter the
> > u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi.
> >
> > Signed-off-by: Nick Hu <nick.hu@sifive.com>
> > Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
> > ---
> >  arch/riscv/lib/sifive_cache.c | 3 ---
> >  drivers/cache/Kconfig         | 6 ------
> >  drivers/cache/Makefile        | 1 -
> >  3 files changed, 10 deletions(-)
>
> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>