[PATCH 0/4] i.MX8MP: Convert to DM_PMIC for a few boards

[PATCH 0/4] i.MX8MP: Convert to DM_PMIC for a few boards

[Peng Fan (OSS)]

Per the thread [1] that Tom asks.

Convert to DM_PMIC for icore-edimm2.2, libra-fpsc, verdin and
phyboard-pollux-rdk.

I not have the boards to test, so just my best practice to do the
migration.

For i.MX8MQ boards that still using SPL_POWER_LEGACY, it is a bit different,
because the OCRAM is a bit small, I need find more time to check on it.

[1] https://lore.kernel.org/u-boot/20260320214518.GD502704@bill-the-cat/

CI: https://github.com/u-boot/u-boot/pull/916

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Peng Fan (4):
      imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC
      imx8mp: verdin: Convert to DM_PMIC
      imx8mp: libra-fpsc: Convert to DM_PMIC
      imx8mp: icore-edimm2.2: Convert to DM_PMIC

 .../dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi    | 18 ++++++-
 arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi     | 16 ++++++-
 .../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 16 ++++++-
 arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi    | 14 ++++--
 board/engicam/imx8mp/spl.c                         | 53 +++++++--------------
 board/phytec/imx8mp-libra-fpsc/spl.c               | 46 ++++++------------
 board/phytec/phycore_imx8mp/spl.c                  | 43 ++++++-----------
 board/toradex/verdin-imx8mp/spl.c                  | 55 +++++++---------------
 configs/imx8mp-icore-mx8mp-edimm2.2_defconfig      | 12 ++---
 configs/imx8mp-libra-fpsc_defconfig                | 10 ++--
 configs/phycore-imx8mp_defconfig                   | 10 ++--
 configs/verdin-imx8mp_defconfig                    | 13 ++---
 12 files changed, 133 insertions(+), 173 deletions(-)
---
base-commit: eb00c710508d09b2a3b9aca75dd18280f1304703
change-id: 20260323-power-legacy-5928e4f1dbb9

Best regards,
-- 
Peng Fan <peng.fan@nxp.com>

[PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 16 +++++++-
 board/phytec/phycore_imx8mp/spl.c                  | 43 +++++++---------------
 configs/phycore-imx8mp_defconfig                   | 10 ++---
 3 files changed, 32 insertions(+), 37 deletions(-)

diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
index 4804a204e92..871e7fd674d 100644
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
@@ -34,6 +34,18 @@
 	};
 };
 
+&pinctrl_i2c1 {
+	bootph-all;
+};
+
+&pinctrl_pmic {
+	bootph-all;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
+	bootph-all;
+};
+
 &reg_usdhc2_vmmc {
 	bootph-pre-ram;
 };
@@ -83,11 +95,11 @@
 };
 
 &i2c1 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &pmic {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &usb_dwc3_0 {
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index fc7aefd0073..fc6f5104925 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -117,45 +117,32 @@ out:
 	ddr_init(&dram_timing);
 }
 
-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
-		.gp = IMX_GPIO_NR(5, 14),
-	},
-	.sda = {
-		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
-		.gp = IMX_GPIO_NR(5, 15),
-	},
-};
-
 int power_init_board(void)
 {
-	struct pmic *p;
+	struct udevice *dev;
 	int ret;
 
-	ret = power_pca9450_init(0, 0x25);
-	if (ret)
-		printf("power init failed");
-	p = pmic_get("PCA9450");
-	pmic_probe(p);
+	ret = pmic_get("pmic@25", &dev);
+	if (ret == -ENODEV) {
+		puts("No pmic@25\n");
+		return 0;
+	}
+	if (ret < 0)
+		return ret;
 
 	/* BUCKxOUT_DVS0/1 control BUCK123 output */
-	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
 
 	/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
-	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
+	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
 
 	/* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
-	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
 
 	/* Set WDOG_B_CFG to cold reset */
-	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
+	pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
 
 	return 0;
 }
@@ -193,8 +180,6 @@ void board_init_f(ulong dummy)
 
 	enable_tzc380();
 
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
 	power_init_board();
 
 	/* DDR initialization */
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 2fcf7db9e5c..51d9737afb3 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -10,7 +10,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x3C0000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk"
 CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000
@@ -113,8 +112,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
 CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
 CONFIG_MXC_GPIO=y
 CONFIG_DM_I2C=y
-# CONFIG_SPL_DM_I2C is not set
-CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x51
 CONFIG_SUPPORT_EMMC_BOOT=y
@@ -144,15 +141,16 @@ CONFIG_PHY_IMX8MQ_USB=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
-CONFIG_SPL_POWER_LEGACY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_IMX8M_POWER_DOMAIN=y
 CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
-CONFIG_POWER_PCA9450=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
 CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PCA9450=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_POWER_I2C=y
 CONFIG_DM_RNG=y
 CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y

-- 
2.51.0

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Yannic Moog]

Hi Peng,

On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
> handling.
> 
> Changes include:
> - Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
> - Drop legacy SPL I2C and PMIC options.
> - Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
> - Use DM-based pmic_get() with the DT node "pmic@25".
> - Update PMIC register programming to use struct udevice API.

these changes break something.

Getting

Loading Environment from MMC... Card did not respond to voltage select! : -110
*** Warning - No block device, using default environment

and SD card is not accessible as a result. I also worked on this modernization and got the same
result as with your commit. Have not had time to investigate the cause, yet.

Yannic

> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 16 +++++++-
>  board/phytec/phycore_imx8mp/spl.c                  | 43 +++++++---------------
>  configs/phycore-imx8mp_defconfig                   | 10 ++---
>  3 files changed, 32 insertions(+), 37 deletions(-)
> 
> diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi b/arch/arm/dts/imx8mp-phyboard-
> pollux-rdk-u-boot.dtsi
> index 4804a204e92..871e7fd674d 100644
> --- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> @@ -34,6 +34,18 @@
>  	};
>  };
>  
> +&pinctrl_i2c1 {
> +	bootph-all;
> +};
> +
> +&pinctrl_pmic {
> +	bootph-all;
> +};
> +
> +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
> +	bootph-all;
> +};
> +
>  &reg_usdhc2_vmmc {
>  	bootph-pre-ram;
>  };
> @@ -83,11 +95,11 @@
>  };
>  
>  &i2c1 {
> -	bootph-pre-ram;
> +	bootph-all;
>  };
>  
>  &pmic {
> -	bootph-pre-ram;
> +	bootph-all;
>  };
>  
>  &usb_dwc3_0 {
> diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
> index fc7aefd0073..fc6f5104925 100644
> --- a/board/phytec/phycore_imx8mp/spl.c
> +++ b/board/phytec/phycore_imx8mp/spl.c
> @@ -117,45 +117,32 @@ out:
>  	ddr_init(&dram_timing);
>  }
>  
> -#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
> -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
> -struct i2c_pads_info i2c_pad_info1 = {
> -	.scl = {
> -		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
> -		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
> -		.gp = IMX_GPIO_NR(5, 14),
> -	},
> -	.sda = {
> -		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
> -		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
> -		.gp = IMX_GPIO_NR(5, 15),
> -	},
> -};
> -
>  int power_init_board(void)
>  {
> -	struct pmic *p;
> +	struct udevice *dev;
>  	int ret;
>  
> -	ret = power_pca9450_init(0, 0x25);
> -	if (ret)
> -		printf("power init failed");
> -	p = pmic_get("PCA9450");
> -	pmic_probe(p);
> +	ret = pmic_get("pmic@25", &dev);
> +	if (ret == -ENODEV) {
> +		puts("No pmic@25\n");
> +		return 0;
> +	}
> +	if (ret < 0)
> +		return ret;
>  
>  	/* BUCKxOUT_DVS0/1 control BUCK123 output */
> -	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
> +	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
>  
>  	/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
> -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
> -	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
> +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
> +	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
>  
>  	/* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */
> -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
> -	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
> +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
> +	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
>  
>  	/* Set WDOG_B_CFG to cold reset */
> -	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
> +	pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
>  
>  	return 0;
>  }
> @@ -193,8 +180,6 @@ void board_init_f(ulong dummy)
>  
>  	enable_tzc380();
>  
> -	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
> -
>  	power_init_board();
>  
>  	/* DDR initialization */
> diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
> index 2fcf7db9e5c..51d9737afb3 100644
> --- a/configs/phycore-imx8mp_defconfig
> +++ b/configs/phycore-imx8mp_defconfig
> @@ -10,7 +10,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000
>  CONFIG_ENV_SIZE=0x10000
>  CONFIG_ENV_OFFSET=0x3C0000
>  CONFIG_ENV_SECT_SIZE=0x10000
> -CONFIG_SYS_I2C_MXC_I2C1=y
>  CONFIG_DM_GPIO=y
>  CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk"
>  CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000
> @@ -113,8 +112,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
>  CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
>  CONFIG_MXC_GPIO=y
>  CONFIG_DM_I2C=y
> -# CONFIG_SPL_DM_I2C is not set
> -CONFIG_SPL_SYS_I2C_LEGACY=y
>  CONFIG_I2C_EEPROM=y
>  CONFIG_SYS_I2C_EEPROM_ADDR=0x51
>  CONFIG_SUPPORT_EMMC_BOOT=y
> @@ -144,15 +141,16 @@ CONFIG_PHY_IMX8MQ_USB=y
>  CONFIG_PINCTRL=y
>  CONFIG_SPL_PINCTRL=y
>  CONFIG_PINCTRL_IMX8M=y
> -CONFIG_SPL_POWER_LEGACY=y
>  CONFIG_POWER_DOMAIN=y
>  CONFIG_IMX8M_POWER_DOMAIN=y
>  CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
> -CONFIG_POWER_PCA9450=y
> +CONFIG_DM_PMIC=y
> +CONFIG_DM_PMIC_PCA9450=y
> +CONFIG_SPL_DM_PMIC_PCA9450=y
>  CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_PCA9450=y
>  CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
> -CONFIG_SPL_POWER_I2C=y
>  CONFIG_DM_RNG=y
>  CONFIG_DM_SERIAL=y
>  CONFIG_MXC_UART=y

RE: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan]

Hi Yannic,

> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
> DM_PMIC
> 
> Hi Peng,
> 
> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Convert the board to use DM_PMIC instead of the legacy SPL
> I2C/PMIC
> > handling.
> >
> > Changes include:
> > - Enable DM_PMIC, DM_PMIC_PCA9450, and
> SPL_DM_PMIC_PCA9450 in defconfig.
> > - Drop legacy SPL I2C and PMIC options.
> > - Remove manual I2C1 pad setup and legacy power_pca9450_init()
> usage.
> > - Use DM-based pmic_get() with the DT node "pmic@25".
> > - Update PMIC register programming to use struct udevice API.
> 
> these changes break something.
> 
> Getting
> 
> Loading Environment from MMC... Card did not respond to voltage
> select! : -110
> *** Warning - No block device, using default environment
> 
> and SD card is not accessible as a result. I also worked on this
> modernization and got the same result as with your commit. Have not
> had time to investigate the cause, yet.

This change should not impact sd, unless pmic not probe correctly.
You may give a look on "regulators", "pmic" in U-Boot shell,
to see whether pmic is good.

And you may also need to confirm, whether SD works or not
without this migration to DM_PMIC.

Thanks,
Peng.

> 
> Yannic
> 
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 16 +++++++-
> >  board/phytec/phycore_imx8mp/spl.c                  | 43
> > +++++++---------------
> >  configs/phycore-imx8mp_defconfig                   | 10 ++---
> >  3 files changed, 32 insertions(+), 37 deletions(-)
> >
> > diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > b/arch/arm/dts/imx8mp-phyboard- pollux-rdk-u-boot.dtsi index
> > 4804a204e92..871e7fd674d 100644
> > --- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > @@ -34,6 +34,18 @@
> >  	};
> >  };
> >
> > +&pinctrl_i2c1 {
> > +	bootph-all;
> > +};
> > +
> > +&pinctrl_pmic {
> > +	bootph-all;
> > +};
> > +
> > +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
> > +	bootph-all;
> > +};
> > +
> >  &reg_usdhc2_vmmc {
> >  	bootph-pre-ram;
> >  };
> > @@ -83,11 +95,11 @@
> >  };
> >
> >  &i2c1 {
> > -	bootph-pre-ram;
> > +	bootph-all;
> >  };
> >
> >  &pmic {
> > -	bootph-pre-ram;
> > +	bootph-all;
> >  };
> >
> >  &usb_dwc3_0 {
> > diff --git a/board/phytec/phycore_imx8mp/spl.c
> > b/board/phytec/phycore_imx8mp/spl.c
> > index fc7aefd0073..fc6f5104925 100644
> > --- a/board/phytec/phycore_imx8mp/spl.c
> > +++ b/board/phytec/phycore_imx8mp/spl.c
> > @@ -117,45 +117,32 @@ out:
> >  	ddr_init(&dram_timing);
> >  }
> >
> > -#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS |
> PAD_CTL_PUE |
> > PAD_CTL_PE) -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -struct
> > i2c_pads_info i2c_pad_info1 = {
> > -	.scl = {
> > -		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
> > -		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 |
> PC,
> > -		.gp = IMX_GPIO_NR(5, 14),
> > -	},
> > -	.sda = {
> > -		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
> > -		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15
> | PC,
> > -		.gp = IMX_GPIO_NR(5, 15),
> > -	},
> > -};
> > -
> >  int power_init_board(void)
> >  {
> > -	struct pmic *p;
> > +	struct udevice *dev;
> >  	int ret;
> >
> > -	ret = power_pca9450_init(0, 0x25);
> > -	if (ret)
> > -		printf("power init failed");
> > -	p = pmic_get("PCA9450");
> > -	pmic_probe(p);
> > +	ret = pmic_get("pmic@25", &dev);
> > +	if (ret == -ENODEV) {
> > +		puts("No pmic@25\n");
> > +		return 0;
> > +	}
> > +	if (ret < 0)
> > +		return ret;
> >
> >  	/* BUCKxOUT_DVS0/1 control BUCK123 output */
> > -	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
> > +	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
> >
> >  	/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
> > -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
> > -	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
> > +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
> > +	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
> >
> >  	/* Set BUCK1 DVS1 to suspend controlled through
> PMIC_STBY_REQ */
> > -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
> > -	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
> > +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
> > +	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
> >
> >  	/* Set WDOG_B_CFG to cold reset */
> > -	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
> > +	pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
> >
> >  	return 0;
> >  }
> > @@ -193,8 +180,6 @@ void board_init_f(ulong dummy)
> >
> >  	enable_tzc380();
> >
> > -	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
> > -
> >  	power_init_board();
> >
> >  	/* DDR initialization */
> > diff --git a/configs/phycore-imx8mp_defconfig
> > b/configs/phycore-imx8mp_defconfig
> > index 2fcf7db9e5c..51d9737afb3 100644
> > --- a/configs/phycore-imx8mp_defconfig
> > +++ b/configs/phycore-imx8mp_defconfig
> > @@ -10,7 +10,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000
> >  CONFIG_ENV_SIZE=0x10000
> >  CONFIG_ENV_OFFSET=0x3C0000
> >  CONFIG_ENV_SECT_SIZE=0x10000
> > -CONFIG_SYS_I2C_MXC_I2C1=y
> >  CONFIG_DM_GPIO=y
> >  CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-
> pollux-rdk"
> >  CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000
> > @@ -113,8 +112,6 @@
> CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
> >  CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
> >  CONFIG_MXC_GPIO=y
> >  CONFIG_DM_I2C=y
> > -# CONFIG_SPL_DM_I2C is not set
> > -CONFIG_SPL_SYS_I2C_LEGACY=y
> >  CONFIG_I2C_EEPROM=y
> >  CONFIG_SYS_I2C_EEPROM_ADDR=0x51
> >  CONFIG_SUPPORT_EMMC_BOOT=y
> > @@ -144,15 +141,16 @@ CONFIG_PHY_IMX8MQ_USB=y
> >  CONFIG_PINCTRL=y
> >  CONFIG_SPL_PINCTRL=y
> >  CONFIG_PINCTRL_IMX8M=y
> > -CONFIG_SPL_POWER_LEGACY=y
> >  CONFIG_POWER_DOMAIN=y
> >  CONFIG_IMX8M_POWER_DOMAIN=y
> >  CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
> > -CONFIG_POWER_PCA9450=y
> > +CONFIG_DM_PMIC=y
> > +CONFIG_DM_PMIC_PCA9450=y
> > +CONFIG_SPL_DM_PMIC_PCA9450=y
> >  CONFIG_DM_REGULATOR=y
> > +CONFIG_DM_REGULATOR_PCA9450=y
> >  CONFIG_DM_REGULATOR_FIXED=y
> >  CONFIG_DM_REGULATOR_GPIO=y
> > -CONFIG_SPL_POWER_I2C=y
> >  CONFIG_DM_RNG=y
> >  CONFIG_DM_SERIAL=y
> >  CONFIG_MXC_UART=y

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Teresa Remmet]

Hello Peng,
Hello Yannic,

Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
> Hi Yannic,
> 
> > Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
> > DM_PMIC
> > 
> > Hi Peng,
> > 
> > On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
> > > From: Peng Fan <peng.fan@nxp.com>
> > > 
> > > Convert the board to use DM_PMIC instead of the legacy SPL
> > I2C/PMIC
> > > handling.
> > > 
> > > Changes include:
> > > - Enable DM_PMIC, DM_PMIC_PCA9450, and
> > SPL_DM_PMIC_PCA9450 in defconfig.
> > > - Drop legacy SPL I2C and PMIC options.
> > > - Remove manual I2C1 pad setup and legacy power_pca9450_init()
> > usage.
> > > - Use DM-based pmic_get() with the DT node "pmic@25".
> > > - Update PMIC register programming to use struct udevice API.
> > 
> > these changes break something.
> > 
> > Getting
> > 
> > Loading Environment from MMC... Card did not respond to voltage
> > select! : -110
> > *** Warning - No block device, using default environment
> > 
> > and SD card is not accessible as a result. I also worked on this
> > modernization and got the same result as with your commit. Have not
> > had time to investigate the cause, yet.
> 
> This change should not impact sd, unless pmic not probe correctly.
> You may give a look on "regulators", "pmic" in U-Boot shell,
> to see whether pmic is good.
> 
> And you may also need to confirm, whether SD works or not
> without this migration to DM_PMIC.

I see the same issue. The error is gone when the patch is reverted
again.
PMIC probing is working but the voltage change of SD-Card is probably
not. 
We have set 
dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:	
vqmmc-supply = <&ldo5>;

which references the PMIC. 
The evk is not using this property.

Removing the property makes the error go away.
Any ideas what is missing here?

Regards,
Teresa

> 
> Thanks,
> Peng.
> 
> > 
> > Yannic
> > 
> > > 
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > >  .../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 16 +++++++-
> > >  board/phytec/phycore_imx8mp/spl.c                  | 43
> > > +++++++---------------
> > >  configs/phycore-imx8mp_defconfig                   | 10 ++---
> > >  3 files changed, 32 insertions(+), 37 deletions(-)
> > > 
> > > diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > > b/arch/arm/dts/imx8mp-phyboard- pollux-rdk-u-boot.dtsi index
> > > 4804a204e92..871e7fd674d 100644
> > > --- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > > +++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > > @@ -34,6 +34,18 @@
> > >  	};
> > >  };
> > > 
> > > +&pinctrl_i2c1 {
> > > +	bootph-all;
> > > +};
> > > +
> > > +&pinctrl_pmic {
> > > +	bootph-all;
> > > +};
> > > +
> > > +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
> > > +	bootph-all;
> > > +};
> > > +
> > >  &reg_usdhc2_vmmc {
> > >  	bootph-pre-ram;
> > >  };
> > > @@ -83,11 +95,11 @@
> > >  };
> > > 
> > >  &i2c1 {
> > > -	bootph-pre-ram;
> > > +	bootph-all;
> > >  };
> > > 
> > >  &pmic {
> > > -	bootph-pre-ram;
> > > +	bootph-all;
> > >  };
> > > 
> > >  &usb_dwc3_0 {
> > > diff --git a/board/phytec/phycore_imx8mp/spl.c
> > > b/board/phytec/phycore_imx8mp/spl.c
> > > index fc7aefd0073..fc6f5104925 100644
> > > --- a/board/phytec/phycore_imx8mp/spl.c
> > > +++ b/board/phytec/phycore_imx8mp/spl.c
> > > @@ -117,45 +117,32 @@ out:
> > >  	ddr_init(&dram_timing);
> > >  }
> > > 
> > > -#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS |
> > PAD_CTL_PUE |
> > > PAD_CTL_PE) -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -struct
> > > i2c_pads_info i2c_pad_info1 = {
> > > -	.scl = {
> > > -		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
> > > -		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 |
> > PC,
> > > -		.gp = IMX_GPIO_NR(5, 14),
> > > -	},
> > > -	.sda = {
> > > -		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
> > > -		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15
> > > PC,
> > > -		.gp = IMX_GPIO_NR(5, 15),
> > > -	},
> > > -};
> > > -
> > >  int power_init_board(void)
> > >  {
> > > -	struct pmic *p;
> > > +	struct udevice *dev;
> > >  	int ret;
> > > 
> > > -	ret = power_pca9450_init(0, 0x25);
> > > -	if (ret)
> > > -		printf("power init failed");
> > > -	p = pmic_get("PCA9450");
> > > -	pmic_probe(p);
> > > +	ret = pmic_get("pmic@25", &dev);
> > > +	if (ret == -ENODEV) {
> > > +		puts("No pmic@25\n");
> > > +		return 0;
> > > +	}
> > > +	if (ret < 0)
> > > +		return ret;
> > > 
> > >  	/* BUCKxOUT_DVS0/1 control BUCK123 output */
> > > -	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
> > > +	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
> > > 
> > >  	/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
> > > -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
> > > -	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
> > > +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
> > > +	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
> > > 
> > >  	/* Set BUCK1 DVS1 to suspend controlled through
> > PMIC_STBY_REQ */
> > > -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
> > > -	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
> > > +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
> > > +	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
> > > 
> > >  	/* Set WDOG_B_CFG to cold reset */
> > > -	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
> > > +	pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
> > > 
> > >  	return 0;
> > >  }
> > > @@ -193,8 +180,6 @@ void board_init_f(ulong dummy)
> > > 
> > >  	enable_tzc380();
> > > 
> > > -	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f,
> > > &i2c_pad_info1);
> > > -
> > >  	power_init_board();
> > > 
> > >  	/* DDR initialization */
> > > diff --git a/configs/phycore-imx8mp_defconfig
> > > b/configs/phycore-imx8mp_defconfig
> > > index 2fcf7db9e5c..51d9737afb3 100644
> > > --- a/configs/phycore-imx8mp_defconfig
> > > +++ b/configs/phycore-imx8mp_defconfig
> > > @@ -10,7 +10,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000
> > >  CONFIG_ENV_SIZE=0x10000
> > >  CONFIG_ENV_OFFSET=0x3C0000
> > >  CONFIG_ENV_SECT_SIZE=0x10000
> > > -CONFIG_SYS_I2C_MXC_I2C1=y
> > >  CONFIG_DM_GPIO=y
> > >  CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-
> > pollux-rdk"
> > >  CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000
> > > @@ -113,8 +112,6 @@
> > CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
> > >  CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
> > >  CONFIG_MXC_GPIO=y
> > >  CONFIG_DM_I2C=y
> > > -# CONFIG_SPL_DM_I2C is not set
> > > -CONFIG_SPL_SYS_I2C_LEGACY=y
> > >  CONFIG_I2C_EEPROM=y
> > >  CONFIG_SYS_I2C_EEPROM_ADDR=0x51
> > >  CONFIG_SUPPORT_EMMC_BOOT=y
> > > @@ -144,15 +141,16 @@ CONFIG_PHY_IMX8MQ_USB=y
> > >  CONFIG_PINCTRL=y
> > >  CONFIG_SPL_PINCTRL=y
> > >  CONFIG_PINCTRL_IMX8M=y
> > > -CONFIG_SPL_POWER_LEGACY=y
> > >  CONFIG_POWER_DOMAIN=y
> > >  CONFIG_IMX8M_POWER_DOMAIN=y
> > >  CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
> > > -CONFIG_POWER_PCA9450=y
> > > +CONFIG_DM_PMIC=y
> > > +CONFIG_DM_PMIC_PCA9450=y
> > > +CONFIG_SPL_DM_PMIC_PCA9450=y
> > >  CONFIG_DM_REGULATOR=y
> > > +CONFIG_DM_REGULATOR_PCA9450=y
> > >  CONFIG_DM_REGULATOR_FIXED=y
> > >  CONFIG_DM_REGULATOR_GPIO=y
> > > -CONFIG_SPL_POWER_I2C=y
> > >  CONFIG_DM_RNG=y
> > >  CONFIG_DM_SERIAL=y
> > >  CONFIG_MXC_UART=y

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 26/665/00608, DE 149059855

RE: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan]

> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
> DM_PMIC
> 
> Hello Peng,
> Hello Yannic,
> 
> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
> > Hi Yannic,
> >
> > > Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
> > > DM_PMIC
> > >
> > > Hi Peng,
> > >
> > > On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
> > > > From: Peng Fan <peng.fan@nxp.com>
> > > >
> > > > Convert the board to use DM_PMIC instead of the legacy SPL
> > > I2C/PMIC
> > > > handling.
> > > >
> > > > Changes include:
> > > > - Enable DM_PMIC, DM_PMIC_PCA9450, and
> > > SPL_DM_PMIC_PCA9450 in defconfig.
> > > > - Drop legacy SPL I2C and PMIC options.
> > > > - Remove manual I2C1 pad setup and legacy power_pca9450_init()
> > > usage.
> > > > - Use DM-based pmic_get() with the DT node "pmic@25".
> > > > - Update PMIC register programming to use struct udevice API.
> > >
> > > these changes break something.
> > >
> > > Getting
> > >
> > > Loading Environment from MMC... Card did not respond to voltage
> > > select! : -110
> > > *** Warning - No block device, using default environment
> > >
> > > and SD card is not accessible as a result. I also worked on this
> > > modernization and got the same result as with your commit. Have
> not
> > > had time to investigate the cause, yet.
> >
> > This change should not impact sd, unless pmic not probe correctly.
> > You may give a look on "regulators", "pmic" in U-Boot shell, to see
> > whether pmic is good.
> >
> > And you may also need to confirm, whether SD works or not without
> this
> > migration to DM_PMIC.
> 
> I see the same issue. The error is gone when the patch is reverted again.
> PMIC probing is working but the voltage change of SD-Card is probably
> not.
> We have set
> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
> vqmmc-supply = <&ldo5>;
> 
> which references the PMIC.
> The evk is not using this property.

I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
Not sure why this property impacts phycore-fpsc.

The only suspecting point is 

-                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
+                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0

No more ideas as of now.

Thanks,
Peng.


> 
> Removing the property makes the error go away.
> Any ideas what is missing here?
> 
> Regards,
> Teresa
> 
> >
> > Thanks,
> > Peng.
> >
> > >
> > > Yannic
> > >
> > > >
> > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > > ---
> > > >  .../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 16
> +++++++-
> > > >  board/phytec/phycore_imx8mp/spl.c                  | 43
> > > > +++++++---------------
> > > >  configs/phycore-imx8mp_defconfig                   | 10 ++---
> > > >  3 files changed, 32 insertions(+), 37 deletions(-)
> > > >
> > > > diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > > > b/arch/arm/dts/imx8mp-phyboard- pollux-rdk-u-boot.dtsi index
> > > > 4804a204e92..871e7fd674d 100644
> > > > --- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > > > +++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
> > > > @@ -34,6 +34,18 @@
> > > >  	};
> > > >  };
> > > >
> > > > +&pinctrl_i2c1 {
> > > > +	bootph-all;
> > > > +};
> > > > +
> > > > +&pinctrl_pmic {
> > > > +	bootph-all;
> > > > +};
> > > > +
> > > >
> +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
> > > > +	bootph-all;
> > > > +};
> > > > +
> > > >  &reg_usdhc2_vmmc {
> > > >  	bootph-pre-ram;
> > > >  };
> > > > @@ -83,11 +95,11 @@
> > > >  };
> > > >
> > > >  &i2c1 {
> > > > -	bootph-pre-ram;
> > > > +	bootph-all;
> > > >  };
> > > >
> > > >  &pmic {
> > > > -	bootph-pre-ram;
> > > > +	bootph-all;
> > > >  };
> > > >
> > > >  &usb_dwc3_0 {
> > > > diff --git a/board/phytec/phycore_imx8mp/spl.c
> > > > b/board/phytec/phycore_imx8mp/spl.c
> > > > index fc7aefd0073..fc6f5104925 100644
> > > > --- a/board/phytec/phycore_imx8mp/spl.c
> > > > +++ b/board/phytec/phycore_imx8mp/spl.c
> > > > @@ -117,45 +117,32 @@ out:
> > > >  	ddr_init(&dram_timing);
> > > >  }
> > > >
> > > > -#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS |
> > > PAD_CTL_PUE |
> > > > PAD_CTL_PE) -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -struct
> > > > i2c_pads_info i2c_pad_info1 = {
> > > > -	.scl = {
> > > > -		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
> > > > -		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 |
> > > PC,
> > > > -		.gp = IMX_GPIO_NR(5, 14),
> > > > -	},
> > > > -	.sda = {
> > > > -		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
> > > > -		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15
> > > > PC,
> > > > -		.gp = IMX_GPIO_NR(5, 15),
> > > > -	},
> > > > -};
> > > > -
> > > >  int power_init_board(void)
> > > >  {
> > > > -	struct pmic *p;
> > > > +	struct udevice *dev;
> > > >  	int ret;
> > > >
> > > > -	ret = power_pca9450_init(0, 0x25);
> > > > -	if (ret)
> > > > -		printf("power init failed");
> > > > -	p = pmic_get("PCA9450");
> > > > -	pmic_probe(p);
> > > > +	ret = pmic_get("pmic@25", &dev);
> > > > +	if (ret == -ENODEV) {
> > > > +		puts("No pmic@25\n");
> > > > +		return 0;
> > > > +	}
> > > > +	if (ret < 0)
> > > > +		return ret;
> > > >
> > > >  	/* BUCKxOUT_DVS0/1 control BUCK123 output */
> > > > -	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
> > > > +	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
> > > >
> > > >  	/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
> > > > -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
> > > > -	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
> > > > +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
> > > > +	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
> > > >
> > > >  	/* Set BUCK1 DVS1 to suspend controlled through
> > > PMIC_STBY_REQ */
> > > > -	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
> > > > -	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
> > > > +	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
> > > > +	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
> > > >
> > > >  	/* Set WDOG_B_CFG to cold reset */
> > > > -	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
> > > > +	pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
> > > >
> > > >  	return 0;
> > > >  }
> > > > @@ -193,8 +180,6 @@ void board_init_f(ulong dummy)
> > > >
> > > >  	enable_tzc380();
> > > >
> > > > -	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f,
> > > > &i2c_pad_info1);
> > > > -
> > > >  	power_init_board();
> > > >
> > > >  	/* DDR initialization */
> > > > diff --git a/configs/phycore-imx8mp_defconfig
> > > > b/configs/phycore-imx8mp_defconfig
> > > > index 2fcf7db9e5c..51d9737afb3 100644
> > > > --- a/configs/phycore-imx8mp_defconfig
> > > > +++ b/configs/phycore-imx8mp_defconfig
> > > > @@ -10,7 +10,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000
> > > >  CONFIG_ENV_SIZE=0x10000
> > > >  CONFIG_ENV_OFFSET=0x3C0000
> > > >  CONFIG_ENV_SECT_SIZE=0x10000
> > > > -CONFIG_SYS_I2C_MXC_I2C1=y
> > > >  CONFIG_DM_GPIO=y
> > > >  CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-
> > > pollux-rdk"
> > > >  CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000
> > > > @@ -113,8 +112,6 @@
> > > CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
> > > >  CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
> > > >  CONFIG_MXC_GPIO=y
> > > >  CONFIG_DM_I2C=y
> > > > -# CONFIG_SPL_DM_I2C is not set
> > > > -CONFIG_SPL_SYS_I2C_LEGACY=y
> > > >  CONFIG_I2C_EEPROM=y
> > > >  CONFIG_SYS_I2C_EEPROM_ADDR=0x51
> > > >  CONFIG_SUPPORT_EMMC_BOOT=y
> > > > @@ -144,15 +141,16 @@ CONFIG_PHY_IMX8MQ_USB=y
> > > >  CONFIG_PINCTRL=y
> > > >  CONFIG_SPL_PINCTRL=y
> > > >  CONFIG_PINCTRL_IMX8M=y
> > > > -CONFIG_SPL_POWER_LEGACY=y
> > > >  CONFIG_POWER_DOMAIN=y
> > > >  CONFIG_IMX8M_POWER_DOMAIN=y
> > > >  CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
> > > > -CONFIG_POWER_PCA9450=y
> > > > +CONFIG_DM_PMIC=y
> > > > +CONFIG_DM_PMIC_PCA9450=y
> > > > +CONFIG_SPL_DM_PMIC_PCA9450=y
> > > >  CONFIG_DM_REGULATOR=y
> > > > +CONFIG_DM_REGULATOR_PCA9450=y
> > > >  CONFIG_DM_REGULATOR_FIXED=y
> > > >  CONFIG_DM_REGULATOR_GPIO=y
> > > > -CONFIG_SPL_POWER_I2C=y
> > > >  CONFIG_DM_RNG=y
> > > >  CONFIG_DM_SERIAL=y
> > > >  CONFIG_MXC_UART=y
> 
> --
> PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz,
> Germany
> 
> Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber, Dipl.-
> Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 | Finanzamt
> Mainz | St.Nr. 26/665/00608, DE 149059855

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Frieder Schrempf]

On 25.03.26 04:50, Peng Fan wrote:
>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>> DM_PMIC
>>
>> Hello Peng,
>> Hello Yannic,
>>
>> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
>>> Hi Yannic,
>>>
>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>> DM_PMIC
>>>>
>>>> Hi Peng,
>>>>
>>>> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
>>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>>
>>>>> Convert the board to use DM_PMIC instead of the legacy SPL
>>>> I2C/PMIC
>>>>> handling.
>>>>>
>>>>> Changes include:
>>>>> - Enable DM_PMIC, DM_PMIC_PCA9450, and
>>>> SPL_DM_PMIC_PCA9450 in defconfig.
>>>>> - Drop legacy SPL I2C and PMIC options.
>>>>> - Remove manual I2C1 pad setup and legacy power_pca9450_init()
>>>> usage.
>>>>> - Use DM-based pmic_get() with the DT node "pmic@25".
>>>>> - Update PMIC register programming to use struct udevice API.
>>>>
>>>> these changes break something.
>>>>
>>>> Getting
>>>>
>>>> Loading Environment from MMC... Card did not respond to voltage
>>>> select! : -110
>>>> *** Warning - No block device, using default environment
>>>>
>>>> and SD card is not accessible as a result. I also worked on this
>>>> modernization and got the same result as with your commit. Have
>> not
>>>> had time to investigate the cause, yet.
>>>
>>> This change should not impact sd, unless pmic not probe correctly.
>>> You may give a look on "regulators", "pmic" in U-Boot shell, to see
>>> whether pmic is good.
>>>
>>> And you may also need to confirm, whether SD works or not without
>> this
>>> migration to DM_PMIC.
>>
>> I see the same issue. The error is gone when the patch is reverted again.
>> PMIC probing is working but the voltage change of SD-Card is probably
>> not.
>> We have set
>> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
>> vqmmc-supply = <&ldo5>;
>>
>> which references the PMIC.
>> The evk is not using this property.
> 
> I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
> Not sure why this property impacts phycore-fpsc.
> 
> The only suspecting point is 
> 
> -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
> 
> No more ideas as of now.

I'm pretty sure this issue is related to the VSELECT signal in some way.

With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
controller controls the VSELECT signal that goes into the SD_VSEL input
of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally the
PMIC uses the state of SD_VSEL to decide which one of two voltage
registers for LDO5 is used.

When vqmmc-supply is set, the driver additionally sets the voltage by
writing to the PMIC LDO5 voltage register. This can potentially cause
conflicts and lead to an invalid state, where the driver thinks the card
is in 1.8V state but the voltage is set to 3.3V or the other way round.

One way to handle this, is to set the SION bit for the VSELECT signal
and specify the sd-vsel-gpios property in the ldo5 node. This allows the
PMIC driver to know about the current state of the VSELECT signal and
use the correct voltage register when setting or getting the LDO5 voltage.

Below you can find some pointers for additional information. I hope this
helps to solve the issue on your board.

Best regards
Frieder

Relevant U-Boot patchset:
https://patchwork.ozlabs.org/project/uboot/cover/20250811131213.211124-1-frieder@fris.de/

Relevant Kernel patchset:
https://patchwork.kernel.org/project/linux-arm-kernel/cover/20241218152842.97483-1-frieder@fris.de/

Example for sd-vsel-gpios:
https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L314

Example for pinmux with SION bit:
https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L812

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Teresa Remmet]

Hello Frieder,

Am Mittwoch, dem 25.03.2026 um 08:40 +0100 schrieb Frieder Schrempf:
> On 25.03.26 04:50, Peng Fan wrote:
> > > Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
> > > DM_PMIC
> > > 
> > > Hello Peng,
> > > Hello Yannic,
> > > 
> > > Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
> > > > Hi Yannic,
> > > > 
> > > > > Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert
> > > > > to
> > > > > DM_PMIC
> > > > > 
> > > > > Hi Peng,
> > > > > 
> > > > > On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
> > > > > > From: Peng Fan <peng.fan@nxp.com>
> > > > > > 
> > > > > > Convert the board to use DM_PMIC instead of the legacy SPL
> > > > > I2C/PMIC
> > > > > > handling.
> > > > > > 
> > > > > > Changes include:
> > > > > > - Enable DM_PMIC, DM_PMIC_PCA9450, and
> > > > > SPL_DM_PMIC_PCA9450 in defconfig.
> > > > > > - Drop legacy SPL I2C and PMIC options.
> > > > > > - Remove manual I2C1 pad setup and legacy
> > > > > > power_pca9450_init()
> > > > > usage.
> > > > > > - Use DM-based pmic_get() with the DT node "pmic@25".
> > > > > > - Update PMIC register programming to use struct udevice
> > > > > > API.
> > > > > 
> > > > > these changes break something.
> > > > > 
> > > > > Getting
> > > > > 
> > > > > Loading Environment from MMC... Card did not respond to
> > > > > voltage
> > > > > select! : -110
> > > > > *** Warning - No block device, using default environment
> > > > > 
> > > > > and SD card is not accessible as a result. I also worked on
> > > > > this
> > > > > modernization and got the same result as with your commit.
> > > > > Have
> > > not
> > > > > had time to investigate the cause, yet.
> > > > 
> > > > This change should not impact sd, unless pmic not probe
> > > > correctly.
> > > > You may give a look on "regulators", "pmic" in U-Boot shell, to
> > > > see
> > > > whether pmic is good.
> > > > 
> > > > And you may also need to confirm, whether SD works or not
> > > > without
> > > this
> > > > migration to DM_PMIC.
> > > 
> > > I see the same issue. The error is gone when the patch is
> > > reverted again.
> > > PMIC probing is working but the voltage change of SD-Card is
> > > probably
> > > not.
> > > We have set
> > > dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
> > > vqmmc-supply = <&ldo5>;
> > > 
> > > which references the PMIC.
> > > The evk is not using this property.
> > 
> > I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
> > Not sure why this property impacts phycore-fpsc.
> > 
> > The only suspecting point is 
> > 
> > -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT
> > 0xc0
> > +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT
> > 0x1c0
> > 
> > No more ideas as of now.
> 
> I'm pretty sure this issue is related to the VSELECT signal in some
> way.
> 
> With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
> controller controls the VSELECT signal that goes into the SD_VSEL
> input
> of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally
> the
> PMIC uses the state of SD_VSEL to decide which one of two voltage
> registers for LDO5 is used.
> 
> When vqmmc-supply is set, the driver additionally sets the voltage by
> writing to the PMIC LDO5 voltage register. This can potentially cause
> conflicts and lead to an invalid state, where the driver thinks the
> card
> is in 1.8V state but the voltage is set to 3.3V or the other way
> round.

I made a quick measurement and I saw the miss match. SW thinks the 1.8V
is configured but we still have 3.3V.

> 
> One way to handle this, is to set the SION bit for the VSELECT signal
> and specify the sd-vsel-gpios property in the ldo5 node. This allows
> the
> PMIC driver to know about the current state of the VSELECT signal and
> use the correct voltage register when setting or getting the LDO5
> voltage.

Adding the changes to the device tree makes it working.
So it looks like that is the issue.

Thank you very much for your help.

We will create a kernel dt patch then to fix this.

Thanks,
Teresa




> 
> Below you can find some pointers for additional information. I hope
> this
> helps to solve the issue on your board.
> 
> Best regards
> Frieder
> 
> Relevant U-Boot patchset:
> https://patchwork.ozlabs.org/project/uboot/cover/20250811131213.211124-1-frieder@fris.de/
> 
> Relevant Kernel patchset:
> https://patchwork.kernel.org/project/linux-arm-kernel/cover/20241218152842.97483-1-frieder@fris.de/
> 
> Example for sd-vsel-gpios:
> https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L314
> 
> Example for pinmux with SION bit:
> https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L812

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 26/665/00608, DE 149059855

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan]

Hi Frieder,

On Wed, Mar 25, 2026 at 08:40:26AM +0100, Frieder Schrempf wrote:
>On 25.03.26 04:50, Peng Fan wrote:
>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>> DM_PMIC
>>>
>>> Hello Peng,
>>> Hello Yannic,
>>>
>>> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
>>>> Hi Yannic,
>>>>
>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>> DM_PMIC
>>>>>
>>>>> Hi Peng,
>>>>>
>>>>> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
>>>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>>>
>>>>>> Convert the board to use DM_PMIC instead of the legacy SPL
>>>>> I2C/PMIC
>>>>>> handling.
>>>>>>
>>>>>> Changes include:
>>>>>> - Enable DM_PMIC, DM_PMIC_PCA9450, and
>>>>> SPL_DM_PMIC_PCA9450 in defconfig.
>>>>>> - Drop legacy SPL I2C and PMIC options.
>>>>>> - Remove manual I2C1 pad setup and legacy power_pca9450_init()
>>>>> usage.
>>>>>> - Use DM-based pmic_get() with the DT node "pmic@25".
>>>>>> - Update PMIC register programming to use struct udevice API.
>>>>>
>>>>> these changes break something.
>>>>>
>>>>> Getting
>>>>>
>>>>> Loading Environment from MMC... Card did not respond to voltage
>>>>> select! : -110
>>>>> *** Warning - No block device, using default environment
>>>>>
>>>>> and SD card is not accessible as a result. I also worked on this
>>>>> modernization and got the same result as with your commit. Have
>>> not
>>>>> had time to investigate the cause, yet.
>>>>
>>>> This change should not impact sd, unless pmic not probe correctly.
>>>> You may give a look on "regulators", "pmic" in U-Boot shell, to see
>>>> whether pmic is good.
>>>>
>>>> And you may also need to confirm, whether SD works or not without
>>> this
>>>> migration to DM_PMIC.
>>>
>>> I see the same issue. The error is gone when the patch is reverted again.
>>> PMIC probing is working but the voltage change of SD-Card is probably
>>> not.
>>> We have set
>>> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
>>> vqmmc-supply = <&ldo5>;
>>>
>>> which references the PMIC.
>>> The evk is not using this property.
>> 
>> I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
>> Not sure why this property impacts phycore-fpsc.
>> 
>> The only suspecting point is 
>> 
>> -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
>> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
>> 
>> No more ideas as of now.
>
>I'm pretty sure this issue is related to the VSELECT signal in some way.
>
>With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
>controller controls the VSELECT signal that goes into the SD_VSEL input
>of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally the
>PMIC uses the state of SD_VSEL to decide which one of two voltage
>registers for LDO5 is used.
>
>When vqmmc-supply is set, the driver additionally sets the voltage by
>writing to the PMIC LDO5 voltage register. This can potentially cause
>conflicts and lead to an invalid state, where the driver thinks the card
>is in 1.8V state but the voltage is set to 3.3V or the other way round.
>
>One way to handle this, is to set the SION bit for the VSELECT signal
>and specify the sd-vsel-gpios property in the ldo5 node. This allows the
>PMIC driver to know about the current state of the VSELECT signal and
>use the correct voltage register when setting or getting the LDO5 voltage.
>
>Below you can find some pointers for additional information. I hope this
>helps to solve the issue on your board.

Thanks for the detailed information. But I still have a question:
For current phyboard-pollux-rdk, vqmmc-supply will always use
PCA9450_LDO5CTRL_H for regulator value configuration.

In drivers/mmc/fsl_esdhc_imx.c, when configure with 3.3V, PCA9450_LDO5CTRL_H
will configured to 3.3V, but SD_VSEL is low, so no impact. When configure
with 1.8V, PCA9450_LDO5CTRL_H will be configured to 1.8V, and SD_VSEL is high,
so it should work.

or I may miss something.

Thanks,
Peng

>
>Best regards
>Frieder
>
>Relevant U-Boot patchset:
>https://patchwork.ozlabs.org/project/uboot/cover/20250811131213.211124-1-frieder@fris.de/
>
>Relevant Kernel patchset:
>https://patchwork.kernel.org/project/linux-arm-kernel/cover/20241218152842.97483-1-frieder@fris.de/
>
>Example for sd-vsel-gpios:
>https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L314
>
>Example for pinmux with SION bit:
>https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L812

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Frieder Schrempf]

Hi Peng,

On 25.03.26 12:12, Peng Fan wrote:
> Hi Frieder,
> 
> On Wed, Mar 25, 2026 at 08:40:26AM +0100, Frieder Schrempf wrote:
>> On 25.03.26 04:50, Peng Fan wrote:
>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>> DM_PMIC
>>>>
>>>> Hello Peng,
>>>> Hello Yannic,
>>>>
>>>> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
>>>>> Hi Yannic,
>>>>>
>>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>>> DM_PMIC
>>>>>>
>>>>>> Hi Peng,
>>>>>>
>>>>>> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
>>>>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>>>>
>>>>>>> Convert the board to use DM_PMIC instead of the legacy SPL
>>>>>> I2C/PMIC
>>>>>>> handling.
>>>>>>>
>>>>>>> Changes include:
>>>>>>> - Enable DM_PMIC, DM_PMIC_PCA9450, and
>>>>>> SPL_DM_PMIC_PCA9450 in defconfig.
>>>>>>> - Drop legacy SPL I2C and PMIC options.
>>>>>>> - Remove manual I2C1 pad setup and legacy power_pca9450_init()
>>>>>> usage.
>>>>>>> - Use DM-based pmic_get() with the DT node "pmic@25".
>>>>>>> - Update PMIC register programming to use struct udevice API.
>>>>>>
>>>>>> these changes break something.
>>>>>>
>>>>>> Getting
>>>>>>
>>>>>> Loading Environment from MMC... Card did not respond to voltage
>>>>>> select! : -110
>>>>>> *** Warning - No block device, using default environment
>>>>>>
>>>>>> and SD card is not accessible as a result. I also worked on this
>>>>>> modernization and got the same result as with your commit. Have
>>>> not
>>>>>> had time to investigate the cause, yet.
>>>>>
>>>>> This change should not impact sd, unless pmic not probe correctly.
>>>>> You may give a look on "regulators", "pmic" in U-Boot shell, to see
>>>>> whether pmic is good.
>>>>>
>>>>> And you may also need to confirm, whether SD works or not without
>>>> this
>>>>> migration to DM_PMIC.
>>>>
>>>> I see the same issue. The error is gone when the patch is reverted again.
>>>> PMIC probing is working but the voltage change of SD-Card is probably
>>>> not.
>>>> We have set
>>>> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
>>>> vqmmc-supply = <&ldo5>;
>>>>
>>>> which references the PMIC.
>>>> The evk is not using this property.
>>>
>>> I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
>>> Not sure why this property impacts phycore-fpsc.
>>>
>>> The only suspecting point is 
>>>
>>> -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
>>> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
>>>
>>> No more ideas as of now.
>>
>> I'm pretty sure this issue is related to the VSELECT signal in some way.
>>
>> With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
>> controller controls the VSELECT signal that goes into the SD_VSEL input
>> of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally the
>> PMIC uses the state of SD_VSEL to decide which one of two voltage
>> registers for LDO5 is used.
>>
>> When vqmmc-supply is set, the driver additionally sets the voltage by
>> writing to the PMIC LDO5 voltage register. This can potentially cause
>> conflicts and lead to an invalid state, where the driver thinks the card
>> is in 1.8V state but the voltage is set to 3.3V or the other way round.
>>
>> One way to handle this, is to set the SION bit for the VSELECT signal
>> and specify the sd-vsel-gpios property in the ldo5 node. This allows the
>> PMIC driver to know about the current state of the VSELECT signal and
>> use the correct voltage register when setting or getting the LDO5 voltage.
>>
>> Below you can find some pointers for additional information. I hope this
>> helps to solve the issue on your board.
> 
> Thanks for the detailed information. But I still have a question:
> For current phyboard-pollux-rdk, vqmmc-supply will always use
> PCA9450_LDO5CTRL_H for regulator value configuration.
> 
> In drivers/mmc/fsl_esdhc_imx.c, when configure with 3.3V, PCA9450_LDO5CTRL_H
> will configured to 3.3V, but SD_VSEL is low, so no impact. When configure
> with 1.8V, PCA9450_LDO5CTRL_H will be configured to 1.8V, and SD_VSEL is high,
> so it should work.
> 
> or I may miss something.

I think you are right. The process is the same as in Linux and I never
saw any issue there. Just the fact that when reading back the voltage of
the LDO5 regulator in Linux or U-Boot you could get a wrong value. This
can be fixed as described before.

So I'm really not sure what the actual problem is. I remember having a
similar or the same issue with our Kontron boards before switching to
the upstream DTS with sd-vsel-gpios. So it might also fix this issue
here, but of course it would be good to know the actual reason.

Best regards
Frieder

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan]

Hi Teresa,

On Wed, Mar 25, 2026 at 12:35:59PM +0100, Frieder Schrempf wrote:
>Hi Peng,
>
>On 25.03.26 12:12, Peng Fan wrote:
>> Hi Frieder,
>> 
>> On Wed, Mar 25, 2026 at 08:40:26AM +0100, Frieder Schrempf wrote:
>>> On 25.03.26 04:50, Peng Fan wrote:
>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>> DM_PMIC
>>>>>
>>>>> Hello Peng,
>>>>> Hello Yannic,
>>>>>
>>>>> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
>>>>>> Hi Yannic,
>>>>>>
>>>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>>>> DM_PMIC
>>>>>>>
>>>>>>> Hi Peng,
>>>>>>>
>>>>>>> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
>>>>>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>>>>>
>>>>>>>> Convert the board to use DM_PMIC instead of the legacy SPL
>>>>>>> I2C/PMIC
>>>>>>>> handling.
>>>>>>>>
>>>>>>>> Changes include:
>>>>>>>> - Enable DM_PMIC, DM_PMIC_PCA9450, and
>>>>>>> SPL_DM_PMIC_PCA9450 in defconfig.
>>>>>>>> - Drop legacy SPL I2C and PMIC options.
>>>>>>>> - Remove manual I2C1 pad setup and legacy power_pca9450_init()
>>>>>>> usage.
>>>>>>>> - Use DM-based pmic_get() with the DT node "pmic@25".
>>>>>>>> - Update PMIC register programming to use struct udevice API.
>>>>>>>
>>>>>>> these changes break something.
>>>>>>>
>>>>>>> Getting
>>>>>>>
>>>>>>> Loading Environment from MMC... Card did not respond to voltage
>>>>>>> select! : -110
>>>>>>> *** Warning - No block device, using default environment
>>>>>>>
>>>>>>> and SD card is not accessible as a result. I also worked on this
>>>>>>> modernization and got the same result as with your commit. Have
>>>>> not
>>>>>>> had time to investigate the cause, yet.
>>>>>>
>>>>>> This change should not impact sd, unless pmic not probe correctly.
>>>>>> You may give a look on "regulators", "pmic" in U-Boot shell, to see
>>>>>> whether pmic is good.
>>>>>>
>>>>>> And you may also need to confirm, whether SD works or not without
>>>>> this
>>>>>> migration to DM_PMIC.
>>>>>
>>>>> I see the same issue. The error is gone when the patch is reverted again.
>>>>> PMIC probing is working but the voltage change of SD-Card is probably
>>>>> not.
>>>>> We have set
>>>>> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
>>>>> vqmmc-supply = <&ldo5>;
>>>>>
>>>>> which references the PMIC.
>>>>> The evk is not using this property.
>>>>
>>>> I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
>>>> Not sure why this property impacts phycore-fpsc.
>>>>
>>>> The only suspecting point is 
>>>>
>>>> -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
>>>> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
>>>>
>>>> No more ideas as of now.
>>>
>>> I'm pretty sure this issue is related to the VSELECT signal in some way.
>>>
>>> With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
>>> controller controls the VSELECT signal that goes into the SD_VSEL input
>>> of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally the
>>> PMIC uses the state of SD_VSEL to decide which one of two voltage
>>> registers for LDO5 is used.
>>>
>>> When vqmmc-supply is set, the driver additionally sets the voltage by
>>> writing to the PMIC LDO5 voltage register. This can potentially cause
>>> conflicts and lead to an invalid state, where the driver thinks the card
>>> is in 1.8V state but the voltage is set to 3.3V or the other way round.
>>>
>>> One way to handle this, is to set the SION bit for the VSELECT signal
>>> and specify the sd-vsel-gpios property in the ldo5 node. This allows the
>>> PMIC driver to know about the current state of the VSELECT signal and
>>> use the correct voltage register when setting or getting the LDO5 voltage.
>>>
>>> Below you can find some pointers for additional information. I hope this
>>> helps to solve the issue on your board.
>> 
>> Thanks for the detailed information. But I still have a question:
>> For current phyboard-pollux-rdk, vqmmc-supply will always use
>> PCA9450_LDO5CTRL_H for regulator value configuration.
>> 
>> In drivers/mmc/fsl_esdhc_imx.c, when configure with 3.3V, PCA9450_LDO5CTRL_H
>> will configured to 3.3V, but SD_VSEL is low, so no impact. When configure
>> with 1.8V, PCA9450_LDO5CTRL_H will be configured to 1.8V, and SD_VSEL is high,
>> so it should work.
>> 
>> or I may miss something.
>
>I think you are right. The process is the same as in Linux and I never
>saw any issue there. Just the fact that when reading back the voltage of
>the LDO5 regulator in Linux or U-Boot you could get a wrong value. This
>can be fixed as described before.
>
>So I'm really not sure what the actual problem is. I remember having a
>similar or the same issue with our Kontron boards before switching to
>the upstream DTS with sd-vsel-gpios. So it might also fix this issue
>here, but of course it would be good to know the actual reason.

If possible, please help do a test. After applying the conver to DM_PMIC
patch, then apply below patch to see whether you issue is gone.

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 335b44a8a1a..f92c0c91c4d 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1454,8 +1454,11 @@ static int fsl_esdhc_of_to_plat(struct udevice *dev)
                        return ret;
                }

-               if (regulator_get_value(vqmmc_dev) == 1800000)
+               if (regulator_get_value(vqmmc_dev) == 1800000) {
+                       printf("value is 1.8V?????????????\n");
                        priv->vs18_enable = 1;
+               }
+               priv->vs18_enable = 0;
        }
        return 0;
 }

If issue gone, I think issue is clear, driver think it is 1.8v, but it is
3.3v actually.

Frieder's fix is still the best for your platform, you could go with that.
Other platforms using vqmmc may also needs same fix.

Thanks,
Peng

>
>Best regards
>Frieder
>
>

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Teresa Remmet]

Hello Peng,

Am Donnerstag, dem 26.03.2026 um 16:05 +0800 schrieb Peng Fan:
> Hi Teresa,
> 
> On Wed, Mar 25, 2026 at 12:35:59PM +0100, Frieder Schrempf wrote:
> > Hi Peng,
> > 
> > On 25.03.26 12:12, Peng Fan wrote:
> > > Hi Frieder,
> > > 
> > > On Wed, Mar 25, 2026 at 08:40:26AM +0100, Frieder Schrempf wrote:
> > > > On 25.03.26 04:50, Peng Fan wrote:
> > > > > > Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk:
> > > > > > Convert to
> > > > > > DM_PMIC
> > > > > > 
> > > > > > Hello Peng,
> > > > > > Hello Yannic,
> > > > > > 
> > > > > > Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng
> > > > > > Fan:
> > > > > > > Hi Yannic,
> > > > > > > 
> > > > > > > > Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk:
> > > > > > > > Convert to
> > > > > > > > DM_PMIC
> > > > > > > > 
> > > > > > > > Hi Peng,
> > > > > > > > 
> > > > > > > > On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS)
> > > > > > > > wrote:
> > > > > > > > > From: Peng Fan <peng.fan@nxp.com>
> > > > > > > > > 
> > > > > > > > > Convert the board to use DM_PMIC instead of the
> > > > > > > > > legacy SPL
> > > > > > > > I2C/PMIC
> > > > > > > > > handling.
> > > > > > > > > 
> > > > > > > > > Changes include:
> > > > > > > > > - Enable DM_PMIC, DM_PMIC_PCA9450, and
> > > > > > > > SPL_DM_PMIC_PCA9450 in defconfig.
> > > > > > > > > - Drop legacy SPL I2C and PMIC options.
> > > > > > > > > - Remove manual I2C1 pad setup and legacy
> > > > > > > > > power_pca9450_init()
> > > > > > > > usage.
> > > > > > > > > - Use DM-based pmic_get() with the DT node "pmic@25".
> > > > > > > > > - Update PMIC register programming to use struct
> > > > > > > > > udevice API.
> > > > > > > > 
> > > > > > > > these changes break something.
> > > > > > > > 
> > > > > > > > Getting
> > > > > > > > 
> > > > > > > > Loading Environment from MMC... Card did not respond to
> > > > > > > > voltage
> > > > > > > > select! : -110
> > > > > > > > *** Warning - No block device, using default
> > > > > > > > environment
> > > > > > > > 
> > > > > > > > and SD card is not accessible as a result. I also
> > > > > > > > worked on this
> > > > > > > > modernization and got the same result as with your
> > > > > > > > commit. Have
> > > > > > not
> > > > > > > > had time to investigate the cause, yet.
> > > > > > > 
> > > > > > > This change should not impact sd, unless pmic not probe
> > > > > > > correctly.
> > > > > > > You may give a look on "regulators", "pmic" in U-Boot
> > > > > > > shell, to see
> > > > > > > whether pmic is good.
> > > > > > > 
> > > > > > > And you may also need to confirm, whether SD works or not
> > > > > > > without
> > > > > > this
> > > > > > > migration to DM_PMIC.
> > > > > > 
> > > > > > I see the same issue. The error is gone when the patch is
> > > > > > reverted again.
> > > > > > PMIC probing is working but the voltage change of SD-Card
> > > > > > is probably
> > > > > > not.
> > > > > > We have set
> > > > > > dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
> > > > > > vqmmc-supply = <&ldo5>;
> > > > > > 
> > > > > > which references the PMIC.
> > > > > > The evk is not using this property.
> > > > > 
> > > > > I tried to add vqmmc-supply for i.MX8MP-EVK, I not see
> > > > > issues.
> > > > > Not sure why this property impacts phycore-fpsc.
> > > > > 
> > > > > The only suspecting point is 
> > > > > 
> > > > > -                      
> > > > > MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
> > > > > +                      
> > > > > MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
> > > > > 
> > > > > No more ideas as of now.
> > > > 
> > > > I'm pretty sure this issue is related to the VSELECT signal in
> > > > some way.
> > > > 
> > > > With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the
> > > > SDHC
> > > > controller controls the VSELECT signal that goes into the
> > > > SD_VSEL input
> > > > of the PMIC and switches the LDO5 between 1.8V and 3.3V.
> > > > Internally the
> > > > PMIC uses the state of SD_VSEL to decide which one of two
> > > > voltage
> > > > registers for LDO5 is used.
> > > > 
> > > > When vqmmc-supply is set, the driver additionally sets the
> > > > voltage by
> > > > writing to the PMIC LDO5 voltage register. This can potentially
> > > > cause
> > > > conflicts and lead to an invalid state, where the driver thinks
> > > > the card
> > > > is in 1.8V state but the voltage is set to 3.3V or the other
> > > > way round.
> > > > 
> > > > One way to handle this, is to set the SION bit for the VSELECT
> > > > signal
> > > > and specify the sd-vsel-gpios property in the ldo5 node. This
> > > > allows the
> > > > PMIC driver to know about the current state of the VSELECT
> > > > signal and
> > > > use the correct voltage register when setting or getting the
> > > > LDO5 voltage.
> > > > 
> > > > Below you can find some pointers for additional information. I
> > > > hope this
> > > > helps to solve the issue on your board.
> > > 
> > > Thanks for the detailed information. But I still have a question:
> > > For current phyboard-pollux-rdk, vqmmc-supply will always use
> > > PCA9450_LDO5CTRL_H for regulator value configuration.
> > > 
> > > In drivers/mmc/fsl_esdhc_imx.c, when configure with 3.3V,
> > > PCA9450_LDO5CTRL_H
> > > will configured to 3.3V, but SD_VSEL is low, so no impact. When
> > > configure
> > > with 1.8V, PCA9450_LDO5CTRL_H will be configured to 1.8V, and
> > > SD_VSEL is high,
> > > so it should work.
> > > 
> > > or I may miss something.
> > 
> > I think you are right. The process is the same as in Linux and I
> > never
> > saw any issue there. Just the fact that when reading back the
> > voltage of
> > the LDO5 regulator in Linux or U-Boot you could get a wrong value.
> > This
> > can be fixed as described before.
> > 
> > So I'm really not sure what the actual problem is. I remember
> > having a
> > similar or the same issue with our Kontron boards before switching
> > to
> > the upstream DTS with sd-vsel-gpios. So it might also fix this
> > issue
> > here, but of course it would be good to know the actual reason.
> 
> If possible, please help do a test. After applying the conver to
> DM_PMIC
> patch, then apply below patch to see whether you issue is gone.
> 
> diff --git a/drivers/mmc/fsl_esdhc_imx.c
> b/drivers/mmc/fsl_esdhc_imx.c
> index 335b44a8a1a..f92c0c91c4d 100644
> --- a/drivers/mmc/fsl_esdhc_imx.c
> +++ b/drivers/mmc/fsl_esdhc_imx.c
> @@ -1454,8 +1454,11 @@ static int fsl_esdhc_of_to_plat(struct udevice
> *dev)
>                         return ret;
>                 }
> 
> -               if (regulator_get_value(vqmmc_dev) == 1800000)
> +               if (regulator_get_value(vqmmc_dev) == 1800000) {
> +                       printf("value is 1.8V?????????????\n");
>                         priv->vs18_enable = 1;
> +               }
> +               priv->vs18_enable = 0;
>         }
>         return 0;
>  }
> 
> If issue gone, I think issue is clear, driver think it is 1.8v, but
> it is
> 3.3v actually.

With your Convert DM_PMIC patchstack and the change above (and without
Frieders dt changes) the issue is gone:

[...]
U-Boot 2026.04-rc5-00005-g548f723f63d9-dirty (Mar 26 2026 - 09:34:32
+0100)

CPU:   NXP i.MX8MP[8] Rev1.1 A53 at 1200 MHz
CPU:   Industrial temperature grade (-40C to 105C) at 31C
Model: PHYTEC phyBOARD-Pollux i.MX8MP
DRAM:  2 GiB
I/TC: Reserved shared memory is enabled
I/TC: Dynamic shared memory is enabled
I/TC: Normal World virtualization support is disabled
I/TC: Asynchronous notifications are disabled
Core:  254 devices, 32 uclasses, devicetree: separate
WDT:   Started watchdog@30280000 with servicing every 1000ms (60s
timeout)
MMC:   value is 1.8V?????????????
FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... Reading from MMC(1)... OK
In:    serial@30860000
Out:   serial@30860000
Err:   serial@30860000
SEC0:  RNG instantiated
Net:   eth0: ethernet@30be0000
Hit any key to stop autoboot: 0

> 
> Frieder's fix is still the best for your platform, you could go with
> that.
> Other platforms using vqmmc may also needs same fix.

Okay, thanks. We will then create the dt patch.

Thanks,
Teresa

> 
> Thanks,
> Peng
> 
> > 
> > Best regards
> > Frieder
> > 
> > 

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 26/665/00608, DE 149059855

RE: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan]

> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
> DM_PMIC
> > diff --git a/drivers/mmc/fsl_esdhc_imx.c
> b/drivers/mmc/fsl_esdhc_imx.c
> > index 335b44a8a1a..f92c0c91c4d 100644
> > --- a/drivers/mmc/fsl_esdhc_imx.c
> > +++ b/drivers/mmc/fsl_esdhc_imx.c
> > @@ -1454,8 +1454,11 @@ static int fsl_esdhc_of_to_plat(struct
> udevice
> > *dev)
> >                         return ret;
> >                 }
> >
> > -               if (regulator_get_value(vqmmc_dev) == 1800000)
> > +               if (regulator_get_value(vqmmc_dev) == 1800000) {
> > +                       printf("value is 1.8V?????????????\n");
> >                         priv->vs18_enable = 1;
> > +               }
> > +               priv->vs18_enable = 0;
> >         }
> >         return 0;
> >  }
> >
> > If issue gone, I think issue is clear, driver think it is 1.8v, but it
> > is 3.3v actually.
> 
> With your Convert DM_PMIC patchstack and the change above (and
> without Frieders dt changes) the issue is gone:

Thanks for confirming this.

-Peng

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Frieder Schrempf]

On 26.03.26 09:05, Peng Fan wrote:
> Hi Teresa,
> 
> On Wed, Mar 25, 2026 at 12:35:59PM +0100, Frieder Schrempf wrote:
>> Hi Peng,
>>
>> On 25.03.26 12:12, Peng Fan wrote:
>>> Hi Frieder,
>>>
>>> On Wed, Mar 25, 2026 at 08:40:26AM +0100, Frieder Schrempf wrote:
>>>> On 25.03.26 04:50, Peng Fan wrote:
>>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>>> DM_PMIC
>>>>>>
>>>>>> Hello Peng,
>>>>>> Hello Yannic,
>>>>>>
>>>>>> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
>>>>>>> Hi Yannic,
>>>>>>>
>>>>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>>>>> DM_PMIC
>>>>>>>>
>>>>>>>> Hi Peng,
>>>>>>>>
>>>>>>>> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
>>>>>>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>>>>>>
>>>>>>>>> Convert the board to use DM_PMIC instead of the legacy SPL
>>>>>>>> I2C/PMIC
>>>>>>>>> handling.
>>>>>>>>>
>>>>>>>>> Changes include:
>>>>>>>>> - Enable DM_PMIC, DM_PMIC_PCA9450, and
>>>>>>>> SPL_DM_PMIC_PCA9450 in defconfig.
>>>>>>>>> - Drop legacy SPL I2C and PMIC options.
>>>>>>>>> - Remove manual I2C1 pad setup and legacy power_pca9450_init()
>>>>>>>> usage.
>>>>>>>>> - Use DM-based pmic_get() with the DT node "pmic@25".
>>>>>>>>> - Update PMIC register programming to use struct udevice API.
>>>>>>>>
>>>>>>>> these changes break something.
>>>>>>>>
>>>>>>>> Getting
>>>>>>>>
>>>>>>>> Loading Environment from MMC... Card did not respond to voltage
>>>>>>>> select! : -110
>>>>>>>> *** Warning - No block device, using default environment
>>>>>>>>
>>>>>>>> and SD card is not accessible as a result. I also worked on this
>>>>>>>> modernization and got the same result as with your commit. Have
>>>>>> not
>>>>>>>> had time to investigate the cause, yet.
>>>>>>>
>>>>>>> This change should not impact sd, unless pmic not probe correctly.
>>>>>>> You may give a look on "regulators", "pmic" in U-Boot shell, to see
>>>>>>> whether pmic is good.
>>>>>>>
>>>>>>> And you may also need to confirm, whether SD works or not without
>>>>>> this
>>>>>>> migration to DM_PMIC.
>>>>>>
>>>>>> I see the same issue. The error is gone when the patch is reverted again.
>>>>>> PMIC probing is working but the voltage change of SD-Card is probably
>>>>>> not.
>>>>>> We have set
>>>>>> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
>>>>>> vqmmc-supply = <&ldo5>;
>>>>>>
>>>>>> which references the PMIC.
>>>>>> The evk is not using this property.
>>>>>
>>>>> I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
>>>>> Not sure why this property impacts phycore-fpsc.
>>>>>
>>>>> The only suspecting point is 
>>>>>
>>>>> -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
>>>>> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
>>>>>
>>>>> No more ideas as of now.
>>>>
>>>> I'm pretty sure this issue is related to the VSELECT signal in some way.
>>>>
>>>> With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
>>>> controller controls the VSELECT signal that goes into the SD_VSEL input
>>>> of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally the
>>>> PMIC uses the state of SD_VSEL to decide which one of two voltage
>>>> registers for LDO5 is used.
>>>>
>>>> When vqmmc-supply is set, the driver additionally sets the voltage by
>>>> writing to the PMIC LDO5 voltage register. This can potentially cause
>>>> conflicts and lead to an invalid state, where the driver thinks the card
>>>> is in 1.8V state but the voltage is set to 3.3V or the other way round.
>>>>
>>>> One way to handle this, is to set the SION bit for the VSELECT signal
>>>> and specify the sd-vsel-gpios property in the ldo5 node. This allows the
>>>> PMIC driver to know about the current state of the VSELECT signal and
>>>> use the correct voltage register when setting or getting the LDO5 voltage.
>>>>
>>>> Below you can find some pointers for additional information. I hope this
>>>> helps to solve the issue on your board.
>>>
>>> Thanks for the detailed information. But I still have a question:
>>> For current phyboard-pollux-rdk, vqmmc-supply will always use
>>> PCA9450_LDO5CTRL_H for regulator value configuration.
>>>
>>> In drivers/mmc/fsl_esdhc_imx.c, when configure with 3.3V, PCA9450_LDO5CTRL_H
>>> will configured to 3.3V, but SD_VSEL is low, so no impact. When configure
>>> with 1.8V, PCA9450_LDO5CTRL_H will be configured to 1.8V, and SD_VSEL is high,
>>> so it should work.
>>>
>>> or I may miss something.
>>
>> I think you are right. The process is the same as in Linux and I never
>> saw any issue there. Just the fact that when reading back the voltage of
>> the LDO5 regulator in Linux or U-Boot you could get a wrong value. This
>> can be fixed as described before.
>>
>> So I'm really not sure what the actual problem is. I remember having a
>> similar or the same issue with our Kontron boards before switching to
>> the upstream DTS with sd-vsel-gpios. So it might also fix this issue
>> here, but of course it would be good to know the actual reason.
> 
> If possible, please help do a test. After applying the conver to DM_PMIC
> patch, then apply below patch to see whether you issue is gone.
> 
> diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
> index 335b44a8a1a..f92c0c91c4d 100644
> --- a/drivers/mmc/fsl_esdhc_imx.c
> +++ b/drivers/mmc/fsl_esdhc_imx.c
> @@ -1454,8 +1454,11 @@ static int fsl_esdhc_of_to_plat(struct udevice *dev)
>                         return ret;
>                 }
> 
> -               if (regulator_get_value(vqmmc_dev) == 1800000)
> +               if (regulator_get_value(vqmmc_dev) == 1800000) {
> +                       printf("value is 1.8V?????????????\n");
>                         priv->vs18_enable = 1;
> +               }
> +               priv->vs18_enable = 0;
>         }
>         return 0;
>  }
> 

Ah, this is the part I was missing. The driver is reading the regulator
voltage to check the mode. This returns the wrong value due to the
reasons explained above.

Thanks for investigating!

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan]

Hi Frieder,

On Wed, Mar 25, 2026 at 08:40:26AM +0100, Frieder Schrempf wrote:
>On 25.03.26 04:50, Peng Fan wrote:
>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>> DM_PMIC
>>>
>>> Hello Peng,
>>> Hello Yannic,
>>>
>>> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
>>>> Hi Yannic,
>>>>
>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>> DM_PMIC
>>>>>
>>>>> Hi Peng,
>>>>>
>>>>> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
>>>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>>>
>>>>>> Convert the board to use DM_PMIC instead of the legacy SPL
>>>>> I2C/PMIC
>>>>>> handling.
>>>>>>
>>>>>> Changes include:
>>>>>> - Enable DM_PMIC, DM_PMIC_PCA9450, and
>>>>> SPL_DM_PMIC_PCA9450 in defconfig.
>>>>>> - Drop legacy SPL I2C and PMIC options.
>>>>>> - Remove manual I2C1 pad setup and legacy power_pca9450_init()
>>>>> usage.
>>>>>> - Use DM-based pmic_get() with the DT node "pmic@25".
>>>>>> - Update PMIC register programming to use struct udevice API.
>>>>>
>>>>> these changes break something.
>>>>>
>>>>> Getting
>>>>>
>>>>> Loading Environment from MMC... Card did not respond to voltage
>>>>> select! : -110
>>>>> *** Warning - No block device, using default environment
>>>>>
>>>>> and SD card is not accessible as a result. I also worked on this
>>>>> modernization and got the same result as with your commit. Have
>>> not
>>>>> had time to investigate the cause, yet.
>>>>
>>>> This change should not impact sd, unless pmic not probe correctly.
>>>> You may give a look on "regulators", "pmic" in U-Boot shell, to see
>>>> whether pmic is good.
>>>>
>>>> And you may also need to confirm, whether SD works or not without
>>> this
>>>> migration to DM_PMIC.
>>>
>>> I see the same issue. The error is gone when the patch is reverted again.
>>> PMIC probing is working but the voltage change of SD-Card is probably
>>> not.
>>> We have set
>>> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
>>> vqmmc-supply = <&ldo5>;
>>>
>>> which references the PMIC.
>>> The evk is not using this property.
>> 
>> I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
>> Not sure why this property impacts phycore-fpsc.
>> 
>> The only suspecting point is 
>> 
>> -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
>> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
>> 
>> No more ideas as of now.
>
>I'm pretty sure this issue is related to the VSELECT signal in some way.
>
>With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
>controller controls the VSELECT signal that goes into the SD_VSEL input
>of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally the
>PMIC uses the state of SD_VSEL to decide which one of two voltage
>registers for LDO5 is used.
>
>When vqmmc-supply is set, the driver additionally sets the voltage by
>writing to the PMIC LDO5 voltage register. This can potentially cause
>conflicts and lead to an invalid state, where the driver thinks the card
>is in 1.8V state but the voltage is set to 3.3V or the other way round.
>
>One way to handle this, is to set the SION bit for the VSELECT signal
>and specify the sd-vsel-gpios property in the ldo5 node. This allows the
>PMIC driver to know about the current state of the VSELECT signal and
>use the correct voltage register when setting or getting the LDO5 voltage.
>
>Below you can find some pointers for additional information. I hope this
>helps to solve the issue on your board.
>
>Best regards
>Frieder
>
>Relevant U-Boot patchset:
>https://patchwork.ozlabs.org/project/uboot/cover/20250811131213.211124-1-frieder@fris.de/
>
>Relevant Kernel patchset:
>https://patchwork.kernel.org/project/linux-arm-kernel/cover/20241218152842.97483-1-frieder@fris.de/

I think this kernel patchset might be wrong.

GPIO1_04 is muxed as SD2_VSEL, reading GPIO1_04 will not able to get the PAD
value of SD2_VSEL.

I also tried in U-Boot on i.MX8MP-EVK.
u-boot=> mw 0x30330024 0x11 ==> set SION and MUX as SD2_VSELECT
u-boot=> md 0x30b500c0 1
30b500c0: 2000780b      ==>BIT 1 is VSEL, already 1                       .x.
u-boot=> md 0x30330284 1
30330284: 000000c0                             ....
u-boot=> mw 0x30330284 0x1d0  ==> Configure PAD
u-boot=> md 0x30200000 4       ==>Read back GPIO1
30200000: 00001028 00000000 00001028 00000000  (.......(.......

value of GPIO1_IO4 is 0, not 1, but VSEL register is 1 in SDHC2.

So with your kernel patchset, reading the voltage, it will always return 3.3v.

Regards
Peng

>
>Example for sd-vsel-gpios:
>https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L314
>
>Example for pinmux with SION bit:
>https://source.denx.de/u-boot/u-boot/-/blob/master/dts/upstream/src/arm64/freescale/imx8mp-kontron-osm-s.dtsi#L812

Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Frieder Schrempf]

On 30.03.26 04:23, Peng Fan wrote:
> Hi Frieder,
> 
> On Wed, Mar 25, 2026 at 08:40:26AM +0100, Frieder Schrempf wrote:
>> On 25.03.26 04:50, Peng Fan wrote:
>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>> DM_PMIC
>>>>
>>>> Hello Peng,
>>>> Hello Yannic,
>>>>
>>>> Am Dienstag, dem 24.03.2026 um 13:33 +0000 schrieb Peng Fan:
>>>>> Hi Yannic,
>>>>>
>>>>>> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
>>>>>> DM_PMIC
>>>>>>
>>>>>> Hi Peng,
>>>>>>
>>>>>> On Tue, 2026-03-24 at 18:30 +0800, Peng Fan (OSS) wrote:
>>>>>>> From: Peng Fan <peng.fan@nxp.com>
>>>>>>>
>>>>>>> Convert the board to use DM_PMIC instead of the legacy SPL
>>>>>> I2C/PMIC
>>>>>>> handling.
>>>>>>>
>>>>>>> Changes include:
>>>>>>> - Enable DM_PMIC, DM_PMIC_PCA9450, and
>>>>>> SPL_DM_PMIC_PCA9450 in defconfig.
>>>>>>> - Drop legacy SPL I2C and PMIC options.
>>>>>>> - Remove manual I2C1 pad setup and legacy power_pca9450_init()
>>>>>> usage.
>>>>>>> - Use DM-based pmic_get() with the DT node "pmic@25".
>>>>>>> - Update PMIC register programming to use struct udevice API.
>>>>>>
>>>>>> these changes break something.
>>>>>>
>>>>>> Getting
>>>>>>
>>>>>> Loading Environment from MMC... Card did not respond to voltage
>>>>>> select! : -110
>>>>>> *** Warning - No block device, using default environment
>>>>>>
>>>>>> and SD card is not accessible as a result. I also worked on this
>>>>>> modernization and got the same result as with your commit. Have
>>>> not
>>>>>> had time to investigate the cause, yet.
>>>>>
>>>>> This change should not impact sd, unless pmic not probe correctly.
>>>>> You may give a look on "regulators", "pmic" in U-Boot shell, to see
>>>>> whether pmic is good.
>>>>>
>>>>> And you may also need to confirm, whether SD works or not without
>>>> this
>>>>> migration to DM_PMIC.
>>>>
>>>> I see the same issue. The error is gone when the patch is reverted again.
>>>> PMIC probing is working but the voltage change of SD-Card is probably
>>>> not.
>>>> We have set
>>>> dts/upstream/src/arm64/freescale/imx8mp-phycore-fpsc.dtsi:
>>>> vqmmc-supply = <&ldo5>;
>>>>
>>>> which references the PMIC.
>>>> The evk is not using this property.
>>>
>>> I tried to add vqmmc-supply for i.MX8MP-EVK, I not see issues.
>>> Not sure why this property impacts phycore-fpsc.
>>>
>>> The only suspecting point is 
>>>
>>> -                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
>>> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x1c0
>>>
>>> No more ideas as of now.
>>
>> I'm pretty sure this issue is related to the VSELECT signal in some way.
>>
>> With MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT being set, the SDHC
>> controller controls the VSELECT signal that goes into the SD_VSEL input
>> of the PMIC and switches the LDO5 between 1.8V and 3.3V. Internally the
>> PMIC uses the state of SD_VSEL to decide which one of two voltage
>> registers for LDO5 is used.
>>
>> When vqmmc-supply is set, the driver additionally sets the voltage by
>> writing to the PMIC LDO5 voltage register. This can potentially cause
>> conflicts and lead to an invalid state, where the driver thinks the card
>> is in 1.8V state but the voltage is set to 3.3V or the other way round.
>>
>> One way to handle this, is to set the SION bit for the VSELECT signal
>> and specify the sd-vsel-gpios property in the ldo5 node. This allows the
>> PMIC driver to know about the current state of the VSELECT signal and
>> use the correct voltage register when setting or getting the LDO5 voltage.
>>
>> Below you can find some pointers for additional information. I hope this
>> helps to solve the issue on your board.
>>
>> Best regards
>> Frieder
>>
>> Relevant U-Boot patchset:
>> https://patchwork.ozlabs.org/project/uboot/cover/20250811131213.211124-1-frieder@fris.de/
>>
>> Relevant Kernel patchset:
>> https://patchwork.kernel.org/project/linux-arm-kernel/cover/20241218152842.97483-1-frieder@fris.de/
> 
> I think this kernel patchset might be wrong.
> 
> GPIO1_04 is muxed as SD2_VSEL, reading GPIO1_04 will not able to get the PAD
> value of SD2_VSEL.
> 
> I also tried in U-Boot on i.MX8MP-EVK.
> u-boot=> mw 0x30330024 0x11 ==> set SION and MUX as SD2_VSELECT
> u-boot=> md 0x30b500c0 1
> 30b500c0: 2000780b      ==>BIT 1 is VSEL, already 1                       .x.
> u-boot=> md 0x30330284 1
> 30330284: 000000c0                             ....
> u-boot=> mw 0x30330284 0x1d0  ==> Configure PAD
> u-boot=> md 0x30200000 4       ==>Read back GPIO1
> 30200000: 00001028 00000000 00001028 00000000  (.......(.......
> 
> value of GPIO1_IO4 is 0, not 1, but VSEL register is 1 in SDHC2.

I think you are right. I probably misinterpreted the documentation.

> 
> So with your kernel patchset, reading the voltage, it will always return 3.3v.

Not really. Reading the voltage in U-Boot works fine, which is why I
thought this is correct. But I probably also misinterpreted my test
results, as this only works by coincidence. We now always read from
LDO5CTRL_L and this seems to have the correct value even if LDO5CTRL_H
is actually in use.

UHS card:

=> mmc dev 1
switch to partitions #0, OK
mmc1 is current device
=> mmc info
Device: FSL_SDHC
Manufacturer ID: 27
OEM: 5048
Name: SD8GB
Bus Speed: 200000000
Mode: UHS SDR104 (208MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.2 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
=> regulator dev "NVCC_SD (LDO5)"
dev: NVCC_SD (LDO5) @ LDO5
=> regulator value
1800000 uV

HS card:

=> mmc dev 1
switch to partitions #0, OK
mmc1 is current device
=> mmc info
Device: FSL_SDHC
Manufacturer ID: 6f
OEM: 303
Name: CBADS
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 3.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
=> regulator value
3300000 uV

RE: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

[Peng Fan]

> Subject: Re: [PATCH 1/4] imx8mp: phyboard-pollux-rdk: Convert to
> DM_PMIC
> 
> >
> > I think this kernel patchset might be wrong.
> >
> > GPIO1_04 is muxed as SD2_VSEL, reading GPIO1_04 will not able to
> get
> > the PAD value of SD2_VSEL.
> >
> > I also tried in U-Boot on i.MX8MP-EVK.
> > u-boot=> mw 0x30330024 0x11 ==> set SION and MUX as
> SD2_VSELECT
> > u-boot=> md 0x30b500c0 1
> > 30b500c0: 2000780b      ==>BIT 1 is VSEL, already 1                       .x.
> > u-boot=> md 0x30330284 1
> > 30330284: 000000c0                             ....
> > u-boot=> mw 0x30330284 0x1d0  ==> Configure PAD
> > u-boot=> md 0x30200000 4       ==>Read back GPIO1
> > 30200000: 00001028 00000000 00001028 00000000  (.......(.......
> >
> > value of GPIO1_IO4 is 0, not 1, but VSEL register is 1 in SDHC2.
> 
> I think you are right. I probably misinterpreted the documentation.
> 
> >
> > So with your kernel patchset, reading the voltage, it will always
> return 3.3v.
> 
> Not really. Reading the voltage in U-Boot works fine, which is why I
> thought this is correct. But I probably also misinterpreted my test
> results, as this only works by coincidence. We now always read from
> LDO5CTRL_L and this seems to have the correct value even if
> LDO5CTRL_H is actually in use.
> 
> UHS card:
> 
> => mmc dev 1
> switch to partitions #0, OK
> mmc1 is current device
> => mmc info
> Device: FSL_SDHC
> Manufacturer ID: 27
> OEM: 5048
> Name: SD8GB
> Bus Speed: 200000000
> Mode: UHS SDR104 (208MHz)
> Rd Block Len: 512
> SD version 3.0
> High Capacity: Yes
> Capacity: 7.2 GiB
> Bus Width: 4-bit
> Erase Group Size: 512 Bytes
> => regulator dev "NVCC_SD (LDO5)"
> dev: NVCC_SD (LDO5) @ LDO5
> => regulator value
> 1800000 uV
> 
> HS card:
> 
> => mmc dev 1
> switch to partitions #0, OK
> mmc1 is current device
> => mmc info
> Device: FSL_SDHC
> Manufacturer ID: 6f
> OEM: 303
> Name: CBADS
> Bus Speed: 50000000
> Mode: SD High Speed (50MHz)
> Rd Block Len: 512
> SD version 3.0
> High Capacity: Yes
> Capacity: 3.8 GiB
> Bus Width: 4-bit
> Erase Group Size: 512 Bytes
> => regulator value
> 3300000 uV

I think the regulator is always configuring LDO5CTRL_L,
whether 1.8 or 3.3v.

You may check the dm_gpio_get_value return value
if you have time. It should always return 0.

I not do test, but I have checked the RTL code,
reading GPIO will not return the value of SD_VSEL
even if SION set.

Regards
Peng.

> 
> 

[PATCH 2/4] imx8mp: verdin: Convert to DM_PMIC

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi | 14 +++++--
 board/toradex/verdin-imx8mp/spl.c               | 55 +++++++------------------
 configs/verdin-imx8mp_defconfig                 | 13 ++----
 3 files changed, 31 insertions(+), 51 deletions(-)

diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
index 7b45a87450b..9d2e12682ca 100644
--- a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
@@ -70,7 +70,7 @@
 };
 
 &i2c1 {
-	bootph-pre-ram;
+	bootph-all;
 
 	eeprom_module: eeprom@50 {
 		compatible = "i2c-eeprom";
@@ -104,7 +104,7 @@
 };
 
 &pca9450 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &pinctrl_ctrl_sleep_moci {
@@ -112,7 +112,11 @@
 };
 
 &pinctrl_i2c1 {
-	bootph-pre-ram;
+	bootph-all;
+};
+
+&pinctrl_pmic {
+	bootph-all;
 };
 
 &pinctrl_usdhc2_pwr_en {
@@ -173,3 +177,7 @@
 &wdog1 {
 	bootph-pre-ram;
 };
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
+	bootph-all;
+};
diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c
index b39058b1b5d..44678a976ca 100644
--- a/board/toradex/verdin-imx8mp/spl.c
+++ b/board/toradex/verdin-imx8mp/spl.c
@@ -8,12 +8,8 @@
 #include <log.h>
 #include <spl.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/imx8mp_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/mxc_i2c.h>
 #include <asm/arch/ddr.h>
 #include <dm/device.h>
 #include <dm/uclass.h>
@@ -68,36 +64,21 @@ void spl_board_init(void)
 	puts("Normal Boot\n");
 }
 
-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
-		.gp = IMX_GPIO_NR(5, 14),
-	},
-	.sda = {
-		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
-		.gp = IMX_GPIO_NR(5, 15),
-	},
-};
-
-#if CONFIG_IS_ENABLED(POWER_LEGACY)
-#define I2C_PMIC	0
 int power_init_board(void)
 {
-	struct pmic *p;
+	struct udevice *dev;
 	int ret;
 
-	ret = power_pca9450_init(I2C_PMIC, 0x25);
-	if (ret)
-		printf("power init failed\n");
-	p = pmic_get("PCA9450");
-	pmic_probe(p);
+	ret = pmic_get("pmic@25", &dev);
+	if (ret == -ENODEV) {
+		puts("No pmic@25\n");
+		return 0;
+	}
+	if (ret < 0)
+		return ret;
 
 	/* BUCKxOUT_DVS0/1 control BUCK123 output */
-	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
 
 	/*
 	 * increase VDD_SOC to typical value 0.95V before first
@@ -107,23 +88,22 @@ int power_init_board(void)
 	 */
 	if (IS_ENABLED(CONFIG_IMX8M_VDD_SOC_850MV))
 		/* set DVS0 to 0.85v for special case */
-		pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14);
+		pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
 	else
-		pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1c);
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
-	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+		pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1c);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
 
 	/* Kernel uses OD/OD freq for SoC */
 	/* To avoid timing risk from SoC to ARM, increase VDD_ARM to OD voltage 0.95v */
-	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1c);
+	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1c);
 
 	/* set LDO4 and CONFIG2 to enable the I2C level translator */
-	pmic_reg_write(p, PCA9450_LDO4CTRL, 0x59);
-	pmic_reg_write(p, PCA9450_CONFIG2, 0x1);
+	pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x59);
+	pmic_reg_write(dev, PCA9450_CONFIG2, 0x1);
 
 	return 0;
 }
-#endif
 
 #if IS_ENABLED(CONFIG_SPL_LOAD_FIT)
 int board_fit_config_name_match(const char *name)
@@ -156,9 +136,6 @@ void board_init_f(ulong dummy)
 
 	enable_tzc380();
 
-	/* Adjust PMIC voltage to 1.0V for 800 MHz */
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
 	/* PMIC initialization */
 	power_init_board();
 
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index 99749c50194..455a601b07d 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -7,10 +7,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFDE00
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-verdin-wifi-dev"
 CONFIG_TARGET_VERDIN_IMX8MP=y
@@ -119,8 +115,6 @@ CONFIG_SPL_GPIO_HOG=y
 CONFIG_MXC_GPIO=y
 CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
-# CONFIG_SPL_DM_I2C is not set
-CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_I2C_EEPROM=y
@@ -152,14 +146,15 @@ CONFIG_PHY_IMX8M_PCIE=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
-CONFIG_SPL_POWER_LEGACY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_IMX8M_POWER_DOMAIN=y
 CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
-CONFIG_POWER_PCA9450=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
+CONFIG_DM_REGULATOR_PCA9450=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_POWER_I2C=y
 CONFIG_DM_RNG=y
 CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y

-- 
2.51.0

[PATCH 3/4] imx8mp: libra-fpsc: Convert to DM_PMIC

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi | 16 +++++++--
 board/phytec/imx8mp-libra-fpsc/spl.c           | 46 ++++++++------------------
 configs/imx8mp-libra-fpsc_defconfig            | 10 +++---
 3 files changed, 32 insertions(+), 40 deletions(-)

diff --git a/arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi b/arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi
index 1320f1540ed..661e5d0ad5f 100644
--- a/arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi
@@ -33,6 +33,18 @@
 	};
 };
 
+&pinctrl_i2c1 {
+	bootph-all;
+};
+
+&pinctrl_pmic {
+	bootph-all;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
+	bootph-all;
+};
+
 &reg_usdhc2_vmmc {
 	bootph-pre-ram;
 };
@@ -78,11 +90,11 @@
 };
 
 &i2c1 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &pmic {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 /* USB1 Type-C */
diff --git a/board/phytec/imx8mp-libra-fpsc/spl.c b/board/phytec/imx8mp-libra-fpsc/spl.c
index 08111641aa6..aa22ad0030c 100644
--- a/board/phytec/imx8mp-libra-fpsc/spl.c
+++ b/board/phytec/imx8mp-libra-fpsc/spl.c
@@ -9,9 +9,6 @@
 #include <asm/arch/imx8mp_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/gpio.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/iomux-v3.h>
 #include <hang.h>
 #include <init.h>
 #include <log.h>
@@ -46,45 +43,32 @@ void spl_dram_init(void)
 	ddr_init(&dram_timing);
 }
 
-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
-		.gp = IMX_GPIO_NR(5, 14),
-	},
-	.sda = {
-		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
-		.gp = IMX_GPIO_NR(5, 15),
-	},
-};
-
 int power_init_board(void)
 {
-	struct pmic *p;
+	struct udevice *dev;
 	int ret;
 
-	ret = power_pca9450_init(0, 0x25);
-	if (ret)
-		printf("power init failed");
-	p = pmic_get("PCA9450");
-	pmic_probe(p);
+	ret = pmic_get("pmic@25", &dev);
+	if (ret == -ENODEV) {
+		puts("No pmic@25\n");
+		return 0;
+	}
+	if (ret < 0)
+		return ret;
 
 	/* BUCKxOUT_DVS0/1 control BUCK123 output */
-	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
 
 	/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
-	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
+	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
 
 	/* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
-	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
 
 	/* Set WDOG_B_CFG to cold reset */
-	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
+	pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
 
 	return 0;
 }
@@ -120,8 +104,6 @@ void board_init_f(ulong dummy)
 
 	enable_tzc380();
 
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
 	power_init_board();
 
 	/* DDR initialization */
diff --git a/configs/imx8mp-libra-fpsc_defconfig b/configs/imx8mp-libra-fpsc_defconfig
index a23e604425d..4a8938d3e43 100644
--- a/configs/imx8mp-libra-fpsc_defconfig
+++ b/configs/imx8mp-libra-fpsc_defconfig
@@ -9,7 +9,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x3C0000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-libra-rdk-fpsc"
 CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000
@@ -105,8 +104,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
 CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
 CONFIG_MXC_GPIO=y
 CONFIG_DM_I2C=y
-# CONFIG_SPL_DM_I2C is not set
-CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x51
 CONFIG_SUPPORT_EMMC_BOOT=y
@@ -138,15 +135,16 @@ CONFIG_PHY_IMX8MQ_USB=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
-CONFIG_SPL_POWER_LEGACY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_IMX8M_POWER_DOMAIN=y
 CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
-CONFIG_POWER_PCA9450=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
 CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PCA9450=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_POWER_I2C=y
 CONFIG_DM_RNG=y
 CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y

-- 
2.51.0

[PATCH 4/4] imx8mp: icore-edimm2.2: Convert to DM_PMIC

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi    | 18 +++++++-
 board/engicam/imx8mp/spl.c                         | 53 +++++++---------------
 configs/imx8mp-icore-mx8mp-edimm2.2_defconfig      | 12 ++---
 3 files changed, 38 insertions(+), 45 deletions(-)

diff --git a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi
index cf2a87a9b90..13e1070c28e 100644
--- a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi
@@ -22,6 +22,18 @@
 	bootph-pre-ram;
 };
 
+&pca9450 {
+	bootph-all;
+};
+
+&pinctrl_i2c1 {
+	bootph-all;
+};
+
+&pinctrl_pmic {
+	bootph-all;
+};
+
 &pinctrl_uart2 {
 	bootph-pre-ram;
 };
@@ -63,7 +75,7 @@
 };
 
 &i2c1 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &i2c2 {
@@ -118,3 +130,7 @@
 	phy-reset-duration = <15>;
 	phy-reset-post-delay = <100>;
 };
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
+	bootph-all;
+};
diff --git a/board/engicam/imx8mp/spl.c b/board/engicam/imx8mp/spl.c
index c1aa28a17bc..46c581ea51f 100644
--- a/board/engicam/imx8mp/spl.c
+++ b/board/engicam/imx8mp/spl.c
@@ -16,9 +16,6 @@
 #include <asm/arch/imx8mp_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/mxc_i2c.h>
 #include <asm/arch/ddr.h>
 #include <power/pmic.h>
 #include <power/pca9450.h>
@@ -33,36 +30,22 @@ void spl_dram_init(void)
 	ddr_init(&dram_timing);
 }
 
-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
-		.gp = IMX_GPIO_NR(5, 14),
-	},
-	.sda = {
-		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
-		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
-		.gp = IMX_GPIO_NR(5, 15),
-	},
-};
-
-#if CONFIG_IS_ENABLED(POWER_LEGACY)
-#define I2C_PMIC	0
+#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
 int power_init_board(void)
 {
-	struct pmic *p;
+	struct udevice *dev;
 	int ret;
 
-	ret = power_pca9450_init(I2C_PMIC, 0x25);
-	if (ret)
-		printf("power init failed");
-	p = pmic_get("PCA9450");
-	pmic_probe(p);
+	ret = pmic_get("pmic@25", &dev);
+	if (ret == -ENODEV) {
+		puts("No pmic@25\n");
+		return 0;
+	}
+	if (ret < 0)
+		return ret;
 
 	/* BUCKxOUT_DVS0/1 control BUCK123 output */
-	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
 
 #ifdef CONFIG_IMX8M_LPDDR4
 	/*
@@ -73,22 +56,22 @@ int power_init_board(void)
 	 */
 #ifdef CONFIG_IMX8M_VDD_SOC_850MV
 	/* set DVS0 to 0.85v for special case*/
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
 #else
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
 #endif
-	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
-	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+	pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
 
 	/* Kernel uses OD/OD freq for SOC */
 	/* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */
-	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+	pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
 #elif defined(CONFIG_IMX8M_DDR4)
 	/* DDR4 runs at 3200MTS, uses default ND 0.85v for VDD_SOC and VDD_ARM */
-	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+	pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
 
 	/* Set NVCC_DRAM to 1.2v for DDR4 */
-	pmic_reg_write(p, PCA9450_BUCK6OUT, 0x18);
+	pmic_reg_write(dev, PCA9450_BUCK6OUT, 0x18);
 #endif
 
 	return 0;
@@ -136,8 +119,6 @@ void board_init_f(ulong dummy)
 
 	enable_tzc380();
 
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
 	power_init_board();
 
 	/* DDR initialization */
diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
index 0649d746907..ee55d804980 100644
--- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
+++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
@@ -7,9 +7,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x400000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx8mp-icore-mx8mp-edimm2.2"
 CONFIG_TARGET_IMX8MP_ICORE_MX8MP=y
@@ -78,8 +75,6 @@ CONFIG_CLK_IMX8MP=y
 CONFIG_MXC_GPIO=y
 CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
-# CONFIG_SPL_DM_I2C is not set
-CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_SUPPORT_EMMC_BOOT=y
@@ -98,12 +93,13 @@ CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
-CONFIG_SPL_POWER_LEGACY=y
-CONFIG_POWER_PCA9450=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
 CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PCA9450=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_POWER_I2C=y
 CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y

-- 
2.51.0