Re: [PATCH v2] mmc: zynq_sdhci: support Renesas RZ/N1

[Ralph Siemsen <ralph.siemsen@linaro.org>]

On Sat, Aug 15, 2026 at 12:21:11AM +0200, Marek Vasut wrote:
>On 8/14/26 8:30 PM, Ralph Siemsen wrote:
>
>[...]
>
>>+++ b/drivers/mmc/zynq_sdhci.c
>
>[...]
>
>>@@ -1152,13 +1177,13 @@ static int arasan_sdhci_probe(struct udevice *dev)
>>  		}
>>  	}
>>-	ret = clk_get_by_index(dev, 0, &clk);
>>+	ret = clk_get_bulk(dev, &clks);
>>  	if (ret < 0) {
>>-		dev_err(dev, "failed to get clock\n");
>>+		dev_err(dev, "failed to get clock(s)\n");
>
>"failed to get clock(s) (%d)\n", ret);
>
>Please fix globally.

Will do in v3. I'll just do the clock-related debug prints, since I am 
modifying them already.

There are other (non-clock) debug prints that could benefit from same 
treatment, but that would be better done as a separate cleanup patch.

>>  		return ret;
>>  	}
>>-	clock = clk_get_rate(&clk);
>>+	clock = clk_get_rate(&clks.clks[0]);
>
>Can the clock ever be non-first clock , i.e. do you need to handle 
>clock-names DT property somehow ?

It's not clear to me if the DT binding specifies the order. It says 
there must be either 2 or 3 clocks, as well as clock-names properties.

Existing DTS files (rzn1 and zynqmp) have it as the first clock.

We could try using the name ("clk_xin") and if that fails, fall back on 
using the first clock.

Regards,
Ralph