From: Carlo Caione <ccaione@baylibre.com>
To: David Lechner <dlechner@baylibre.com>
Cc: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
u-boot@lists.u-boot-project.org,
"Julien Masson" <jmasson@baylibre.com>,
"Quentin Schulz" <u-boot@0leil.net>,
"Marek Vasut" <marek.vasut+renesas@mailbox.org>,
"Ryder Lee" <ryder.lee@mediatek.com>,
"Weijie Gao" <weijie.gao@mediatek.com>,
"Chunfeng Yun" <chunfeng.yun@mediatek.com>,
"Igor Belwon" <igor.belwon@mentallysanemainliners.org>,
"Julien Stephan" <jstephan@baylibre.com>,
"Macpaul Lin" <Macpaul.Lin@mediatek.com>,
"Tom Rini" <trini@konsulko.com>,
"Ilias Apalodimas" <ilias.apalodimas@linaro.org>,
"Vitor Sato Eschholz" <vsatoes@baylibre.com>,
"Johan Jonker" <jbx6244@gmail.com>,
"Bastien Curutchet" <bastien.curutchet@bootlin.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Alexey Charkov" <alchark@gmail.com>,
"Suhrid Subramaniam" <Suhrid.Subramaniam@mediatek.com>,
"Arnaud Ferraris" <arnaud.ferraris@collabora.com>,
"Pablo Sun (孫毓翔)" <pablo.sun@mediatek.com>
Subject: Re: [PATCH v6 6/6] doc: board: mediatek: document Genio 510 and 700 SPL boot
Date: Wed, 9 Sep 2026 22:54:05 +0200 [thread overview]
Message-ID: <aqHGk-XC59Ddhcl-@macbook> (raw)
In-Reply-To: <f12ef161-582c-458d-b49d-974ab55e7788@baylibre.com>
On Wed, Sep 09, 2026 at 14:56:02 +0100, David Lechner wrote:
> On 9/6/26 10:30 AM, Carlo Caione wrote:
> > Document the common Genio 510 and Genio 700 eMMC boot chain,
> > board-specific external firmware prerequisites, binman build invocation
> > and generated images.
> >
>
> ...
>
> > +DDR-loader handoff contract
> > +---------------------------
> > +
> > +The DDR loader and U-Boot SPL have no parameter-block or firmware-call
> > +interface. Their contract consists of a fixed image layout, initialized DRAM
> > +and the execution state at the SPL entry point. Different DDR-loader
> > +implementations may be used as long as they satisfy this contract for the
> > +selected board. The BootROM loads the eMMC boot0 payload to
> > +``CONFIG_MTK_GENIO_BROM_LOAD_ADDR``::
> > +
> > + offset 0 +----------------------+
> > + | DDR loader |
> > + | |
> > + offset CONFIG_MTK_GENIO_DDR_LOADER_SIZE +----------------------+
> > + | U-Boot SPL |
> > + | CONFIG_SPL_MAX_SIZE |
> > + image end +----------------------+
> > +
> > +The DDR loader then performs the following handoff::
> > +
> > + initialize and train DRAM
> > +
> > + copy:
> > + source = CONFIG_MTK_GENIO_BROM_LOAD_ADDR
> > + + CONFIG_MTK_GENIO_DDR_LOADER_SIZE
> > + destination = CONFIG_SPL_TEXT_BASE
> > + size = CONFIG_SPL_MAX_SIZE
>
> Do CONFIG_MTK_GENIO_DDR_LOADER_SIZE and CONFIG_SPL_MAX_SIZE need to be the
> same or just CONFIG_SPL_MAX_SIZE >= CONFIG_MTK_GENIO_DDR_LOADER_SIZE?
They refer to two different things: CONFIG_MTK_GENIO_DDR_LOADER_SIZE
reserves space for the DDR loader while CONFIG_MTK_GENIO_DDR_LOADER_SIZE
is the size of the following SPL region which the loader copies to DRAM.
--
Carlo Caione
next prev parent reply other threads:[~2026-09-09 20:54 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-06 15:30 [PATCH v6 0/6] Add Genio 510 and Genio 700 SPL boot support Carlo Caione
2026-09-06 15:30 ` [PATCH v6 1/6] arm: dts: mediatek: prepare Genio 510 and 700 devices for SPL Carlo Caione
2026-09-09 19:33 ` David Lechner
2026-09-09 20:36 ` Carlo Caione
2026-09-06 15:30 ` [PATCH v6 2/6] configs: mt8188: enable eMMC FIT boot from SPL Carlo Caione
2026-09-07 3:45 ` Macpaul Lin (林智斌)
2026-09-09 19:35 ` David Lechner
2026-09-09 20:37 ` Carlo Caione
2026-09-06 15:30 ` [PATCH v6 3/6] arm: mediatek: build Genio 510 and 700 boot images with binman Carlo Caione
2026-09-09 19:39 ` David Lechner
2026-09-09 20:42 ` Carlo Caione
2026-09-06 15:30 ` [PATCH v6 4/6] arm: dts: mediatek: support signed Genio 510 and 700 bootloader FIT Carlo Caione
2026-09-06 15:30 ` [PATCH v6 5/6] arm: dts: mediatek: emit the Genio 510 and 700 BootROM payload Carlo Caione
2026-09-06 15:30 ` [PATCH v6 6/6] doc: board: mediatek: document Genio 510 and 700 SPL boot Carlo Caione
2026-09-07 3:48 ` Macpaul Lin (林智斌)
2026-09-09 19:56 ` David Lechner
2026-09-09 20:54 ` Carlo Caione [this message]
2026-09-09 20:58 ` Carlo Caione
2026-09-09 21:00 ` David Lechner
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