From: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/5] arm: socfpga: move SDR reset handling to driver
Date: Sun, 27 Jan 2019 09:47:27 +0100 [thread overview]
Message-ID: <b5cef953-ceab-3074-dac3-babc1ca57684@gmail.com> (raw)
In-Reply-To: <eaa7903b-c455-6d05-30b0-fe3786125c86@denx.de>
Am 26.01.2019 um 09:58 schrieb Marek Vasut:
> On 1/25/19 9:30 PM, Simon Goldschmidt wrote:
>> To clean up reset handling for socfpga gen5, let's move the code snippet
>> taking the DDR controller out of reset from SPL to the DDR driver.
>>
>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
>> ---
>>
>> arch/arm/mach-socfpga/spl_gen5.c | 1 -
>> drivers/ddr/altera/sdram_gen5.c | 4 ++++
>> 2 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
>> index ccdc661d05..f9bea892b1 100644
>> --- a/arch/arm/mach-socfpga/spl_gen5.c
>> +++ b/arch/arm/mach-socfpga/spl_gen5.c
>> @@ -98,7 +98,6 @@ void board_init_f(ulong dummy)
>> socfpga_bridges_reset(1);
>> }
>>
>> - socfpga_per_reset(SOCFPGA_RESET(SDR), 0);
>> socfpga_per_reset(SOCFPGA_RESET(UART0), 0);
>> socfpga_per_reset(SOCFPGA_RESET(OSC1TIMER0), 0);
>>
>> diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
>> index 821060459c..bd54c420f8 100644
>> --- a/drivers/ddr/altera/sdram_gen5.c
>> +++ b/drivers/ddr/altera/sdram_gen5.c
>> @@ -7,6 +7,7 @@
>> #include <div64.h>
>> #include <watchdog.h>
>> #include <asm/arch/fpga_manager.h>
>> +#include <asm/arch/reset_manager.h>
>> #include <asm/arch/sdram.h>
>> #include <asm/arch/system_manager.h>
>> #include <asm/io.h>
>> @@ -434,6 +435,9 @@ int sdram_mmr_init_full(unsigned int sdr_phy_reg)
>> SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB;
>> int ret;
>>
>> + /* release DDR from reset */
>> + socfpga_per_reset(SOCFPGA_RESET(SDR), 0);
>> +
>
> Can the reset framework do this ?
Hmm, it probably could, but I see that as a diferent patch. The altera
DDR driver currently does not work with devicetree, so using the reset
framework here would be a bigger patch, I think.
Can we do that later and clean up this by just moving the code?
Regards,
Simon
>
>> writel(rows, &sysmgr_regs->iswgrp_handoff[4]);
>>
>> sdr_load_regs(cfg);
>>
>
>
next prev parent reply other threads:[~2019-01-27 8:47 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-25 20:30 [U-Boot] [PATCH 0/5] arm: socfpga: implement proper peripheral reset handling Simon Goldschmidt
2019-01-25 20:30 ` [U-Boot] [PATCH 1/5] arm: socfpga: gen5: add reset handles to devicetrees Simon Goldschmidt
2019-01-26 8:57 ` Marek Vasut
2019-01-27 8:45 ` Simon Goldschmidt
2019-01-28 10:54 ` Marek Vasut
2019-01-28 11:46 ` Simon Goldschmidt
2019-01-28 11:48 ` Marek Vasut
2019-01-25 20:30 ` [U-Boot] [PATCH 2/5] arm: socfpga: move SDR reset handling to driver Simon Goldschmidt
2019-01-26 8:58 ` Marek Vasut
2019-01-27 8:47 ` Simon Goldschmidt [this message]
2019-01-28 10:55 ` Marek Vasut
2019-01-28 11:49 ` Simon Goldschmidt
2019-01-28 11:58 ` Marek Vasut
2019-01-28 12:38 ` Simon Goldschmidt
2019-01-28 19:02 ` Marek Vasut
2019-01-28 19:17 ` Simon Goldschmidt
2019-01-28 19:24 ` Marek Vasut
2019-01-29 8:23 ` Simon Goldschmidt
2019-01-29 9:52 ` Marek Vasut
2019-01-25 20:30 ` [U-Boot] [PATCH 3/5] mtd: rawnand: denali: add reset handling Simon Goldschmidt
2019-01-26 8:58 ` Marek Vasut
2019-01-28 9:08 ` Miquel Raynal
2019-01-28 9:16 ` Simon Goldschmidt
2019-01-28 9:22 ` Miquel Raynal
2019-01-28 9:30 ` Simon Goldschmidt
2019-01-28 9:33 ` Miquel Raynal
2019-01-25 20:30 ` [U-Boot] [PATCH 4/5] spi: cadence_qspi: " Simon Goldschmidt
2019-01-26 8:59 ` Marek Vasut
2019-01-27 8:49 ` Simon Goldschmidt
2019-01-28 10:56 ` Marek Vasut
2019-01-25 20:30 ` [U-Boot] [PATCH 5/5] arm: socfpga: implement proper peripheral reset Simon Goldschmidt
2019-01-26 9:00 ` Marek Vasut
2019-01-27 8:56 ` Simon Goldschmidt
2019-01-28 10:58 ` Marek Vasut
2019-01-28 11:50 ` Simon Goldschmidt
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