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[173.73.95.180]) by smtp.gmail.com with ESMTPSA id x25-20020ac85399000000b00341f912e64dsm3059401qtp.93.2022.08.12.21.11.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Aug 2022 21:11:38 -0700 (PDT) Subject: Re: [RESEND PATCH v2] clk: update clk_clean_rate_cache to use private clk struct To: Patrick Delaunay , u-boot@lists.denx.de Cc: Tero Kristo , Sean Anderson , Tero Kristo , Lukasz Majewski , U-Boot STM32 References: <20220712142352.RESEND.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid> From: Sean Anderson Message-ID: Date: Sat, 13 Aug 2022 00:11:36 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20220712142352.RESEND.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Patrick, Sorry for the (very late) response. On 7/12/22 8:24 AM, Patrick Delaunay wrote: > In clk_clean_rate_cache, clk->rate should update the private clock > struct, in particular when CCF is activated, to save the cached > rate value. > > When clk_get_parent_rate is called, the cached information > is read from pclk->rate, with pclk = clk_get_parent(clk). > > As the cached is read from private clk data, the update should > be done also on it. > > Fixes: 6b7fd3128f7 ("clk: fix set_rate to clean up cached rates for the hierarchy") > Signed-off-by: Patrick Delaunay > --- > > Changes in v2: > - set *clkp = clk when CCF is not activated and when the clock is not found > > drivers/clk/clk-uclass.c | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c > index b89c77bf794..5cfa022a6dc 100644 > --- a/drivers/clk/clk-uclass.c > +++ b/drivers/clk/clk-uclass.c > @@ -544,6 +544,19 @@ ulong clk_round_rate(struct clk *clk, ulong rate) > return ops->round_rate(clk, rate); > } > > +static void clk_get_priv(struct clk *clk, struct clk **clkp) > +{ > + *clkp = clk; > + > + /* get private clock struct associated to the provided clock */ > + if (CONFIG_IS_ENABLED(CLK_CCF)) { > + /* Take id 0 as a non-valid clk, such as dummy */ > + if (clk->id) > + clk_get_by_id(clk->id, clkp); > + } > +} > + > +/* clean cache, called with private clock struct */ > static void clk_clean_rate_cache(struct clk *clk) > { > struct udevice *child_dev; > @@ -563,6 +576,7 @@ static void clk_clean_rate_cache(struct clk *clk) > ulong clk_set_rate(struct clk *clk, ulong rate) > { > const struct clk_ops *ops; > + struct clk *clkp; > > debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); > if (!clk_valid(clk)) > @@ -572,8 +586,10 @@ ulong clk_set_rate(struct clk *clk, ulong rate) > if (!ops->set_rate) > return -ENOSYS; > > + /* get private clock struct used for cache */ > + clk_get_priv(clk, &clkp); > /* Clean up cached rates for us and all child clocks */ > - clk_clean_rate_cache(clk); > + clk_clean_rate_cache(clkp); > > return ops->set_rate(clk, rate); > } > Reviewed-by: Sean Anderson