From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sylwester Nawrocki Date: Wed, 29 Apr 2020 10:14:03 +0200 Subject: [PATCH v1 09/10] pci: Add driver for Broadcom STB PCIe controller In-Reply-To: <6d97bda2d7b3d5893de1e7fa4aa78d9322372dec.camel@suse.de> References: <20200424165012.31915-1-s.nawrocki@samsung.com> <20200424165012.31915-10-s.nawrocki@samsung.com> <6d97bda2d7b3d5893de1e7fa4aa78d9322372dec.camel@suse.de> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Nicolas, On 4/28/20 15:59, Nicolas Saenz Julienne wrote: >> + /* >> + * For config space accesses on the RC, show the right class for >> + * a PCIe-PCIe bridge (the default setting is to be EP mode). >> + */ >> + tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3); >> + u32p_replace_bits(&tmp, 0x060400, >> + PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK); >> + writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3); >> + >> + if (pcie->ssc) { >> + ret = brcm_pcie_set_ssc(base); > This call should be like this: > > ret = brcm_pcie_set_ssc(pcie); > > It builds alright since base is a void pointer. But it obvioulsy causes issues > further down the line. Thanks for pointing this out, I have fixed it and re-tested again with SSC enabled and disabled. -- Regards, Sylwester