From: Jaehoon Chung <jh80.chung@gmail.com>
To: Ashok Reddy Soma <ashok.reddy.soma@amd.com>, u-boot@lists.denx.de
Cc: peng.fan@nxp.com, jh80.chung@samsung.com,
kever.yang@rock-chips.com, hayashi.kunihiko@socionext.com,
alpernebiyasak@gmail.com, xypron.glpk@gmx.de, git@amd.com,
michal.simek@amd.com
Subject: Re: [3/4] mmc: sdhci: Enable HS400 support if available in caps
Date: Tue, 31 Jan 2023 21:40:37 +0900 [thread overview]
Message-ID: <b7e670b4-ec97-4c3e-8058-2941f6ca04ff@gmail.com> (raw)
In-Reply-To: <20230110113124.1434-4-ashok.reddy.soma@amd.com>
On 1/10/23 20:31, Ashok Reddy Soma wrote:
> HS400 is indicated in bit63 of capability register in few IP's.
> Add a quirk to check this and add HS400 to host capabilities.
>
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Best Regards,
Jaehoon Chung
> ---
> drivers/mmc/sdhci.c | 4 ++++
> include/sdhci.h | 3 +++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 181ab9b7cb..c6b250b9a1 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -995,6 +995,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
> cfg->host_caps |= MMC_CAP(UHS_SDR50);
> }
>
> + if ((host->quirks & SDHCI_QUIRK_CAPS_BIT63_FOR_HS400) &&
> + (caps_1 & SDHCI_SUPPORT_HS400))
> + cfg->host_caps |= MMC_CAP(MMC_HS_400);
> +
> if (caps_1 & SDHCI_SUPPORT_DDR50)
> cfg->host_caps |= MMC_CAP(UHS_DDR50);
>
> diff --git a/include/sdhci.h b/include/sdhci.h
> index 64a3d309da..70fefca2a9 100644
> --- a/include/sdhci.h
> +++ b/include/sdhci.h
> @@ -189,6 +189,7 @@
> #define SDHCI_SUPPORT_SDR50 0x00000001
> #define SDHCI_SUPPORT_SDR104 0x00000002
> #define SDHCI_SUPPORT_DDR50 0x00000004
> +#define SDHCI_SUPPORT_HS400 BIT(31)
> #define SDHCI_USE_SDR50_TUNING 0x00002000
>
> #define SDHCI_CLOCK_MUL_MASK 0x00FF0000
> @@ -248,6 +249,8 @@
> #define SDHCI_QUIRK_USE_WIDE8 (1 << 8)
> #define SDHCI_QUIRK_NO_1_8_V (1 << 9)
> #define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10)
> +/* Capability register bit-63 indicates HS400 support */
> +#define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400 BIT(11)
>
> /* to make gcc happy */
> struct sdhci_host;
next prev parent reply other threads:[~2023-01-31 12:43 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-10 11:31 [0/4] Add eMMC 5.1 support for Versal NET Ashok Reddy Soma
2023-01-10 11:31 ` [1/4] mmc: zynq_sdhci: Add support for eMMC5.1 for Versal NET platform Ashok Reddy Soma
2023-01-31 12:40 ` Jaehoon Chung
2023-01-10 11:31 ` [2/4] mmc: sdhci: Check and call config_dll callback functions Ashok Reddy Soma
2023-01-31 12:40 ` Jaehoon Chung
2023-01-10 11:31 ` [3/4] mmc: sdhci: Enable HS400 support if available in caps Ashok Reddy Soma
2023-01-31 12:40 ` Jaehoon Chung [this message]
2023-01-10 11:31 ` [4/4] mmc: zynq_sdhci: Add support and quirk for HS400 Ashok Reddy Soma
2023-01-31 12:40 ` Jaehoon Chung
2023-01-24 13:01 ` [0/4] Add eMMC 5.1 support for Versal NET Michal Simek
2023-01-26 2:29 ` Jaehoon Chung
2023-01-31 13:07 ` Michal Simek
2023-01-31 23:11 ` Jaehoon Chung
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