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Tue, 31 Jan 2023 04:40:40 -0800 (PST) Message-ID: Date: Tue, 31 Jan 2023 21:40:37 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [3/4] mmc: sdhci: Enable HS400 support if available in caps Content-Language: en-US To: Ashok Reddy Soma , u-boot@lists.denx.de Cc: peng.fan@nxp.com, jh80.chung@samsung.com, kever.yang@rock-chips.com, hayashi.kunihiko@socionext.com, alpernebiyasak@gmail.com, xypron.glpk@gmx.de, git@amd.com, michal.simek@amd.com References: <20230110113124.1434-1-ashok.reddy.soma@amd.com> <20230110113124.1434-4-ashok.reddy.soma@amd.com> From: Jaehoon Chung In-Reply-To: <20230110113124.1434-4-ashok.reddy.soma@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On 1/10/23 20:31, Ashok Reddy Soma wrote: > HS400 is indicated in bit63 of capability register in few IP's. > Add a quirk to check this and add HS400 to host capabilities. > > Signed-off-by: Ashok Reddy Soma Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > drivers/mmc/sdhci.c | 4 ++++ > include/sdhci.h | 3 +++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c > index 181ab9b7cb..c6b250b9a1 100644 > --- a/drivers/mmc/sdhci.c > +++ b/drivers/mmc/sdhci.c > @@ -995,6 +995,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, > cfg->host_caps |= MMC_CAP(UHS_SDR50); > } > > + if ((host->quirks & SDHCI_QUIRK_CAPS_BIT63_FOR_HS400) && > + (caps_1 & SDHCI_SUPPORT_HS400)) > + cfg->host_caps |= MMC_CAP(MMC_HS_400); > + > if (caps_1 & SDHCI_SUPPORT_DDR50) > cfg->host_caps |= MMC_CAP(UHS_DDR50); > > diff --git a/include/sdhci.h b/include/sdhci.h > index 64a3d309da..70fefca2a9 100644 > --- a/include/sdhci.h > +++ b/include/sdhci.h > @@ -189,6 +189,7 @@ > #define SDHCI_SUPPORT_SDR50 0x00000001 > #define SDHCI_SUPPORT_SDR104 0x00000002 > #define SDHCI_SUPPORT_DDR50 0x00000004 > +#define SDHCI_SUPPORT_HS400 BIT(31) > #define SDHCI_USE_SDR50_TUNING 0x00002000 > > #define SDHCI_CLOCK_MUL_MASK 0x00FF0000 > @@ -248,6 +249,8 @@ > #define SDHCI_QUIRK_USE_WIDE8 (1 << 8) > #define SDHCI_QUIRK_NO_1_8_V (1 << 9) > #define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10) > +/* Capability register bit-63 indicates HS400 support */ > +#define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400 BIT(11) > > /* to make gcc happy */ > struct sdhci_host;