RE: [PATCH v2 3/7] mtd: spi-nor-ids: Add support for GigaDevice GD25Q256

[<Takahiro.Kuwano@infineon.com>]

Hi,

> This flash is tested on MediaTek's filogic platform.
> 
> The datasheet can be found here:
> https://download.gigadevice.com/Datasheet/DS-00526-GD25Q256E-Rev1.3.pdf

Please add a quick introduction/description about the device in commit
message and use Link: tag for datasheet reference.

> 
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> ---
> v2: updated commit message
> ---
>  drivers/mtd/spi/spi-nor-ids.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index fcc546fb5ae..8b74fbd4946 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -147,6 +147,11 @@ const struct flash_info spi_nor_ids[] = {
>                         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
>                         SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
>         },
> +       {
> +               INFO("gd25q256", 0xc84019, 0, 64 * 1024, 512,
> +                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)

Did you test locking feature?
Per datasheet, this device has 4-bit BPs and TB at SR BIT(6), while current
u-boot supports 3-bit BPs and TB at SR BIT(5) only.

> +       },
>         /* adding these 3V QSPI flash parts */
>         {INFO("gd25b256", 0xc84019, 0, 64 * 1024, 512,  SECT_4K |
>         SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)  },
> --
> 2.45.2

Thanks,
Takahiro