[U-Boot] [PATCH v3 0/6] MX31: NAND boot for PDK boards.

[U-Boot] [PATCH v3 0/6] MX31: NAND boot for PDK boards.

[Magnus Lilja]

Hi all,

This is the latest set of patches that introduces NAND boot support
for the i.MX31 CPU in general and the PDK board especially.

The patches apply on u-boot next and u-boot-arm next.

I've taken care of all comments received (at least I think so) and
changes from the previous version include:
* Moved init of i.MX31 UART+SPI to a devices.c file which other boards
  can use as well
* Included JC's macros.h file which contains macros to be used by 
  assembly code
* Renamed nand_boot_mx31.c to nand_boot_fsl_nfc.c since it's probable
  that this can be used by other SoCs as well (e.g. mx27?)
* The nand_boot_fsl_nfc.c uses a struct for the NFC and read/write 
  operations without volatile.
* Made the lowlevel_init.S somewhat easier to understand.

The code boots on i.MX31 PDK board using large page NAND, it should
work for small page NAND as well but that has not been tested.

Regards, Magnus Lilja

Jean-Christophe PLAGNIOL-VILLARD (1):
  ARM: Add macros.h to be used in assembler file.

Magnus Lilja (5):
  ARM1136: Introduce CONFIG_PRELOADER macro.
  MX31: Add NAND SPL for i.MX31.
  i.MX31: Create a common device file.
  MX31: Add basic support for Freescale i.MX31 PDK board.
  MX31: Add NAND SPL boot support to i.MX31 PDK board.

 MAINTAINERS                                 |    4 +
 MAKEALL                                     |    2 +
 Makefile                                    |   13 ++-
 README                                      |    5 +
 board/freescale/mx31pdk/Makefile            |   52 ++++++
 board/freescale/mx31pdk/config.mk           |    5 +
 board/freescale/mx31pdk/lowlevel_init.S     |  114 ++++++++++++
 board/freescale/mx31pdk/mx31pdk.c           |   63 +++++++
 cpu/arm1136/mx31/Makefile                   |    1 +
 cpu/arm1136/mx31/devices.c                  |   56 ++++++
 cpu/arm1136/start.S                         |   33 ++--
 include/asm-arm/arch-mx31/mx31-regs.h       |   61 ++++++
 include/asm-arm/arch-mx31/mx31.h            |    3 +
 include/asm-arm/macro.h                     |   57 ++++++
 include/configs/mx31pdk.h                   |  176 ++++++++++++++++++
 include/fsl_nfc.h                           |  109 +++++++++++
 nand_spl/board/freescale/mx31pdk/Makefile   |   54 ++++++
 nand_spl/board/freescale/mx31pdk/config.mk  |    5 +
 nand_spl/board/freescale/mx31pdk/u-boot.lds |   36 ++++
 nand_spl/nand_boot_fsl_nfc.c                |  263 +++++++++++++++++++++++++++
 onenand_ipl/board/apollon/Makefile          |    4 +-
 21 files changed, 1099 insertions(+), 17 deletions(-)
 create mode 100644 board/freescale/mx31pdk/Makefile
 create mode 100644 board/freescale/mx31pdk/config.mk
 create mode 100644 board/freescale/mx31pdk/lowlevel_init.S
 create mode 100644 board/freescale/mx31pdk/mx31pdk.c
 create mode 100644 cpu/arm1136/mx31/devices.c
 create mode 100644 include/asm-arm/macro.h
 create mode 100644 include/configs/mx31pdk.h
 create mode 100644 include/fsl_nfc.h
 create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
 create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk
 create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds
 create mode 100644 nand_spl/nand_boot_fsl_nfc.c

[U-Boot] [PATCH v3 1/6] ARM1136: Introduce CONFIG_PRELOADER macro.

[Magnus Lilja]

Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's
in start.S. In preparation for adding support for NAND SPL
the macro CONFIG_PRELOADER is introducted and replaces the
CONFIG_ONENAND_IPL in start.S.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 README                             |    5 +++++
 cpu/arm1136/start.S                |   24 ++++++++++++------------
 onenand_ipl/board/apollon/Makefile |    4 ++--
 3 files changed, 19 insertions(+), 14 deletions(-)

diff --git a/README b/README
index 561c100..86cf628 100644
--- a/README
+++ b/README
@@ -2702,6 +2702,11 @@ Low Level (hardware related) configuration options:
 		some other boot loader or by a debugger which
 		performs these initializations itself.
 
+- CONFIG_PRELOADER
+
+		[ARM only] Modifies the behaviour of start.S when
+		compiling a loader that is executed before the actual
+		U-Boot. E.g. when compiling a NAND SPL.
 
 Building the Software:
 ======================
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index 999b184..28cb5fd 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -32,7 +32,7 @@
 #include <version.h>
 .globl _start
 _start: b	reset
-#ifdef CONFIG_ONENAND_IPL
+#ifdef CONFIG_PRELOADER
 	ldr	pc, _hang
 	ldr	pc, _hang
 	ldr	pc, _hang
@@ -67,7 +67,7 @@ _not_used:		.word not_used
 _irq:			.word irq
 _fiq:			.word fiq
 _pad:			.word 0x12345678 /* now 16*4=64 */
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_PRELOADER */
 .global _end_vect
 _end_vect:
 
@@ -156,9 +156,9 @@ relocate:				/* relocate U-Boot to RAM	    */
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
 	cmp	r0, r1			/* don't reloc during debug	    */
-#ifndef CONFIG_ONENAND_IPL
+#ifndef CONFIG_PRELOADER
 	beq	stack_setup
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_PRELOADER */
 
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
@@ -175,7 +175,7 @@ copy_loop:
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
-#ifdef CONFIG_ONENAND_IPL
+#ifdef CONFIG_PRELOADER
 	sub	sp, r0, #128		/* leave 32 words for abort-stack   */
 #else
 	sub	r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area			    */
@@ -184,14 +184,14 @@ stack_setup:
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
 	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_PRELOADER */
 
 clear_bss:
 	ldr	r0, _bss_start		/* find start of bss segment	    */
 	ldr	r1, _bss_end		/* stop here			    */
 	mov	r2, #0x00000000		/* clear			    */
 
-#ifndef CONFIG_ONENAND_IPL
+#ifndef CONFIG_PRELOADER
 clbss_l:str	r2, [r0]		/* clear loop...		    */
 	add	r0, r0, #4
 	cmp	r0, r1
@@ -244,7 +244,7 @@ cpu_init_crit:
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
 
-#ifndef CONFIG_ONENAND_IPL
+#ifndef CONFIG_PRELOADER
 /*
  *************************************************************************
  *
@@ -357,17 +357,17 @@ cpu_init_crit:
 	.macro get_fiq_stack			@ setup FIQ stack
 	ldr	sp, FIQ_STACK_START
 	.endm
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_PRELOADER */
 
 /*
  * exception handlers
  */
-#ifdef CONFIG_ONENAND_IPL
+#ifdef CONFIG_PRELOADER
 	.align	5
 do_hang:
 	ldr	sp, _TEXT_BASE			/* use 32 words about stack */
 	bl	hang				/* hang and never return */
-#else	/* !CONFIG_ONENAND IPL */
+#else	/* !CONFIG_PRELOADER */
 	.align	5
 undefined_instruction:
 	get_bad_stack
@@ -435,4 +435,4 @@ fiq:
 arm1136_cache_flush:
 		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I cache
 		mov	pc, lr			@ back to caller
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_PRELOADER */
diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile
index 1f996a4..23eee43 100644
--- a/onenand_ipl/board/apollon/Makefile
+++ b/onenand_ipl/board/apollon/Makefile
@@ -4,8 +4,8 @@ include $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/config.mk
 
 LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds
 LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
-AFLAGS	+= -DCONFIG_ONENAND_IPL
-CFLAGS	+= -DCONFIG_ONENAND_IPL
+AFLAGS	+= -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL
+CFLAGS	+= -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL
 OBJCLFAGS += --gap-fill=0x00
 
 SOBJS	:= low_levelinit.o
-- 
1.5.6

[U-Boot] [PATCH v3 2/6] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.

It has been tested on a i.MX31 PDK board with large page NAND. Small
page NANDs should work as well, but this has not been tested.

Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
whether this is compatible with a particular setup depends on how
the NAND device is programmed by the flash programmer (e.g. JTAG
debugger).

The patch is based on the work by Maxim Artamonov.

Signed-off-by: Maxim Artamonov <scn1874@yandex.ru>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 cpu/arm1136/start.S                   |    9 +-
 include/asm-arm/arch-mx31/mx31-regs.h |    5 +
 include/fsl_nfc.h                     |  109 ++++++++++++++
 nand_spl/nand_boot_fsl_nfc.c          |  263 +++++++++++++++++++++++++++++++++
 4 files changed, 384 insertions(+), 2 deletions(-)
 create mode 100644 include/fsl_nfc.h
 create mode 100644 nand_spl/nand_boot_fsl_nfc.c

diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index 28cb5fd..957f438 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -200,12 +200,15 @@ clbss_l:str	r2, [r0]		/* clear loop...		    */
 
 	ldr	pc, _start_armboot
 
+#ifdef CONFIG_NAND_SPL
+_start_armboot: .word nand_boot
+#else
 #ifdef CONFIG_ONENAND_IPL
 _start_armboot: .word start_oneboot
 #else
 _start_armboot: .word start_armboot
-#endif
-
+#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_NAND_SPL */
 
 /*
  *************************************************************************
@@ -217,6 +220,7 @@ _start_armboot: .word start_armboot
  *
  *************************************************************************
  */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
 	/*
 	 * flush v4 I/D caches
@@ -243,6 +247,7 @@ cpu_init_crit:
 	bl	lowlevel_init	/* go setup pll,mux,memory */
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 
 #ifndef CONFIG_PRELOADER
 /*
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
index a8a05c8..c2e7dcf 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -194,4 +194,9 @@
 #define CS5_BASE	0xB6000000
 #define PCMCIA_MEM_BASE	0xC0000000
 
+/*
+ * NAND controller
+ */
+#define NFC_BASE_ADDR	0xB8000000
+
 #endif /* __ASM_ARCH_MX31_REGS_H */
diff --git a/include/fsl_nfc.h b/include/fsl_nfc.h
new file mode 100644
index 0000000..da5be37
--- /dev/null
+++ b/include/fsl_nfc.h
@@ -0,0 +1,109 @@
+/*
+ *
+ * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FSL_NFC_H
+#define __FSL_NFC_H
+
+/*
+ * Register map and bit definitions for the Freescale NAND Flash
+ * Controller present in i.MX31 and other devices.
+ */
+
+struct fsl_nfc_regs {
+	u32 main_area0[128]; /* @0x000 */
+	u32 main_area1[128];
+	u32 main_area2[128];
+	u32 main_area3[128];
+	u32 spare_area0[4];
+	u32 spare_area1[4];
+	u32 spare_area2[4];
+	u32 spare_area3[4];
+	u32 reserved1[64 - 16 + 64 * 5];
+	u16 bufsiz; /* @ 0xe00 */
+	u16 reserved2;
+	u16 buffer_address;
+	u16 flash_add;
+	u16 flash_cmd;
+	u16 configuration;
+	u16 ecc_status_result;
+	u16 ecc_rslt_main_area;
+	u16 ecc_rslt_spare_area;
+	u16 nf_wr_prot;
+	u16 unlock_start_blk_add;
+	u16 unlock_end_blk_add;
+	u16 nand_flash_wr_pr_st;
+	u16 nand_flash_config1;
+	u16 nand_flash_config2;
+};
+
+/*
+ * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command
+ * operation
+ */
+#define NFC_CMD		0x1
+
+/*
+ * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address
+ * operation
+ */
+#define NFC_ADDR	0x2
+
+/*
+ * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input
+ * operation
+ */
+#define NFC_INPUT	0x4
+
+/*
+ * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data
+ * Output operation
+ */
+#define NFC_OUTPUT	0x8
+
+/*
+ * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID
+ * operation
+ */
+#define NFC_ID		0x10
+
+/*
+ * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read
+ * Status operation
+ */
+#define NFC_STATUS	0x20
+
+/*
+ * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status
+ * operation
+ */
+#define NFC_INT		0x8000
+
+#define NFC_SP_EN	(1 << 2)
+#define NFC_ECC_EN	(1 << 3)
+#define NFC_INT_MSK	(1 << 4)
+#define NFC_BIG		(1 << 5)
+#define NFC_RST		(1 << 6)
+#define NFC_CE		(1 << 7)
+#define NFC_ONE_CYCLE	(1 << 8)
+
+#endif /* __FSL_NFC_H */
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
new file mode 100644
index 0000000..df67b9b
--- /dev/null
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -0,0 +1,263 @@
+/*
+ * (C) Copyright 2009
+ * Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * (C) Copyright 2008
+ * Maxim Artamonov, <scn1874@yandex.ru>
+ *
+ * (C) Copyright 2006-2008
+ * Stefan Roese, DENX Software Engineering, sr at denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <asm-arm/arch/mx31-regs.h>
+#include <asm/io.h>
+#include <fsl_nfc.h>
+
+static struct fsl_nfc_regs *nfc;
+
+static void nfc_wait_ready(void)
+{
+	uint32_t tmp;
+
+	while (!(readw(&nfc->nand_flash_config2) & NFC_INT))
+		;
+
+	/* Reset interrupt flag */
+	tmp = readw(&nfc->nand_flash_config2);
+	tmp &= ~NFC_INT;
+	writew(tmp, &nfc->nand_flash_config2);
+}
+
+static void nfc_nand_init(void)
+{
+	/* unlocking RAM Buff */
+	writew(0x2, &nfc->configuration);
+
+	/* hardware ECC checking and correct */
+	writew(NFC_ECC_EN, &nfc->nand_flash_config1);
+}
+
+static void nfc_nand_command(unsigned short command)
+{
+	writew(command, &nfc->flash_cmd);
+	writew(NFC_CMD, &nfc->nand_flash_config2);
+	nfc_wait_ready();
+}
+
+static void nfc_nand_page_address(unsigned int page_address)
+{
+	unsigned int page_count;
+
+	writew(0x00, &nfc->flash_cmd);
+	writew(NFC_ADDR, &nfc->nand_flash_config2);
+	nfc_wait_ready();
+
+	/* code only for 2kb flash */
+	if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800) {
+		writew(0x00, &nfc->flash_add);
+		writew(NFC_ADDR, &nfc->nand_flash_config2);
+		nfc_wait_ready();
+	}
+
+	page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
+
+	if (page_address <= page_count) {
+		page_count--; /* transform 0x01000000 to 0x00ffffff */
+		do {
+			writew(page_address & 0xff, &nfc->flash_add);
+			writew(NFC_ADDR, &nfc->nand_flash_config2);
+			nfc_wait_ready();
+			page_address = page_address >> 8;
+			page_count = page_count >> 8;
+		} while (page_count);
+	}
+}
+
+static void nfc_nand_data_output(void)
+{
+	int i;
+
+	/*
+	 * The NAND controller requires four output commands for
+	 * large page devices.
+	 */
+	for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
+		writew(NFC_ECC_EN, &nfc->nand_flash_config1);
+		writew(i, &nfc->buffer_address); /* read in i:th buffer */
+		writew(NFC_OUTPUT, &nfc->nand_flash_config2);
+		nfc_wait_ready();
+	}
+}
+
+static int nfc_nand_check_ecc(void)
+{
+	return readw(&nfc->ecc_status_result);
+}
+
+static int nfc_read_page(unsigned int page_address, unsigned char *buf)
+{
+	int i;
+	u32 *src;
+	u32 *dst;
+
+	writew(0, &nfc->buffer_address); /* read in first 0 buffer */
+	nfc_nand_command(NAND_CMD_READ0);
+	nfc_nand_page_address(page_address);
+
+	if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800)
+		nfc_nand_command(NAND_CMD_READSTART);
+
+	nfc_nand_data_output(); /* fill the main buffer 0 */
+
+	if (nfc_nand_check_ecc())
+		return -1;
+
+	src = &nfc->main_area0[0];
+	dst = (u32 *)buf;
+
+	/* main copy loop from NAND-buffer to SDRAM memory */
+	for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
+		writel(readl(src), dst);
+		src++;
+		dst++;
+	}
+
+	return 0;
+}
+
+static int is_badblock(int pagenumber)
+{
+	int page = pagenumber;
+	int maxpagecheck = CONFIG_SYS_NAND_PAGE_SIZE == 0x800 ? 2 : 1;
+	u32 badblock;
+	u32 *src;
+
+	// todo shall we check both or only one of them?
+	for (page = pagenumber; page < pagenumber + maxpagecheck; page++) {
+		writew(0, &nfc->buffer_address); /* read in first 0 buffer */
+		nfc_nand_command(NAND_CMD_READ0);
+		nfc_nand_page_address(page);
+
+		if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800)
+			nfc_nand_command(NAND_CMD_READSTART);
+
+		nfc_nand_data_output(); /* fill the main buffer 0 */
+
+		src = &nfc->spare_area0[0];
+
+		/*
+		 * IMPORTANT NOTE: The nand flash controller uses a non-
+		 * standard layout for large page devices. This can
+		 * affect the position of the bad block marker.
+		 */
+		/* Get the bad block marker */
+		badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
+		badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
+		badblock &= 0xff;
+
+		/* bad block marker verify */
+		if (badblock != 0xff)
+			return 1; /* potential bad block */
+	}
+
+	return 0;
+}
+
+static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
+{
+	int i;
+	unsigned int page;
+	unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
+				CONFIG_SYS_NAND_PAGE_SIZE;
+
+	nfc = (void *)NFC_BASE_ADDR;
+
+	nfc_nand_init();
+
+	/* Convert to page number */
+	page = from / CONFIG_SYS_NAND_PAGE_SIZE;
+	i = 0;
+
+	while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
+		if (nfc_read_page(page, buf) < 0)
+			return -1;
+
+		page++;
+		i++;
+		buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
+
+		/*
+		 * Check if we have crossed a block boundary, and if so
+		 * check for bad block.
+		 */
+		if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
+			/*
+			 * Yes, new block. See if this block is good. If not,
+			 * loop until we find i good block.
+			 */
+			while (is_badblock(page)) {
+				page = page + CONFIG_SYS_NAND_PAGE_COUNT;
+				/* Check i we've reached the end of flash. */
+				if (page >= maxpages)
+					return -1;
+			}
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * The main entry for NAND booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from NAND into SDRAM and starts it from there.
+ */
+void nand_boot(void)
+{
+	__attribute__((noreturn)) void (*uboot)(void);
+
+	nfc = (void *)NFC_BASE_ADDR;
+
+	/*
+	 * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
+	 * be aligned to full pages
+	 */
+	if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
+		       (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
+		/* Copy from NAND successful, start U-boot */
+		uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
+		uboot();
+	} else {
+		/* Unrecoverable error when copying from NAND */
+		while (1) {
+			/* Loop forever */
+		}
+	}
+}
+
+/*
+ * Called from start.S in case of an exception.
+ */
+void hang(void)
+{
+	while (1) {
+		/* Loop forever */
+	}
+}
-- 
1.5.6

[U-Boot] [PATCH v3 3/6] ARM: Add macros.h to be used in assembler file.

[Magnus Lilja]

From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 include/asm-arm/macro.h |   57 +++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 57 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-arm/macro.h

diff --git a/include/asm-arm/macro.h b/include/asm-arm/macro.h
new file mode 100644
index 0000000..a598776
--- /dev/null
+++ b/include/asm-arm/macro.h
@@ -0,0 +1,57 @@
+/*
+ * include/asm-arm/macro.h
+ *
+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ *
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARM_MACRO_H__
+#define __ASM_ARM_MACRO_H__
+#ifdef __ASSEMBLY__
+
+.macro	write32, addr, data
+	ldr	r4, =\addr
+	ldr	r5, =\data
+	str	r5, [r4]
+.endm
+
+.macro	write16, addr, data
+	ldr	r4, =\addr
+	ldrh	r5, =\data
+	strh	r5, [r4]
+.endm
+
+.macro	write8, addr, data
+	ldr	r4, =\addr
+	ldrb	r5, =\data
+	strb	r5, [r4]
+.endm
+
+.macro	wait_timer, time
+	ldr	r4, =\time
+1:
+	nop
+	subs	r4, r4, #1
+	bcs	1b
+.endm
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ASM_ARM_MACRO_H__ */
-- 
1.5.6

[U-Boot] [PATCH v3 4/6] i.MX31: Create a common device file.

[Magnus Lilja]

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 cpu/arm1136/mx31/Makefile        |    1 +
 cpu/arm1136/mx31/devices.c       |   56 ++++++++++++++++++++++++++++++++++++++
 include/asm-arm/arch-mx31/mx31.h |    3 ++
 3 files changed, 60 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm1136/mx31/devices.c

diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile
index 1e49e8d..c8e18f7 100644
--- a/cpu/arm1136/mx31/Makefile
+++ b/cpu/arm1136/mx31/Makefile
@@ -27,6 +27,7 @@ LIB	= $(obj)lib$(SOC).a
 
 COBJS	+= generic.o
 COBJS	+= timer.o
+COBJS	+= devices.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/arm1136/mx31/devices.c b/cpu/arm1136/mx31/devices.c
new file mode 100644
index 0000000..1f4ca7e
--- /dev/null
+++ b/cpu/arm1136/mx31/devices.c
@@ -0,0 +1,56 @@
+/*
+ *
+ * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/mx31-regs.h>
+#include <asm/arch/mx31.h>
+
+#ifdef CONFIG_SYS_MX31_UART1
+void mx31_uart1_hw_init(void)
+{
+	/* setup pins for UART1 */
+	mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
+	mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
+	mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
+	mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
+}
+#endif
+
+#ifdef CONFIG_MXC_SPI
+void mx31_spi2_hw_init(void)
+{
+	/* SPI2 */
+	mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
+	mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
+	mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
+	mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
+	mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
+	mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
+	mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
+
+	/* start SPI2 clock */
+	__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
+}
+#endif
diff --git a/include/asm-arm/arch-mx31/mx31.h b/include/asm-arm/arch-mx31/mx31.h
index 1d475dd..53b9f27 100644
--- a/include/asm-arm/arch-mx31/mx31.h
+++ b/include/asm-arm/arch-mx31/mx31.h
@@ -47,4 +47,7 @@ static inline void mx31_gpio_set(unsigned int gpio, unsigned int value)
 }
 #endif
 
+void mx31_uart1_hw_init(void);
+void mx31_spi2_hw_init(void);
+
 #endif /* __ASM_ARCH_MX31_H */
-- 
1.5.6

[U-Boot] [PATCH v3 5/6] MX31: Add basic support for Freescale i.MX31 PDK board.

[Magnus Lilja]

Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).

This patch assumes that some other program performs the actual
NAND boot.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 MAINTAINERS                           |    4 +
 MAKEALL                               |    1 +
 Makefile                              |    3 +
 board/freescale/mx31pdk/Makefile      |   52 +++++++++++
 board/freescale/mx31pdk/config.mk     |    1 +
 board/freescale/mx31pdk/mx31pdk.c     |   63 +++++++++++++
 include/asm-arm/arch-mx31/mx31-regs.h |    2 +
 include/configs/mx31pdk.h             |  161 +++++++++++++++++++++++++++++++++
 8 files changed, 287 insertions(+), 0 deletions(-)
 create mode 100644 board/freescale/mx31pdk/Makefile
 create mode 100644 board/freescale/mx31pdk/config.mk
 create mode 100644 board/freescale/mx31pdk/mx31pdk.c
 create mode 100644 include/configs/mx31pdk.h

diff --git a/MAINTAINERS b/MAINTAINERS
index bba6ce9..44358fe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -527,6 +527,10 @@ Thomas Elste <info@elste.org>
 
 	modnet50	ARM720T (NET+50)
 
+Fabio Estevam <Fabio.Estevam@freescale.com>
+
+	mx31pdk		i.MX31
+
 Peter Figuli <peposh@etc.sk>
 
 	wepep250	xscale
diff --git a/MAKEALL b/MAKEALL
index fd31252..3976745 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -551,6 +551,7 @@ LIST_ARM11="			\
 	imx31_phycore		\
 	imx31_phycore_eet	\
 	mx31ads			\
+	mx31pdk			\
 	qong			\
 	smdk6400		\
 "
diff --git a/Makefile b/Makefile
index 64b7fbd..41cccfc 100644
--- a/Makefile
+++ b/Makefile
@@ -3112,6 +3112,9 @@ imx31_phycore_config	: unconfig
 mx31ads_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
 
+mx31pdk_config		: unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
+
 omap2420h4_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile
new file mode 100644
index 0000000..d5d8f04
--- /dev/null
+++ b/board/freescale/mx31pdk/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= mx31pdk.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
new file mode 100644
index 0000000..d34dc02
--- /dev/null
+++ b/board/freescale/mx31pdk/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x87f00000
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
new file mode 100644
index 0000000..6b60c17
--- /dev/null
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -0,0 +1,63 @@
+/*
+ *
+ * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <asm/arch/mx31.h>
+#include <asm/arch/mx31-regs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* CS5: CPLD incl. network controller */
+	__REG(CSCR_U(5)) = 0x0000d843;
+	__REG(CSCR_L(5)) = 0x22252521;
+	__REG(CSCR_A(5)) = 0x22220a00;
+
+	/* Setup UART1 and SPI2 pins */
+	mx31_uart1_hw_init();
+	mx31_spi2_hw_init();
+
+	gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	return 0;
+}
+
+int checkboard(void)
+{
+	printf("Board: i.MX31 MAX PDK (3DS)\n");
+	return 0;
+}
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
index c2e7dcf..76f4d53 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -84,6 +84,8 @@
 #define IPU_CONF_IC_EN		(1<<1)
 #define IPU_CONF_SCI_EN		(1<<0)
 
+#define ARM_PPMRR		0x40000015
+
 #define WDOG_BASE		0x53FDC000
 
 /*
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
new file mode 100644
index 0000000..72b9f3b
--- /dev/null
+++ b/include/configs/mx31pdk.h
@@ -0,0 +1,161 @@
+/*
+ * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * (C) Copyright 2004
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Kshitij Gupta <kshitij@ti.com>
+ *
+ * Configuration settings for the Freescale i.MX31 PDK board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* High Level Configuration Options */
+#define CONFIG_ARM1136		1	/* This is an arm1136 CPU core */
+#define CONFIG_MX31		1	/* in a mx31 */
+#define CONFIG_MX31_HCLK_FREQ	26000000
+#define CONFIG_MX31_CLK32	32768
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+
+/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
+ * program to initialize the SDRAM.
+ */
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
+/* Bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+
+/*
+ * Hardware drivers
+ */
+
+#define CONFIG_MX31_UART	1
+#define CONFIG_SYS_MX31_UART1	1
+
+#define CONFIG_HARD_SPI		1
+#define CONFIG_MXC_SPI		1
+#define CONFIG_DEFAULT_SPI_BUS	1
+#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
+
+#define CONFIG_RTC_MC13783	1
+
+/* MC13783 connected to CSPI2 and SS2 */
+#define CONFIG_MC13783_SPI_BUS	1
+#define CONFIG_MC13783_SPI_CS	2
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
+
+/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
+ * that CFG_NO_FLASH is undefined).
+ */
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_BOOTDELAY	3
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"bootargs_base=setenv bootargs console=ttymxc0,115200\0"	\
+	"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs "	\
+		"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"	\
+	"bootcmd=run bootcmd_net\0"					\
+	"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; "	\
+		"tftpboot 0x81000000 uImage-mx31; bootm\0"
+
+#define CONFIG_DRIVER_SMC911X		1
+#define CONFIG_DRIVER_SMC911X_BASE	0xB6000000
+#define CONFIG_DRIVER_SMC911X_32_BIT	1
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP	/* undef to save memory */
+#define CONFIG_SYS_PROMPT	"uboot> "
+#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
+				sizeof(CONFIG_SYS_PROMPT)+16)
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS	16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START	0x80000000
+#define CONFIG_SYS_MEMTEST_END		0x10000
+
+/* default load address */
+#define CONFIG_SYS_LOAD_ADDR		0x81000000
+
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_CMDLINE_EDITING	1
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128 * 1024) /* regular stack */
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS	1
+#define PHYS_SDRAM_1		CSD0_BASE
+#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+/* No NOR flash present */
+#define CONFIG_SYS_NO_FLASH	1
+
+#define CONFIG_ENV_IS_NOWHERE	1
+
+#define CONFIG_ENV_SIZE		(128 * 1024)
+
+#endif /* __CONFIG_H */
-- 
1.5.6

[U-Boot] [PATCH v3 6/6] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Magnus Lilja]

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 MAKEALL                                     |    1 +
 Makefile                                    |   14 +++-
 board/freescale/mx31pdk/config.mk           |    4 +
 board/freescale/mx31pdk/lowlevel_init.S     |  114 +++++++++++++++++++++++++++
 include/asm-arm/arch-mx31/mx31-regs.h       |   54 +++++++++++++
 include/configs/mx31pdk.h                   |   21 ++++-
 nand_spl/board/freescale/mx31pdk/Makefile   |   54 +++++++++++++
 nand_spl/board/freescale/mx31pdk/config.mk  |    5 +
 nand_spl/board/freescale/mx31pdk/u-boot.lds |   36 +++++++++
 9 files changed, 297 insertions(+), 6 deletions(-)
 create mode 100644 board/freescale/mx31pdk/lowlevel_init.S
 create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
 create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk
 create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds

diff --git a/MAKEALL b/MAKEALL
index 3976745..2f36506 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -552,6 +552,7 @@ LIST_ARM11="			\
 	imx31_phycore_eet	\
 	mx31ads			\
 	mx31pdk			\
+	mx31pdk_nand		\
 	qong			\
 	smdk6400		\
 "
diff --git a/Makefile b/Makefile
index 41cccfc..0e9177e 100644
--- a/Makefile
+++ b/Makefile
@@ -376,7 +376,7 @@ $(LDSCRIPT):	depend
 $(NAND_SPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
 		$(MAKE) -C nand_spl/board/$(BOARDDIR) all
 
-$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin
+$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
 		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 
 $(ONENAND_IPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
@@ -3112,8 +3112,16 @@ imx31_phycore_config	: unconfig
 mx31ads_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
 
-mx31pdk_config		: unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
+mx31pdk_config \
+mx31pdk_nand_config	: unconfig
+	@mkdir -p $(obj)include
+	@if [ -n "$(findstring _nand_,$@)" ]; then					\
+		echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h;		\
+	else										\
+		echo "#define CONFIG_SKIP_LOWLEVEL_INIT" >> $(obj)include/config.h;	\
+		echo "#define CONFIG_SKIP_RELOCATE_UBOOT" >> $(obj)include/config.h;	\
+	fi
+	@$(MKCONFIG) -a mx31pdk arm arm1136 mx31pdk freescale mx31
 
 omap2420h4_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
index d34dc02..dcaa09f 100644
--- a/board/freescale/mx31pdk/config.mk
+++ b/board/freescale/mx31pdk/config.mk
@@ -1 +1,5 @@
+ifdef CONFIG_NAND_SPL
+TEXT_BASE = 0x87ec0000
+else
 TEXT_BASE = 0x87f00000
+endif
diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S
new file mode 100644
index 0000000..f913f90
--- /dev/null
+++ b/board/freescale/mx31pdk/lowlevel_init.S
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+.globl lowlevel_init
+
+#include <asm/arch/mx31-regs.h>
+#include <asm/macro.h>
+
+#define CCM_CCMR_SETUP		0x074B0BF5
+#define CCM_PDR0_SETUP_532MHZ	(PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | \
+				 PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) |     \
+				 PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) |     \
+				 PDR0_MCU_PODF(0))
+#define CCM_MPCTL_SETUP_532MHZ	(PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) |   \
+				 PLL_MFN(12))
+
+#define ESDMISC_MDDR_SETUP	0x00000004
+#define ESDMISC_MDDR_RESET_DL	0x0000000c
+#define ESDCFG0_MDDR_SETUP	0x006ac73a
+
+#define ESDCTL_ROW_COL		(ESDCTL_SDE | ESDCTL_ROW(2) | ESDCTL_COL(2))
+#define ESDCTL_SETTINGS		(ESDCTL_ROW_COL | ESDCTL_SREFR(3) | \
+				 ESDCTL_DSIZ(2) | ESDCTL_BL(1))
+#define ESDCTL_PRECHARGE	(ESDCTL_ROW_COL | ESDCTL_CMD_PRECHARGE)
+#define ESDCTL_AUTOREFRESH	(ESDCTL_ROW_COL | ESDCTL_CMD_AUTOREFRESH)
+#define ESDCTL_LOADMODEREG	(ESDCTL_ROW_COL | ESDCTL_CMD_LOADMODEREG)
+#define ESDCTL_RW		ESDCTL_SETTINGS
+
+.globl lowlevel_init
+lowlevel_init:
+	/* Also setup the Peripheral Port Remap register inside the core */
+	ldr	r0, =ARM_PPMRR      /* start from AIPS 2GB region */
+	mcr	p15, 0, r0, c15, c2, 4
+
+	write32	IPU_CONF, IPU_CONF_DI_EN
+	write32	CCM_CCMR, CCM_CCMR_SETUP
+
+	wait_timer	0x40000
+
+	write32	CCM_CCMR, CCM_CCMR_SETUP | CCMR_MPE
+	write32	CCM_CCMR, (CCM_CCMR_SETUP | CCMR_MPE) & ~CCMR_MDS
+
+	/* Set up clock to 532MHz */
+	write32	CCM_PDR0, CCM_PDR0_SETUP_532MHZ
+	write32	CCM_MPCTL, CCM_MPCTL_SETUP_532MHZ
+
+	write32	CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
+
+	/* Set up MX31 DDR pins */
+	write32	IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B, 0
+	write32	IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0, 0
+	write32	IOMUXC_SW_PAD_CTL_BCLK_RW_RAS, 0
+	write32	IOMUXC_SW_PAD_CTL_CS2_CS3_CS4, 0x1000
+	write32	IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1, 0
+	write32	IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2, 0
+	write32	IOMUXC_SW_PAD_CTL_SD29_SD30_SD31, 0
+	write32	IOMUXC_SW_PAD_CTL_SD26_SD27_SD28, 0
+	write32	IOMUXC_SW_PAD_CTL_SD23_SD24_SD25, 0
+	write32	IOMUXC_SW_PAD_CTL_SD20_SD21_SD22, 0
+	write32	IOMUXC_SW_PAD_CTL_SD17_SD18_SD19, 0
+	write32	IOMUXC_SW_PAD_CTL_SD14_SD15_SD16, 0
+	write32	IOMUXC_SW_PAD_CTL_SD11_SD12_SD13, 0
+	write32	IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
+	write32	IOMUXC_SW_PAD_CTL_SD5_SD6_SD7, 0
+	write32	IOMUXC_SW_PAD_CTL_SD2_SD3_SD4, 0
+	write32	IOMUXC_SW_PAD_CTL_SDBA0_SD0_SD1, 0
+	write32	IOMUXC_SW_PAD_CTL_A24_A25_SDBA1, 0
+	write32	IOMUXC_SW_PAD_CTL_A21_A22_A23, 0
+	write32	IOMUXC_SW_PAD_CTL_A18_A19_A20, 0
+	write32	IOMUXC_SW_PAD_CTL_A15_A16_A17, 0
+	write32	IOMUXC_SW_PAD_CTL_A12_A13_A14, 0
+	write32	IOMUXC_SW_PAD_CTL_A10_MA10_A11, 0
+	write32	IOMUXC_SW_PAD_CTL_A7_A8_A9, 0
+	write32	IOMUXC_SW_PAD_CTL_A4_A5_A6, 0
+	write32	IOMUXC_SW_PAD_CTL_A1_A2_A3, 0
+	write32	IOMUXC_SW_PAD_CTL_VPG0_VPG1_A0, 0
+
+	/* Set up MX31 DDR Memory Controller */
+	write32	WEIM_ESDMISC, ESDMISC_MDDR_SETUP
+	write32	WEIM_ESDCFG0, ESDCFG0_MDDR_SETUP
+
+	/* Perform DDR init sequence */
+	write32	WEIM_ESDCTL0, ESDCTL_PRECHARGE
+	write32	CSD0_BASE | 0x0f00, 0x12344321
+	write32	WEIM_ESDCTL0, ESDCTL_AUTOREFRESH
+	write32	CSD0_BASE, 0x12344321
+	write32	CSD0_BASE, 0x12344321
+	write32	WEIM_ESDCTL0, ESDCTL_LOADMODEREG
+	write8	CSD0_BASE | 0x00000033, 0xda
+	write8	CSD0_BASE | 0x01000000, 0xff
+	write32	WEIM_ESDCTL0, ESDCTL_RW
+	write32	CSD0_BASE, 0xDEADBEEF
+	write32	WEIM_ESDMISC, ESDMISC_MDDR_RESET_DL
+
+	mov	pc, lr
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
index 76f4d53..51b02a2 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -61,6 +61,29 @@
 #define PLL_MFI(x)		(((x) & 0xf) << 10)
 #define PLL_MFN(x)		(((x) & 0x3ff) << 0)
 
+#define WEIM_ESDCTL0	0xB8001000
+#define WEIM_ESDCFG0	0xB8001004
+#define WEIM_ESDCTL1	0xB8001008
+#define WEIM_ESDCFG1	0xB800100C
+#define WEIM_ESDMISC	0xB8001010
+
+#define ESDCTL_SDE			(1 << 31)
+#define ESDCTL_CMD_RW			(0 << 28)
+#define ESDCTL_CMD_PRECHARGE		(1 << 28)
+#define ESDCTL_CMD_AUTOREFRESH		(2 << 28)
+#define ESDCTL_CMD_LOADMODEREG		(3 << 28)
+#define ESDCTL_CMD_MANUALREFRESH	(4 << 28)
+#define ESDCTL_ROW_13			(2 << 24)
+#define ESDCTL_ROW(x)			((x) << 24)
+#define ESDCTL_COL_9			(1 << 20)
+#define ESDCTL_COL(x)			((x) << 20)
+#define ESDCTL_DSIZ(x)			((x) << 16)
+#define ESDCTL_SREFR(x)			((x) << 13)
+#define ESDCTL_PWDT(x)			((x) << 10)
+#define ESDCTL_FP(x)			((x) << 8)
+#define ESDCTL_BL(x)			((x) << 7)
+#define ESDCTL_PRCT(x)			((x) << 0)
+
 #define WEIM_BASE	0xb8002000
 #define CSCR_U(x)	(WEIM_BASE + (x) * 0x10)
 #define CSCR_L(x)	(WEIM_BASE + 4 + (x) * 0x10)
@@ -181,6 +204,37 @@
 #define MUX_CSPI2_MOSI__I2C2_SCL IOMUX_MODE(MUX_CTL_CSPI2_MOSI, MUX_CTL_ALT1)
 #define MUX_CSPI2_MISO__I2C2_SDA IOMUX_MODE(MUX_CTL_CSPI2_MISO, MUX_CTL_ALT1)
 
+/* PAD control registers for SDR/DDR */
+#define IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B	(IOMUXC_BASE + 0x26C)
+#define IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0	(IOMUXC_BASE + 0x270)
+#define IOMUXC_SW_PAD_CTL_BCLK_RW_RAS		(IOMUXC_BASE + 0x274)
+#define IOMUXC_SW_PAD_CTL_CS5_ECB_LBA		(IOMUXC_BASE + 0x278)
+#define IOMUXC_SW_PAD_CTL_CS2_CS3_CS4		(IOMUXC_BASE + 0x27C)
+#define IOMUXC_SW_PAD_CTL_OE_CS0_CS1		(IOMUXC_BASE + 0x280)
+#define IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1		(IOMUXC_BASE + 0x284)
+#define IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2	(IOMUXC_BASE + 0x288)
+#define IOMUXC_SW_PAD_CTL_SD29_SD30_SD31	(IOMUXC_BASE + 0x28C)
+#define IOMUXC_SW_PAD_CTL_SD26_SD27_SD28	(IOMUXC_BASE + 0x290)
+#define IOMUXC_SW_PAD_CTL_SD23_SD24_SD25	(IOMUXC_BASE + 0x294)
+#define IOMUXC_SW_PAD_CTL_SD20_SD21_SD22	(IOMUXC_BASE + 0x298)
+#define IOMUXC_SW_PAD_CTL_SD17_SD18_SD19	(IOMUXC_BASE + 0x29C)
+#define IOMUXC_SW_PAD_CTL_SD14_SD15_SD16	(IOMUXC_BASE + 0x2A0)
+#define IOMUXC_SW_PAD_CTL_SD11_SD12_SD13	(IOMUXC_BASE + 0x2A4)
+#define IOMUXC_SW_PAD_CTL_SD8_SD9_SD10		(IOMUXC_BASE + 0x2A8)
+#define IOMUXC_SW_PAD_CTL_SD5_SD6_SD7		(IOMUXC_BASE + 0x2AC)
+#define IOMUXC_SW_PAD_CTL_SD2_SD3_SD4		(IOMUXC_BASE + 0x2B0)
+#define IOMUXC_SW_PAD_CTL_SDBA0_SD0_SD1		(IOMUXC_BASE + 0x2B4)
+#define IOMUXC_SW_PAD_CTL_A24_A25_SDBA1		(IOMUXC_BASE + 0x2B8)
+#define IOMUXC_SW_PAD_CTL_A21_A22_A23		(IOMUXC_BASE + 0x2BC)
+#define IOMUXC_SW_PAD_CTL_A18_A19_A20		(IOMUXC_BASE + 0x2C0)
+#define IOMUXC_SW_PAD_CTL_A15_A16_A17		(IOMUXC_BASE + 0x2C4)
+#define IOMUXC_SW_PAD_CTL_A12_A13_A14		(IOMUXC_BASE + 0x2C8)
+#define IOMUXC_SW_PAD_CTL_A10_MA10_A11		(IOMUXC_BASE + 0x2CC)
+#define IOMUXC_SW_PAD_CTL_A7_A8_A9		(IOMUXC_BASE + 0x2D0)
+#define IOMUXC_SW_PAD_CTL_A4_A5_A6		(IOMUXC_BASE + 0x2D4)
+#define IOMUXC_SW_PAD_CTL_A1_A2_A3		(IOMUXC_BASE + 0x2D8)
+#define IOMUXC_SW_PAD_CTL_VPG0_VPG1_A0		(IOMUXC_BASE + 0x2DC)
+
 /*
  * Memory regions and CS
  */
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 72b9f3b..773170f 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -43,10 +43,10 @@
 #define CONFIG_SETUP_MEMORY_TAGS	1
 #define CONFIG_INITRD_TAG		1
 
-/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
- * program to initialize the SDRAM.
- */
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT
+#endif
 
 /*
  * Size of malloc() pool
@@ -158,4 +158,19 @@
 
 #define CONFIG_ENV_SIZE		(128 * 1024)
 
+/* NAND configuration for the NAND_SPL */
+
+/* Start copying real U-boot from the second page */
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x30000
+/* Load U-Boot to this address */
+#define CONFIG_SYS_NAND_U_BOOT_DST	0x87f00000
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
+
 #endif /* __CONFIG_H */
diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile
new file mode 100644
index 0000000..a9572ba
--- /dev/null
+++ b/nand_spl/board/freescale/mx31pdk/Makefile
@@ -0,0 +1,54 @@
+CONFIG_NAND_SPL	= y
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS	+= -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
+CFLAGS	+= -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
+
+SOBJS	= start.o lowlevel_init.o
+COBJS	= nand_boot_fsl_nfc.o
+
+SRCS	:= $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
+SRCS	+= $(SRCTREE)/cpu/arm1136/start.S
+SRCS	+= $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj	:= $(OBJTREE)/nand_spl/
+
+ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all:	$(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS)
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+		-Map $(nandobj)u-boot-spl.map \
+		-o $@
+
+#########################################################################
+
+$(obj)%.o:	$(SRCTREE)/cpu/arm1136/%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(SRCTREE)/board/freescale/mx31pdk/%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(SRCTREE)/nand_spl/%.c
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/freescale/mx31pdk/config.mk b/nand_spl/board/freescale/mx31pdk/config.mk
new file mode 100644
index 0000000..198cafc
--- /dev/null
+++ b/nand_spl/board/freescale/mx31pdk/config.mk
@@ -0,0 +1,5 @@
+PAD_TO	:= 2048
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
diff --git a/nand_spl/board/freescale/mx31pdk/u-boot.lds b/nand_spl/board/freescale/mx31pdk/u-boot.lds
new file mode 100644
index 0000000..edd8430
--- /dev/null
+++ b/nand_spl/board/freescale/mx31pdk/u-boot.lds
@@ -0,0 +1,36 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text :
+	{
+		start.o			(.text)
+		lowlevel_init.o		(.text)
+		nand_boot_fsl_nfc.o	(.text)
+		*(.text)
+		. = 2K;
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
-- 
1.5.6

[U-Boot] [PATCH v3 5/6] MX31: Add basic support for Freescale i.MX31 PDK board.

[Wolfgang Denk]

Dear Magnus Lilja,

In message <ed0be9732183579c15279ba61413d3f3dc7155f8.1244572159.git.lilja.magnus@gmail.com> you wrote:
> Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).
> 
> This patch assumes that some other program performs the actual
> NAND boot.
> 
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
> ---
...
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -527,6 +527,10 @@ Thomas Elste <info@elste.org>
>  
>  	modnet50	ARM720T (NET+50)
>  
> +Fabio Estevam <Fabio.Estevam@freescale.com>
> +
> +	mx31pdk		i.MX31
> +
>  Peter Figuli <peposh@etc.sk>

Is this correct? It's quite unusal that somebody  becomes  maintainer
of  a  port  who  seems to have not been involved with it at all - at
least I cannot see his name in any of the Signed-off-by lines nor  in
any (C) lines or anywhere else?

Fabio, do you agree?

...
> +int board_init(void)
> +{
> +	/* CS5: CPLD incl. network controller */
> +	__REG(CSCR_U(5)) = 0x0000d843;
> +	__REG(CSCR_L(5)) = 0x22252521;
> +	__REG(CSCR_A(5)) = 0x22220a00;
> +
> +	/* Setup UART1 and SPI2 pins */
> +	mx31_uart1_hw_init();
> +	mx31_spi2_hw_init();
> +
> +	gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */

Hm... that's the MACH ID for the Freescale MX31_3DS board. You are
talking about PDK instead. Are these two really the same?


> +	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> +	return 0;
> +}
> +
> +int checkboard(void)
> +{
> +	printf("Board: i.MX31 MAX PDK (3DS)\n");

It seems they are the same?

> +/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
> + * that CFG_NO_FLASH is undefined).
> + */

Incorrect multiline comment style.

> +#define CONFIG_ENV_IS_NOWHERE	1

Why don't you put the environment in NAND?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Life. Don't talk to me about life.      - Marvin the Paranoid Android

[U-Boot] [PATCH v3 3/6] ARM: Add macros.h to be used in assembler file.

[Wolfgang Denk]

Dear Magnus Lilja,

In message <bc809a4b4bb1a5d47ff874ac44f8777845366196.1244572159.git.lilja.magnus@gmail.com> you wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> ---
>  include/asm-arm/macro.h |   57 +++++++++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 57 insertions(+), 0 deletions(-)
>  create mode 100644 include/asm-arm/macro.h

I'm missing documentation what these macros are supposed to be used
for?

Are they restricted to addresses in system RAM? Or intended to access
device registers? are they universal across all existing ARM systems,
i. e. are there not any configurations that might require any kind of
memory barriers or sync or considerations about caching?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"No proper program contains  an  indication  which  as  an  operator-
applied  occurrence  identifies an operator-defining occurrence which
as an indication-applied occurrence identifies an indication-defining
occurrence different from the one identified by the given  indication
as an indication-applied occurrence."               - ALGOL 68 Report

[U-Boot] [PATCH v3 3/6] ARM: Add macros.h to be used in assembler file.

[Magnus Lilja]

Wolfgang,

2009/6/9 Wolfgang Denk <wd@denx.de>:
> Dear Magnus Lilja,
>
> In message <bc809a4b4bb1a5d47ff874ac44f8777845366196.1244572159.git.lilja.magnus@gmail.com> you wrote:
>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>
>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>> ---
>> ?include/asm-arm/macro.h | ? 57 +++++++++++++++++++++++++++++++++++++++++++++++
>> ?1 files changed, 57 insertions(+), 0 deletions(-)
>> ?create mode 100644 include/asm-arm/macro.h
>
> I'm missing documentation what these macros are supposed to be used
> for?
>
> Are they restricted to addresses in system RAM? Or intended to access
> device registers? are they universal across all existing ARM systems,
> i. e. are there not any configurations that might require any kind of
> memory barriers or sync or considerations about caching?

I'll add some documentation.

Thanks, Magnus

[U-Boot] [PATCH v3 3/6] ARM: Add macros.h to be used in assemblerfile.

[Peter Pearse]

Magnus

	Please ensure when writing ARM macros that any  architecture
specific instructions are

restricted to the correct architecture. 

This patch should be OK, this is just a heads up for any budding macro
writers on the list

Regards

Peter 

> -----Original Message-----
> From: u-boot-bounces at lists.denx.de 
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Magnus Lilja
> Sent: 09 June 2009 19:38
> To: u-boot at lists.denx.de
> Subject: [U-Boot] [PATCH v3 3/6] ARM: Add macros.h to be used 
> in assemblerfile.
> 
> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD 
> <plagnioj@jcrosoft.com>
> ---
>  include/asm-arm/macro.h |   57 
> +++++++++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 57 insertions(+), 0 deletions(-)  create 
> mode 100644 include/asm-arm/macro.h
> 
> diff --git a/include/asm-arm/macro.h 
> b/include/asm-arm/macro.h new file mode 100644 index 0000000..a598776
> --- /dev/null
> +++ b/include/asm-arm/macro.h
> @@ -0,0 +1,57 @@
> +/*
> + * include/asm-arm/macro.h
> + *
> + * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD 
> +<plagnioj@jcrosoft.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + *
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __ASM_ARM_MACRO_H__
> +#define __ASM_ARM_MACRO_H__
> +#ifdef __ASSEMBLY__
> +
> +.macro	write32, addr, data
> +	ldr	r4, =\addr
> +	ldr	r5, =\data
> +	str	r5, [r4]
> +.endm
> +
> +.macro	write16, addr, data
> +	ldr	r4, =\addr
> +	ldrh	r5, =\data
> +	strh	r5, [r4]
> +.endm
> +
> +.macro	write8, addr, data
> +	ldr	r4, =\addr
> +	ldrb	r5, =\data
> +	strb	r5, [r4]
> +.endm
> +
> +.macro	wait_timer, time
> +	ldr	r4, =\time
> +1:
> +	nop
> +	subs	r4, r4, #1
> +	bcs	1b
> +.endm
> +
> +#endif /* __ASSEMBLY__ */
> +#endif /* __ASM_ARM_MACRO_H__ */
> --
> 1.5.6
> 
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
> 

[U-Boot] [PATCH v3 3/6] ARM: Add macros.h to be used in assemblerfile.

[Magnus Lilja]

Peter,

2009/6/10 Peter Pearse <peter.pearse@arm.com>:
> Magnus
>
> ? ? ? ?Please ensure when writing ARM macros that any ?architecture
> specific instructions are
>
> restricted to the correct architecture.
>
> This patch should be OK, this is just a heads up for any budding macro
> writers on the list

Thanks for the input.

/Magnus

[U-Boot] [PATCH v3 2/6] MX31: Add NAND SPL for i.MX31.

[Wolfgang Denk]

Dear Magnus Lilja,

In message <15c41c2e93fb138829871cd901fc20cda3b433d8.1244572159.git.lilja.magnus@gmail.com> you wrote:
> This patch adds the NAND SPL framework needed to boot i.MX31 boards
> from NAND.
> 
> It has been tested on a i.MX31 PDK board with large page NAND. Small
> page NANDs should work as well, but this has not been tested.
> 
> Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
> whether this is compatible with a particular setup depends on how
> the NAND device is programmed by the flash programmer (e.g. JTAG
> debugger).
> 
> The patch is based on the work by Maxim Artamonov.
> 
> Signed-off-by: Maxim Artamonov <scn1874@yandex.ru>
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
...
> +static int is_badblock(int pagenumber)
> +{
> +	int page = pagenumber;
> +	int maxpagecheck = CONFIG_SYS_NAND_PAGE_SIZE == 0x800 ? 2 : 1;
> +	u32 badblock;
> +	u32 *src;
> +
> +	// todo shall we check both or only one of them?

Please do not use C++ comments.

> +void nand_boot(void)
> +{
> +	__attribute__((noreturn)) void (*uboot)(void);
> +
> +	nfc = (void *)NFC_BASE_ADDR;
> +
> +	/*
> +	 * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
> +	 * be aligned to full pages
> +	 */
> +	if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
> +		       (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
> +		/* Copy from NAND successful, start U-boot */
> +		uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
> +		uboot();
> +	} else {
> +		/* Unrecoverable error when copying from NAND */
> +		while (1) {
> +			/* Loop forever */
> +		}

No braces needed for single line constructs. And why don't you simply
call hang() here (which might be  doing  additional  things  on  some
boards. like flashing some LED or so)?

> +}
> +
> +/*
> + * Called from start.S in case of an exception.
> + */
> +void hang(void)
> +{
> +	while (1) {
> +		/* Loop forever */
> +	}

No braces needed for single line constructs. And I think some (older)
compilers might complain about a missing ';'.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Documentation is like sex: when it is good, it is  very,  very  good;
and when it is bad, it is better than nothing.         - Dick Brandon

[U-Boot] [PATCH v3 2/6] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

Wolfang,

2009/6/9 Wolfgang Denk <wd@denx.de>:
> Dear Magnus Lilja,
>
> In message <15c41c2e93fb138829871cd901fc20cda3b433d8.1244572159.git.lilja.magnus@gmail.com> you wrote:
>> This patch adds the NAND SPL framework needed to boot i.MX31 boards
>> from NAND.
>>
>> It has been tested on a i.MX31 PDK board with large page NAND. Small
>> page NANDs should work as well, but this has not been tested.
>>
>> Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
>> whether this is compatible with a particular setup depends on how
>> the NAND device is programmed by the flash programmer (e.g. JTAG
>> debugger).
>>
>> The patch is based on the work by Maxim Artamonov.
>>
>> Signed-off-by: Maxim Artamonov <scn1874@yandex.ru>
>> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
> ...
>> +static int is_badblock(int pagenumber)
>> +{
>> + ? ? int page = pagenumber;
>> + ? ? int maxpagecheck = CONFIG_SYS_NAND_PAGE_SIZE == 0x800 ? 2 : 1;
>> + ? ? u32 badblock;
>> + ? ? u32 *src;
>> +
>> + ? ? // todo shall we check both or only one of them?
>
> Please do not use C++ comments.

Thought I had searched for all // and todo's but obviously missed one, thanks.

>
>> +void nand_boot(void)
>> +{
>> + ? ? __attribute__((noreturn)) void (*uboot)(void);
>> +
>> + ? ? nfc = (void *)NFC_BASE_ADDR;
>> +
>> + ? ? /*
>> + ? ? ?* CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
>> + ? ? ?* be aligned to full pages
>> + ? ? ?*/
>> + ? ? if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
>> + ? ? ? ? ? ? ? ? ? ?(uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
>> + ? ? ? ? ? ? /* Copy from NAND successful, start U-boot */
>> + ? ? ? ? ? ? uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
>> + ? ? ? ? ? ? uboot();
>> + ? ? } else {
>> + ? ? ? ? ? ? /* Unrecoverable error when copying from NAND */
>> + ? ? ? ? ? ? while (1) {
>> + ? ? ? ? ? ? ? ? ? ? /* Loop forever */
>> + ? ? ? ? ? ? }
>
> No braces needed for single line constructs. And why don't you simply
> call hang() here (which might be ?doing ?additional ?things ?on ?some
> boards. like flashing some LED or so)?

I'll call hang().

>> +}
>> +
>> +/*
>> + * Called from start.S in case of an exception.
>> + */
>> +void hang(void)
>> +{
>> + ? ? while (1) {
>> + ? ? ? ? ? ? /* Loop forever */
>> + ? ? }
>
> No braces needed for single line constructs. And I think some (older)
> compilers might complain about a missing ';'.

OK, will fix.

Thanks, Magnus

[U-Boot] [PATCH v3 1/6] ARM1136: Introduce CONFIG_PRELOADER macro.

[Wolfgang Denk]

Dear Magnus,

In message <bef59ad70a27ef8496f88b85510f8d2c236e8cd9.1244572159.git.lilja.magnus@gmail.com> you wrote:
> Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's
> in start.S. In preparation for adding support for NAND SPL
> the macro CONFIG_PRELOADER is introducted and replaces the
> CONFIG_ONENAND_IPL in start.S.
> 
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
> ---
>  README                             |    5 +++++
>  cpu/arm1136/start.S                |   24 ++++++++++++------------
>  onenand_ipl/board/apollon/Makefile |    4 ++--
>  3 files changed, 19 insertions(+), 14 deletions(-)
> 
> diff --git a/README b/README
> index 561c100..86cf628 100644
> --- a/README
> +++ b/README
> @@ -2702,6 +2702,11 @@ Low Level (hardware related) configuration options:
>  		some other boot loader or by a debugger which
>  		performs these initializations itself.
>  
> +- CONFIG_PRELOADER
> +
> +		[ARM only] Modifies the behaviour of start.S when
> +		compiling a loader that is executed before the actual
> +		U-Boot. E.g. when compiling a NAND SPL.

Is there a special reason for making this ARM only?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
You humans have that emotional need  to  express  gratitude.  "You're
welcome," I believe, is the correct response.
	-- Spock, "Bread and Circuses", stardate 4041.2

[U-Boot] [PATCH v3 1/6] ARM1136: Introduce CONFIG_PRELOADER macro.

[Magnus Lilja]

Dear Wolfgang,

2009/6/9 Wolfgang Denk <wd@denx.de>:
> Dear Magnus,
>
> In message <bef59ad70a27ef8496f88b85510f8d2c236e8cd9.1244572159.git.lilja.magnus@gmail.com> you wrote:
>> Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's
>> in start.S. In preparation for adding support for NAND SPL
>> the macro CONFIG_PRELOADER is introducted and replaces the
>> CONFIG_ONENAND_IPL in start.S.
>>
>> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
>> ---
>> ?README ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?5 +++++
>> ?cpu/arm1136/start.S ? ? ? ? ? ? ? ?| ? 24 ++++++++++++------------
>> ?onenand_ipl/board/apollon/Makefile | ? ?4 ++--
>> ?3 files changed, 19 insertions(+), 14 deletions(-)
>>
>> diff --git a/README b/README
>> index 561c100..86cf628 100644
>> --- a/README
>> +++ b/README
>> @@ -2702,6 +2702,11 @@ Low Level (hardware related) configuration options:
>> ? ? ? ? ? ? ? some other boot loader or by a debugger which
>> ? ? ? ? ? ? ? performs these initializations itself.
>>
>> +- CONFIG_PRELOADER
>> +
>> + ? ? ? ? ? ? [ARM only] Modifies the behaviour of start.S when
>> + ? ? ? ? ? ? compiling a loader that is executed before the actual
>> + ? ? ? ? ? ? U-Boot. E.g. when compiling a NAND SPL.
>
> Is there a special reason for making this ARM only?

No, but it's only used on ARM so far.

/Magnus

[U-Boot] [PATCH v3 1/6] ARM1136: Introduce CONFIG_PRELOADER macro.

[Wolfgang Denk]

Dear Magnus Lilja,

In message <59b21cf20906091219y4eb0623ekfcaa9bb4f482232c@mail.gmail.com> you wrote:
> 
> >> =A0README =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =

Unrelated note: I see an increasing number of mails where plain simple
sequences of space characters get converted into this stupid 0xA0
characters.

Can anybody explain to me why that is happening, or how it can be
prevented. 

> >> +- CONFIG_PRELOADER
> >> +
> >> +             [ARM only] Modifies the behaviour of start.S w> hen
> >> +             compiling a loader that is executed before the>  actual
> >> +             U-Boot. E.g. when compiling a NAND SPL.
> >
> > Is there a special reason for making this ARM only?
>
> No, but it's only used on ARM so far.

Then please remove that comment. Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
What about WRITING it first and rationalizing it afterwords?  :-)
                       - Larry Wall in <8162@jpl-devvax.JPL.NASA.GOV>

[U-Boot] [PATCH v3 1/6] ARM1136: Introduce CONFIG_PRELOADER macro.

[Magnus Lilja]

Wolfgang,

2009/6/9 Wolfgang Denk <wd@denx.de>:
> Dear Magnus Lilja,
>
> In message <59b21cf20906091219y4eb0623ekfcaa9bb4f482232c@mail.gmail.com> you wrote:
>>
>> >> =A0README =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =
>
> Unrelated note: I see an increasing number of mails where plain simple
> sequences of space characters get converted into this stupid 0xA0
> characters.
>
> Can anybody explain to me why that is happening, or how it can be
> prevented.

Were those A0's present in my original mail or only in the followup I
did to your comment? I used git to send the series and followups are
done using gmail's web interface.

Regards, Magnus

[U-Boot] [PATCH v3 1/6] ARM1136: Introduce CONFIG_PRELOADER macro.

[Wolfgang Denk]

Dear Magnus Lilja,

In message <59b21cf20906091325x683f5a69r76155edabc687b95@mail.gmail.com> you wrote:
> 
> >> >> =A0README =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =
> >
> > Unrelated note: I see an increasing number of mails where plain simple
> > sequences of space characters get converted into this stupid 0xA0
> > characters.
> >
> > Can anybody explain to me why that is happening, or how it can be
> > prevented.
> 
> Were those A0's present in my original mail or only in the followup I
> did to your comment? I used git to send the series and followups are
> done using gmail's web interface.

Only in your followup. The original mail contained plain space
characters (0x20 ASCII) there.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Intel's new motto: United we stand. Divided we fall!