From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michal Simek Date: Tue, 30 Mar 2021 12:09:56 +0200 Subject: [PATCH 0/4] xilinx: Enable redundant variables for all Xilinx SoCs Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, based on discussion with Tom here https://lists.denx.de/pipermail/u-boot/2021-January/437234.html I decided to enable redundant variables on all Xilinx SoCs. Users who don't want to use it can disable this option. But having extended structure for variable storing is based on that thread above the right way to go. It means switch to the right approach is better to do earlier rather than later. Thanks, Michal Ashok Reddy Soma (2): xilinx: zynq: Add support for saving env based on bootmode xilinx: versal: Add support for saving env based on bootmode Michal Simek (2): env: Setup default value for ENV_OFFSET_REDUND xilinx: Enable redundant variable handling board/xilinx/versal/board.c | 30 ++++++++++++++++++++++++++ board/xilinx/zynq/board.c | 32 ++++++++++++++++++++++++++++ configs/microblaze-generic_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 4 ++++ configs/xilinx_zynq_virt_defconfig | 6 +++++- configs/xilinx_zynqmp_virt_defconfig | 1 + env/Kconfig | 3 ++- 7 files changed, 75 insertions(+), 2 deletions(-) -- 2.31.0