From: Grzegorz Szymaszek <gszymaszek@short.pl>
To: u-boot@lists.denx.de
Cc: Grzegorz Szymaszek <gszymaszek@short.pl>,
Marcin Sloniewski <marcin.sloniewski@gmail.com>,
Patrice Chotard <patrice.chotard@foss.st.com>,
Patrick Delaunay <patrick.delaunay@foss.st.com>,
uboot-stm32@st-md-mailman.stormreply.com
Subject: [PATCH 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A
Date: Fri, 28 May 2021 18:52:58 +0200 [thread overview]
Message-ID: <cover.1622220270.git.gszymaszek@short.pl> (raw)
This patchset updates the properties of the SDMMC2 device tree node so
that they match their Linux kernel and Trusted Firmware A counterparts.
Two differences will remain:
— in the Linux kernel device tree, the VQMMC supply is incorrectly set
to v3v3 (buck4) instead of vdd (buck3);
— in the TF‑A device tree, only the “default” pinctrl is configured.
Additionally, this patchset enables SDMMC2 in SPL.
Grzegorz Szymaszek (5):
arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL
.../dts/stm32mp157c-odyssey-som-u-boot.dtsi | 21 +++++++++++++++++++
arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 15 +++++++------
2 files changed, 30 insertions(+), 6 deletions(-)
--
2.30.2
next reply other threads:[~2021-05-28 16:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-28 16:52 Grzegorz Szymaszek [this message]
2021-05-28 16:53 ` [PATCH 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties Grzegorz Szymaszek
2021-06-02 7:16 ` Patrice CHOTARD
2021-05-28 16:54 ` [PATCH 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes Grzegorz Szymaszek
2021-06-02 7:16 ` Patrice CHOTARD
2021-05-28 16:54 ` [PATCH 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply Grzegorz Szymaszek
2021-06-02 7:18 ` Patrice CHOTARD
2021-08-05 12:34 ` Grzegorz Szymaszek
2021-05-28 16:54 ` [PATCH 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode Grzegorz Szymaszek
2021-06-02 7:19 ` Patrice CHOTARD
2021-05-28 16:54 ` [PATCH 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL Grzegorz Szymaszek
2021-06-02 7:20 ` Patrice CHOTARD
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