From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 149ABC2B9F7 for ; Fri, 28 May 2021 16:53:13 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D8BB6139A for ; Fri, 28 May 2021 16:53:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1D8BB6139A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=short.pl Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A948181ED0; Fri, 28 May 2021 18:53:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=short.pl Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id AE00182CAC; Fri, 28 May 2021 18:53:05 +0200 (CEST) Received: from mx01.ayax.eu (mx01.ayax.eu [188.137.98.110]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 75D1980423 for ; Fri, 28 May 2021 18:53:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=short.pl Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=gszymaszek@short.pl Received: from [192.168.192.146] (port=39190 helo=nx64de-df6d00) by mx01.ayax.eu with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lmfjH-0008AW-Is; Fri, 28 May 2021 18:52:59 +0200 Date: Fri, 28 May 2021 18:52:58 +0200 From: Grzegorz Szymaszek To: u-boot@lists.denx.de Cc: Grzegorz Szymaszek , Marcin Sloniewski , Patrice Chotard , Patrick Delaunay , uboot-stm32@st-md-mailman.stormreply.com Subject: [PATCH 0/5] arm: dts: =?utf-8?Q?stm32mp157?= =?utf-8?Q?c-odyssey-som=3A_sync_SDMMC2_with_Linux_and_TF=E2=80=91A?= Message-ID: Mail-Followup-To: u-boot@lists.denx.de, Marcin Sloniewski , Patrice Chotard , Patrick Delaunay , uboot-stm32@st-md-mailman.stormreply.com MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean This patchset updates the properties of the SDMMC2 device tree node so that they match their Linux kernel and Trusted Firmware A counterparts. Two differences will remain: — in the Linux kernel device tree, the VQMMC supply is incorrectly set to v3v3 (buck4) instead of vdd (buck3); — in the TF‑A device tree, only the “default” pinctrl is configured. Additionally, this patchset enables SDMMC2 in SPL. Grzegorz Szymaszek (5): arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL .../dts/stm32mp157c-odyssey-som-u-boot.dtsi | 21 +++++++++++++++++++ arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 15 +++++++------ 2 files changed, 30 insertions(+), 6 deletions(-) -- 2.30.2