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From: Michal Simek <michal.simek@amd.com>
To: <u-boot@lists.denx.de>, <git@amd.com>
Cc: Harini Katakam <harini.katakam@amd.com>,
	Jerome Forissier <jerome.forissier@arm.com>,
	Martin Kaistra <martin.kaistra@linutronix.de>,
	Padmarao Begari <padmarao.begari@amd.com>,
	Tom Rini <trini@konsulko.com>,
	Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Subject: [PATCH 0/3] net: zynq_gem: driver enhancement
Date: Mon, 2 Mar 2026 08:43:31 +0100	[thread overview]
Message-ID: <cover.1772437409.git.michal.simek@amd.com> (raw)

Hi,

on cache coherent system some operations are not working properly
hence these 3 patches.
Boardcast one is just optimization to ignore packets which are not for us.
TXSR is actual fix for coherent system.
dma-coherent flag handling is nice to have but don't expect any performance
improvement.

Thanks,
Michal


Michal Simek (2):
  net: zynq_gem: Disable broadcast packets
  net: zynq_gem: Add support for dma-coherent flag

Padmarao Begari (1):
  net: zynq_gem: clear TXSR transfer complete

 drivers/net/zynq_gem.c | 34 +++++++++++++++++++++++++---------
 1 file changed, 25 insertions(+), 9 deletions(-)

-- 
2.43.0

base-commit: 1f3f1426a8ad7123de58103913eea84c84ce08bf
branch: debian-sent3

             reply	other threads:[~2026-03-02  7:43 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-02  7:43 Michal Simek [this message]
2026-03-02  7:43 ` [PATCH 1/3] net: zynq_gem: Disable broadcast packets Michal Simek
2026-03-02  7:43 ` [PATCH 2/3] net: zynq_gem: clear TXSR transfer complete Michal Simek
2026-03-02  7:43 ` [PATCH 3/3] net: zynq_gem: Add support for dma-coherent flag Michal Simek
2026-03-10  7:36 ` [PATCH 0/3] net: zynq_gem: driver enhancement Michal Simek

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