From: Patrice CHOTARD <patrice.chotard@foss.st.com>
To: Gatien Chevallier <gatien.chevallier@foss.st.com>,
<u-boot@lists.denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>,
Sughosh Ganu <sughosh.ganu@linaro.org>,
Heinrich Schuchardt <xypron.glpk@gmx.de>,
<uboot-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH v3 3/7] rng: stm32: Implement configurable RNG clock error detection
Date: Wed, 27 Sep 2023 08:56:09 +0200 [thread overview]
Message-ID: <d030d44d-71f4-976e-da73-2515d628be21@foss.st.com> (raw)
In-Reply-To: <20230919152759.327420-4-gatien.chevallier@foss.st.com>
On 9/19/23 17:27, Gatien Chevallier wrote:
> RNG clock error detection is now enabled if the "clock-error-detect"
> property is set in the device tree.
>
> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> Changes in V2:
> - Added Patrick's tag
>
> drivers/rng/stm32_rng.c | 22 +++++++++++++++++-----
> 1 file changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/rng/stm32_rng.c b/drivers/rng/stm32_rng.c
> index 89da78c6c8..ada5d92214 100644
> --- a/drivers/rng/stm32_rng.c
> +++ b/drivers/rng/stm32_rng.c
> @@ -40,6 +40,7 @@ struct stm32_rng_plat {
> struct clk clk;
> struct reset_ctl rst;
> const struct stm32_rng_data *data;
> + bool ced;
> };
>
> static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
> @@ -97,25 +98,34 @@ static int stm32_rng_init(struct stm32_rng_plat *pdata)
>
> cr = readl(pdata->base + RNG_CR);
>
> - /* Disable CED */
> - cr |= RNG_CR_CED;
> if (pdata->data->has_cond_reset) {
> cr |= RNG_CR_CONDRST;
> + if (pdata->ced)
> + cr &= ~RNG_CR_CED;
> + else
> + cr |= RNG_CR_CED;
> writel(cr, pdata->base + RNG_CR);
> cr &= ~RNG_CR_CONDRST;
> + cr |= RNG_CR_RNGEN;
> writel(cr, pdata->base + RNG_CR);
> err = readl_poll_timeout(pdata->base + RNG_CR, cr,
> (!(cr & RNG_CR_CONDRST)), 10000);
> if (err)
> return err;
> + } else {
> + if (pdata->ced)
> + cr &= ~RNG_CR_CED;
> + else
> + cr |= RNG_CR_CED;
> +
> + cr |= RNG_CR_RNGEN;
> +
> + writel(cr, pdata->base + RNG_CR);
> }
>
> /* clear error indicators */
> writel(0, pdata->base + RNG_SR);
>
> - cr |= RNG_CR_RNGEN;
> - writel(cr, pdata->base + RNG_CR);
> -
> err = readl_poll_timeout(pdata->base + RNG_SR, sr,
> sr & RNG_SR_DRDY, 10000);
> return err;
> @@ -165,6 +175,8 @@ static int stm32_rng_of_to_plat(struct udevice *dev)
> if (err)
> return err;
>
> + pdata->ced = dev_read_bool(dev, "clock-error-detect");
> +
> return 0;
> }
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
next prev parent reply other threads:[~2023-09-27 6:56 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-19 15:27 [PATCH v3 0/7] rng: stm32: support STM32MP13x platforms Gatien Chevallier
2023-09-19 15:27 ` [PATCH v3 1/7] rng: stm32: rename STM32 RNG driver Gatien Chevallier
2023-09-27 6:52 ` Patrice CHOTARD
2023-09-27 7:25 ` Patrice CHOTARD
2023-09-19 15:27 ` [PATCH v3 2/7] configs: default activate CONFIG_RNG_STM32 for STM32MP13x platforms Gatien Chevallier
2023-09-27 6:53 ` Patrice CHOTARD
2023-09-27 7:26 ` [Uboot-stm32] " Patrice CHOTARD
2023-09-19 15:27 ` [PATCH v3 3/7] rng: stm32: Implement configurable RNG clock error detection Gatien Chevallier
2023-09-27 6:56 ` Patrice CHOTARD [this message]
2023-09-27 7:26 ` [Uboot-stm32] " Patrice CHOTARD
2023-09-19 15:27 ` [PATCH v3 4/7] rng: stm32: add RNG clock frequency restraint Gatien Chevallier
2023-09-27 6:56 ` Patrice CHOTARD
2023-09-27 7:26 ` Patrice CHOTARD
2023-09-19 15:27 ` [PATCH v3 5/7] rng: stm32: add error concealment sequence Gatien Chevallier
2023-09-27 6:57 ` Patrice CHOTARD
2023-09-27 7:26 ` Patrice CHOTARD
2023-09-19 15:27 ` [PATCH v3 6/7] rng: stm32: Implement custom RNG configuration support Gatien Chevallier
2023-09-27 7:11 ` Patrice CHOTARD
2023-09-27 7:27 ` [Uboot-stm32] " Patrice CHOTARD
2023-09-19 15:27 ` [PATCH v3 7/7] ARM: dts: stm32: add RNG node for STM32MP13x platforms Gatien Chevallier
2023-09-27 7:11 ` Patrice CHOTARD
2023-09-27 7:27 ` Patrice CHOTARD
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d030d44d-71f4-976e-da73-2515d628be21@foss.st.com \
--to=patrice.chotard@foss.st.com \
--cc=gatien.chevallier@foss.st.com \
--cc=patrick.delaunay@foss.st.com \
--cc=sughosh.ganu@linaro.org \
--cc=u-boot@lists.denx.de \
--cc=uboot-stm32@st-md-mailman.stormreply.com \
--cc=xypron.glpk@gmx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox