Re: [RESEND PATCH v2] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker <jbx6244@gmail.com>]

Hi Tom, Simon,

The test for my patch ends with an error that is reported on various locations on the internet.
My knowledge is limited here. Could you have a look?

Thanks,

Johan

====

rockchip: include: asm: fix entering download mode rk3066 
https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/18283

Error log:
https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/720456

Error message:
Cleaning up project directory and file based variables 00:03
ERROR: Job failed: exit code 100

===

Reported examples elsewhere:

Runner stops at random place with "Cleaning up project directory and file based variables" even if there is no error
https://gitlab.com/gitlab-org/gitlab/-/issues/373265

Gitlab CI/CD fails while "Cleaning up project directory and file based variables" with "ERROR: Job failed: exit code 1"
https://stackoverflow.com/questions/69411379/gitlab-ci-cd-fails-while-cleaning-up-project-directory-and-file-based-variables

On 10/24/23 11:16, Kever Yang wrote:
> Hi Johan,
> 
>     I don't have a detail build error message, but this patch do cause the 32bit ARM platforms build fail in[1];
> 
> Hi Tom,
> 
>     Could you help the take a look, what's the error happen in this case?
> 
> 
> Thanks,
> - Kever
> 
> [1] https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/719987
> 
> On 2023/9/19 23:28, Johan Jonker wrote:
>> Keep track of the re-entries with help of the lr register.
>> This binary can be re-used and called from various BROM functions.
>> Only when it's called from the part that handles SPI, NAND or EMMC
>> hardware it needs to early return to BROM ones.
>> In download mode when it handles data on USB OTG and UART0
>> this section must be skipped.
>>
>> Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
>> support to enter download mode on return to BROM. This binary must check
>> the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
>> It then returns to BROM to the end of the function that reads boot blocks.
>> >From there the BROM code goes into a download mode and waits for data
>> on USB OTG and UART0.
>>
>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>> ---
>>
>> Note:
>>    Normal boot flow is OK.
>>    In download mode this binary hangs after return to BROM for unknown reasons.
>>    Replace CODE471_OPTION with 30_LPDDR2_300MHz_DD.bin for now.
>>
>>    Could Rockchip disclose what further conditions must be met
>>    in rk3066 download mode?
>>
>> Changed V2:
>>    Move file to rk3066 specific location
>>    Replace retry_counter by LR check
>>    Add DNL mode return address
>>    Restyle
>>    Reword
>> ---
>>   arch/arm/include/asm/arch-rk3066/boot0.h | 77 +++++++++++++++++++++++-
>>   arch/arm/mach-rockchip/Kconfig           | 17 +++++-
>>   arch/arm/mach-rockchip/rk3066/Kconfig    |  6 ++
>>   3 files changed, 98 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-rk3066/boot0.h b/arch/arm/include/asm/arch-rk3066/boot0.h
>> index 28c0fb9a4c6b..1af4b9c1d7ba 100644
>> --- a/arch/arm/include/asm/arch-rk3066/boot0.h
>> +++ b/arch/arm/include/asm/arch-rk3066/boot0.h
>> @@ -3,6 +3,81 @@
>>   #ifndef __ASM_ARCH_BOOT0_H__
>>   #define __ASM_ARCH_BOOT0_H__
>>
>> -#include <asm/arch-rockchip/boot0.h>
>> +#include <asm/arch-rockchip/boot_mode.h>
>>
>> +/*
>> + * Execution starts on the instruction following this 4-byte header
>> + * (containing the magic 'RK30'). This magic constant will be written into
>> + * the final image by the rkimage tool, but we need to reserve space for it here.
>> + */
>> +#ifdef CONFIG_SPL_BUILD
>> +    b    1f  /* if overwritten, entry-address is at the next word */
>> +1:
>> +#endif
>> +
>> +#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
>> +/*
>> + * Keep track of the re-entries with help of the lr register.
>> + * This binary can be re-used and called from various BROM functions.
>> + * Only when it's called from the part that handles SPI, NAND or EMMC
>> + * hardware it needs to early return to BROM ones.
>> + * In download mode when it handles data on USB OTG and UART0
>> + * this section must be skipped.
>> + */
>> +    ldr    r3, =CONFIG_ROCKCHIP_BOOT_LR_REG
>> +    cmp    lr, r3          /* if (LR != CONFIG_ROCKCHIP_BOOT_LR_REG)        */
>> +    bne    reset           /*     goto reset;                               */
>> +/*
>> + * Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
>> + * support to enter download mode on return to BROM. This binary must check
>> + * the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
>> + * It then returns to BROM to the end of the function that reads boot blocks.
>> + * From there the BROM code goes into a download mode and waits for data
>> + * on USB OTG and UART0.
>> + */
>> +    ldr    r2, =BOOT_BROM_DOWNLOAD
>> +    ldr    r3, =CONFIG_ROCKCHIP_BOOT_MODE_REG
>> +    ldr    r0, [r3]        /* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) !=   */
>> +    cmp    r0, r2          /*     BOOT_BROM_DOWNLOAD) {                     */
>> +    bne    early_return    /*     goto early_return;                        */
>> +                /* } else {                                      */
>> +    mov    r0, #0
>> +    str    r0, [r3]        /*     writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG); */
>> +
>> +    ldr    r3, =CONFIG_ROCKCHIP_BOOT_RETURN_REG
>> +    bx    r3              /*     return to CONFIG_ROCKCHIP_BOOT_RETURN_REG;*/
>> +
>> +early_return:
>> +    bx    lr              /*  return to LR in BROM                         */
>> +
>> +SAVE_SP_ADDR:
>> +    .word 0
>> +
>> +    .globl save_boot_params
>> +save_boot_params:
>> +    push    {r1-r12, lr}
>> +    ldr    r0, =SAVE_SP_ADDR
>> +    str    sp, [r0]
>> +    b    save_boot_params_ret
>> +
>> +    .globl back_to_bootrom
>> +back_to_bootrom:
>> +    ldr    r0, =SAVE_SP_ADDR
>> +    ldr    sp, [r0]
>> +    mov    r0, #0
>> +    pop    {r1-r12, pc}
>> +#endif
>> +
>> +#if (defined(CONFIG_SPL_BUILD))
>> +/* U-Boot proper of armv7 does not need this */
>> +    b reset
>> +#endif
>> +
>> +/*
>> + * For armv7, the addr '_start' will be used as vector start address
>> + * and is written to the VBAR register, which needs to aligned to 0x20.
>> + */
>> +    .align(5), 0x0
>> +_start:
>> +    ARM_VECTORS
>>   #endif
>> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
>> index 07b5595dac8c..84a2f0d5ff48 100644
>> --- a/arch/arm/mach-rockchip/Kconfig
>> +++ b/arch/arm/mach-rockchip/Kconfig
>> @@ -402,7 +402,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
>>   config TPL_ROCKCHIP_BACK_TO_BROM
>>       bool "TPL returns to bootrom"
>>       default y
>> -    select ROCKCHIP_BROM_HELPER
>> +    select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066
>>       select TPL_BOOTROM_SUPPORT
>>       depends on TPL
>>       help
>> @@ -448,6 +448,21 @@ config ROCKCHIP_BOOT_MODE_REG
>>         The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
>>         according to the value from this register.
>>
>> +config ROCKCHIP_BOOT_LR_REG
>> +    hex "Rockchip boot early return LR address"
>> +    depends on TPL_ROCKCHIP_EARLYRETURN_TO_BROM || SPL_ROCKCHIP_EARLYRETURN_TO_BROM
>> +    help
>> +      With ROCKCHIP_EARLYRETURN_TO_BROM enabled this LR address is
>> +      used to keep track of the re-entries.
>> +
>> +config ROCKCHIP_BOOT_RETURN_REG
>> +    hex "Rockchip download mode return address"
>> +    depends on TPL_ROCKCHIP_EARLYRETURN_TO_BROM || SPL_ROCKCHIP_EARLYRETURN_TO_BROM
>> +    help
>> +      Rockchip SoC models without built-in support to enter
>> +      download mode after early return to BROM code use a SoC
>> +      specific return address in BROM.
>> +
>>   config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON
>>       bool "Disable device boot on power plug-in"
>>       depends on PMIC_RK8XX
>> diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig
>> index 95d7fc8a2917..3721f7469a9e 100644
>> --- a/arch/arm/mach-rockchip/rk3066/Kconfig
>> +++ b/arch/arm/mach-rockchip/rk3066/Kconfig
>> @@ -10,6 +10,12 @@ config TARGET_MK808
>>   config ROCKCHIP_BOOT_MODE_REG
>>       default 0x20004040
>>
>> +config ROCKCHIP_BOOT_LR_REG
>> +    default 0x00001058
>> +
>> +config ROCKCHIP_BOOT_RETURN_REG
>> +    default 0x00001100
>> +
>>   config SYS_SOC
>>       default "rk3066"
>>
>> -- 
>> 2.39.2
>>