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From: Michal Simek <michal.simek@amd.com>
To: u-boot@lists.denx.de, git@amd.com
Cc: Padmarao Begari <padmarao.begari@amd.com>, Tom Rini <trini@konsulko.com>
Subject: Re: [PATCH v2 1/2] arm64: versal2: Make hardware.h assembly safe
Date: Mon, 20 Jul 2026 08:21:04 +0200	[thread overview]
Message-ID: <d38109ed-eab4-4fd1-9e61-9e5a3268ebd5@amd.com> (raw)
In-Reply-To: <de4de47ea457b285c5870e7ba25b4baf554561e7.1783493630.git.michal.simek@amd.com>



On 7/8/26 08:53, Michal Simek wrote:
> The register address and bootmode defines in this header are useful from
> early assembly (e.g. lowlevel_init reading PMC_TAP_IDCODE), but the file
> could not be included from .S because the C-only declarations were not
> guarded.
> 
> Reorder the header so all plain address/value defines are visible to both
> C and assembly, and move every C-only construct (the linux/bitops.h
> include, the register structs, the base pointer-cast macros and the
> platform enum) into a single #ifndef __ASSEMBLY__ block.
> 
> No functional change for C consumers.
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
> Changes in v2:
> - new patch in series
> 
>   arch/arm/mach-versal2/include/mach/hardware.h | 82 +++++++++----------
>   1 file changed, 41 insertions(+), 41 deletions(-)
> 
> diff --git a/arch/arm/mach-versal2/include/mach/hardware.h b/arch/arm/mach-versal2/include/mach/hardware.h
> index 1bebf20910a0..7977529fd6c1 100644
> --- a/arch/arm/mach-versal2/include/mach/hardware.h
> +++ b/arch/arm/mach-versal2/include/mach/hardware.h
> @@ -4,34 +4,6 @@
>    * Copyright (C) 2022 - 2025, Advanced Micro Devices, Inc.
>    */
>   
> -#ifndef __ASSEMBLY__
> -#include <linux/bitops.h>
> -#endif
> -
> -struct crlapb_regs {
> -	u32 reserved0[67];
> -	u32 cpu_r5_ctrl;
> -	u32 reserved;
> -	u32 iou_switch_ctrl; /* 0x114 */
> -	u32 reserved1[13];
> -	u32 timestamp_ref_ctrl; /* 0x14c */
> -	u32 reserved3[108];
> -	u32 rst_cpu_r5;
> -	u32 reserved2[17];
> -	u32 rst_timestamp; /* 0x348 */
> -};
> -
> -struct iou_scntrs_regs {
> -	u32 counter_control_register; /* 0x0 */
> -	u32 reserved0[7];
> -	u32 base_frequency_id_register; /* 0x20 */
> -};
> -
> -struct crp_regs {
> -	u32 reserved0[128];
> -	u32 boot_mode_usr;	/* 0x200 */
> -};
> -
>   #define VERSAL2_CRL_APB_BASEADDR		0xEB5E0000
>   #define VERSAL2_CRP_BASEADDR			0xF1260000
>   #define VERSAL2_IOU_SCNTR_SECURE		0xEC920000
> @@ -41,10 +13,6 @@ struct crp_regs {
>   #define IOU_SWITCH_CTRL_DIVISOR0_SHIFT		8
>   #define IOU_SCNTRS_CONTROL_EN			1
>   
> -#define crlapb_base ((struct crlapb_regs *)VERSAL2_CRL_APB_BASEADDR)
> -#define crp_base ((struct crp_regs *)VERSAL2_CRP_BASEADDR)
> -#define iou_scntr_secure ((struct iou_scntrs_regs *)VERSAL2_IOU_SCNTR_SECURE)
> -
>   #define PMC_TAP	0xF11A0000
>   
>   #define PMC_TAP_IDCODE		(PMC_TAP + 0)
> @@ -76,15 +44,6 @@ struct crp_regs {
>   #define PMC_MULTI_BOOT_REG	0xF1110004
>   #define PMC_MULTI_BOOT_MASK	0x1FFF
>   
> -enum versal2_platform {
> -	VERSAL2_SILICON = 0,
> -	VERSAL2_SPP = 1,
> -	VERSAL2_EMU = 2,
> -	VERSAL2_QEMU = 3,
> -	VERSAL2_SPP_MMD = 5,
> -	VERSAL2_EMU_MMD = 6,
> -};
> -
>   #define VERSAL2_SLCR_BASEADDR	0xF1060000
>   #define VERSAL_AXI_MUX_SEL	(VERSAL2_SLCR_BASEADDR + 0x504)
>   #define VERSAL_OSPI_LINEAR_MODE	BIT(1)
> @@ -108,3 +67,44 @@ enum versal2_platform {
>   
>   #define PMC_GLOBAL_PGGS3_REG	0xF111005C
>   #define PMC_GLOBAL_PGGS4_REG	0xF1110060
> +
> +#ifndef __ASSEMBLY__
> +#include <linux/bitops.h>
> +
> +struct crlapb_regs {
> +	u32 reserved0[67];
> +	u32 cpu_r5_ctrl;
> +	u32 reserved;
> +	u32 iou_switch_ctrl; /* 0x114 */
> +	u32 reserved1[13];
> +	u32 timestamp_ref_ctrl; /* 0x14c */
> +	u32 reserved3[108];
> +	u32 rst_cpu_r5;
> +	u32 reserved2[17];
> +	u32 rst_timestamp; /* 0x348 */
> +};
> +
> +struct iou_scntrs_regs {
> +	u32 counter_control_register; /* 0x0 */
> +	u32 reserved0[7];
> +	u32 base_frequency_id_register; /* 0x20 */
> +};
> +
> +struct crp_regs {
> +	u32 reserved0[128];
> +	u32 boot_mode_usr;	/* 0x200 */
> +};
> +
> +#define crlapb_base ((struct crlapb_regs *)VERSAL2_CRL_APB_BASEADDR)
> +#define crp_base ((struct crp_regs *)VERSAL2_CRP_BASEADDR)
> +#define iou_scntr_secure ((struct iou_scntrs_regs *)VERSAL2_IOU_SCNTR_SECURE)
> +
> +enum versal2_platform {
> +	VERSAL2_SILICON = 0,
> +	VERSAL2_SPP = 1,
> +	VERSAL2_EMU = 2,
> +	VERSAL2_QEMU = 3,
> +	VERSAL2_SPP_MMD = 5,
> +	VERSAL2_EMU_MMD = 6,
> +};
> +#endif /* __ASSEMBLY__ */
> ---
> base-commit: 3278a671cb521d898e6f49d35f6bc034b2ac4d46
> branch: debian-sent3
> 

Applied all.
M

      parent reply	other threads:[~2026-07-20  6:21 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-08  6:53 [PATCH v2 1/2] arm64: versal2: Make hardware.h assembly safe Michal Simek
2026-07-08  6:53 ` [PATCH v2 2/2] arm64: versal2: Select GIC redistributor base at runtime Michal Simek
2026-07-20  6:21 ` Michal Simek [this message]

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