From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FA9EC64EC4 for ; Wed, 8 Mar 2023 08:39:45 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0954E85CA2; Wed, 8 Mar 2023 09:39:40 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qZi3YCxM"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7058485CA8; Wed, 8 Mar 2023 09:39:38 +0100 (CET) Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 410F285C9E for ; Wed, 8 Mar 2023 09:39:31 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jbx6244@gmail.com Received: by mail-ed1-x52f.google.com with SMTP id i34so62553994eda.7 for ; Wed, 08 Mar 2023 00:39:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1678264771; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:from:subject:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=7dMRo+wvNdJVWdNxiF4qmID9yijXt1zMGD35zpeEWos=; b=qZi3YCxMYNHmCXdyvJ1VVirIABw3U48vy6hZZd3fLoXq62icMlSuOkpKHmiO6JW2Gn vRYLIrYj1ykRkbMNiSg7Zv3VXgqjWB5T+HFCR4poK1RWD5NvsHzZGi+aYLGlkaXx6NGO Xju8/SvIi//4Jighwiz+4GWuuAjht79RgWoamPGmEDQI1SeHUUrdDNeIkt3RxlhFliJW 22GZJUobngN4pmTeVNrxESeOWn9sYjHsfJxECIiL5dklaH1R1s237dW9NZez6wYsgtUh KmXza/encOX2RAixe4pjeXelDY4pp9y8+mdMrFxWUNBAvNcMgiZoOsWhm7aeadRKTWcQ qj9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678264771; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:from:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=7dMRo+wvNdJVWdNxiF4qmID9yijXt1zMGD35zpeEWos=; b=IslTYwT1NAggu/ut2McqfrxR/PpGJjUI4U8DDK2LeokKEQ0sIN5wLb+HEBBEEZMkLU 5FGTWXVMu1E73/+u5kFTXUaKKdFnlsviAEh5m8Inco8d76pORqhTfU8v7hbW1gppfz/3 3i35JmAkUlvuK2UWwVSfVsbOYZxIf8Yzf9ThWbtjPUkP//cSvX93NcFYRE63QeRE+b2g kEuAKOl+IBxSSMplU29hmBROdVjusGZdRORVWiAZ6ZhJeH8FhK3cAe6OXuhdgzolZfUh SUMSjMPvCjjraOEHZQrQzmMO3rodTwHzt8ipeLxMYYavA9C4WYSHpnNNVd04uWn6NSgV o+7A== X-Gm-Message-State: AO0yUKV85GZTUUYA1QYxYJjt0smTquSXNW/WNqeujUEnJPug1czI+oGo mqNFC6t9JMRaoKlL/o/LaW0= X-Google-Smtp-Source: AK7set89sbc158xGWX2fguSDiQFDHKpAV3yhoVla6aDE+E08b5Js2SPXqZyiYHqYuTam+9YXlAyXvw== X-Received: by 2002:aa7:d796:0:b0:4ac:d2bc:4695 with SMTP id s22-20020aa7d796000000b004acd2bc4695mr16326079edq.33.1678264770688; Wed, 08 Mar 2023 00:39:30 -0800 (PST) Received: from [192.168.2.2] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id o22-20020a509b16000000b004c4eed3fe20sm7858175edi.5.2023.03.08.00.39.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Mar 2023 00:39:30 -0800 (PST) Message-ID: Date: Wed, 8 Mar 2023 09:39:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v6 11/22] core: remap: convert regmap_init_mem_plat() input to phys_addr_t From: Johan Jonker To: dario.binacchi@amarulasolutions.com, michael@amarulasolutions.com, sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com Cc: u-boot@lists.denx.de, yifeng.zhao@rock-chips.com References: <7256f237-4b7b-f7d7-834f-f7c3fb8984d7@gmail.com> <5660f08b-516c-ae72-3402-c7b742a7cb01@gmail.com> Content-Language: en-US In-Reply-To: <5660f08b-516c-ae72-3402-c7b742a7cb01@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 3/3/23 01:14, Johan Jonker wrote: > The fdt_addr_t and phys_addr_t size have been decoupled. > A 32bit CPU can expect 64-bit data from the device tree parser, > so convert regmap_init_mem_plat() input to phys_addr_t in files > that use this function. Also correct struct syscon_base_plat > depending on CONFIG_PHYS_64BIT setting and fix ARRAY_SIZE > divider. > > Signed-off-by: Johan Jonker > Reviewed-by: Kever Yang > --- > drivers/core/regmap.c | 2 +- > drivers/core/syscon-uclass.c | 4 ++-- > drivers/ram/rockchip/sdram_rk3066.c | 2 +- > drivers/ram/rockchip/sdram_rk3188.c | 2 +- > drivers/ram/rockchip/sdram_rk322x.c | 2 +- > drivers/ram/rockchip/sdram_rk3288.c | 2 +- > drivers/ram/rockchip/sdram_rk3328.c | 2 +- > drivers/ram/rockchip/sdram_rk3399.c | 2 +- > include/regmap.h | 2 +- > include/syscon.h | 13 +++++++------ > 10 files changed, 17 insertions(+), 16 deletions(-) > > diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c > index e33bb9d7..37da64b2 100644 > --- a/drivers/core/regmap.c > +++ b/drivers/core/regmap.c > @@ -79,7 +79,7 @@ static struct regmap *regmap_alloc(int count) > } > > #if CONFIG_IS_ENABLED(OF_PLATDATA) > -int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count, > +int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count, > struct regmap **mapp) > { > struct regmap_range *range; > diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c > index 25fdb66e..b557a24f 100644 > --- a/drivers/core/syscon-uclass.c > +++ b/drivers/core/syscon-uclass.c > @@ -58,8 +58,8 @@ static int syscon_pre_probe(struct udevice *dev) > #if CONFIG_IS_ENABLED(OF_PLATDATA) > struct syscon_base_plat *plat = dev_get_plat(dev); This patch must be put in the garbage bin for now. The size of plat data is unknown. Where is this plat data defined? struct syscon_base_plat is not used elsewhere. With rk3288 this can be 32 or 64bit size. The only place that this can be found out is in the syscon driver that holds the compatible and the struct dtd. Must test if data from struct dtd can be transfered to dev->plat by dev_set_plat() into a fixed struct syscon_base_plat format. Any ideas on how to move forward/fix are welcome! Johan > > - return regmap_init_mem_plat(dev, plat->reg, ARRAY_SIZE(plat->reg), > - &priv->regmap); > + return regmap_init_mem_plat(dev, (phys_addr_t *)plat->reg, > + ARRAY_SIZE(plat->reg) / 2, &priv->regmap); This patch > #else > return regmap_init_mem(dev_ofnode(dev), &priv->regmap); > #endif [..] > diff --git a/include/syscon.h b/include/syscon.h > index f5e6cc1a..836ae07c 100644 > --- a/include/syscon.h > +++ b/include/syscon.h > @@ -27,14 +27,15 @@ struct syscon_ops { > > #if CONFIG_IS_ENABLED(OF_PLATDATA) > /* > - * We don't support 64-bit machines. If they are so resource-contrained that > - * they need to use OF_PLATDATA, something is horribly wrong with the > - * education of our hardware engineers. > - * > - * Update: 64-bit is now supported and we have an education crisis. > + * Support for 64bit or 32bit fdt addresses > + * depending on the physical SoC properties. > */ > struct syscon_base_plat { > - fdt_val_t reg[2]; > +#ifdef CONFIG_PHYS_64BIT > + fdt64_t reg[2]; > +#else > + fdt32_t reg[2]; > +#endif > }; > #endif > > -- > 2.20.1 >