* [PATCH 0/2] board: rockchip: Add FriendlyElec NanoPi R76S @ 2026-01-08 14:35 Jonas Karlman 2026-01-08 14:35 ` [PATCH 1/2] arm64: dts: rockchip: Add devicetree for the " Jonas Karlman 2026-01-08 14:35 ` [PATCH 2/2] board: rockchip: Add " Jonas Karlman 0 siblings, 2 replies; 6+ messages in thread From: Jonas Karlman @ 2026-01-08 14:35 UTC (permalink / raw) To: Kever Yang, Simon Glass, Philipp Tomsich Cc: Tianling Shen, u-boot, Jonas Karlman This series add initial support for the FriendlyElec NanoPi R76S board. Features tested on a NanoPi R76S 2411: - SD-card boot - eMMC boot - LEDs and button - PCIe/Ethernet - USB host Jonas Karlman (1): board: rockchip: Add FriendlyElec NanoPi R76S Tianling Shen (1): arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R76S arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi | 3 + arch/arm/mach-rockchip/rk3576/MAINTAINERS | 6 + configs/nanopi-r76s-rk3576_defconfig | 60 ++ doc/board/rockchip/rockchip.rst | 1 + .../src/arm64/rockchip/rk3576-nanopi-r76s.dts | 860 ++++++++++++++++++ 5 files changed, 930 insertions(+) create mode 100644 arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi create mode 100644 configs/nanopi-r76s-rk3576_defconfig create mode 100644 dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts -- 2.52.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R76S 2026-01-08 14:35 [PATCH 0/2] board: rockchip: Add FriendlyElec NanoPi R76S Jonas Karlman @ 2026-01-08 14:35 ` Jonas Karlman 2026-03-09 14:35 ` Kever Yang 2026-01-08 14:35 ` [PATCH 2/2] board: rockchip: Add " Jonas Karlman 1 sibling, 1 reply; 6+ messages in thread From: Jonas Karlman @ 2026-01-08 14:35 UTC (permalink / raw) To: Kever Yang, Simon Glass, Philipp Tomsich, Tom Rini, Sumit Garg Cc: Tianling Shen, u-boot, Jonas Karlman, Heiko Stuebner From: Tianling Shen <cnsztl@gmail.com> The NanoPi R76S (as "R76S") is an open-sourced mini IoT gateway device with two 2.5G, designed and developed by FriendlyElec. Specification: - Rockchip RK3576 - 2/4GB LPDDR4X RAM - 2x 2500Base-T (PCIe, rtl8125b) - 3x LEDs (Power, LAN, WAN) - 32GB eMMC - MicroSD Slot - MDMI 1.4/2.0 OUT - M.2 E-Key SDIO slot - USB 3.0 Port - USB Type-C 5V Power Signed-off-by: Tianling Shen <cnsztl@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 7fee88882704a5ed7657f467ecb44e39b20f42aa ] (cherry picked from commit e30e000e62268ab43c96f2e6f9dd62b29b81a48c) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> --- .../src/arm64/rockchip/rk3576-nanopi-r76s.dts | 860 ++++++++++++++++++ 1 file changed, 860 insertions(+) create mode 100644 dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts diff --git a/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts b/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts new file mode 100644 index 000000000000..31fbefaeceab --- /dev/null +++ b/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts @@ -0,0 +1,860 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyelec.com) + * + * Copyright (c) 2025 Tianling Shen <cnsztl@gmail.com> + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> + +#include "rk3576.dtsi" + +/ { + model = "FriendlyElec NanoPi R76S"; + compatible = "friendlyarm,nanopi-r76s", "rockchip,rk3576"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + mmc2 = &sdio; + }; + + chosen { + stdout-path = "serial0:1500000n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&user_but_pin>; + + button-reset { + label = "reset"; + gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; + linux,code = <KEY_RESTART>; + wakeup-source; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led1_h>, <&led_sys_h>, <&led2_h>; + + led-0 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_POWER; + gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-2 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_WAN; + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; + }; + }; + + hdmi-con { + compatible = "hdmi-connector"; + hdmi-pwr-supply = <&vcc5v_hdmi_tx>; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&hym8563>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_reg_on_h>; + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + + vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_rtc_s5"; + vin-supply = <&vcc5v0_sys_s5>; + }; + + vcc5v_dcin: regulator-vcc5v-dcin { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v_dcin"; + }; + + vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_tx_on_h>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v_hdmi_tx"; + vin-supply = <&vcc5v0_sys_s5>; + }; + + vcc5v0_device_s0: regulator-vcc5v0-device-s0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_device_s0"; + vin-supply = <&vcc5v_dcin>; + }; + + vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_sys_s5"; + vin-supply = <&vcc5v_dcin>; + }; + + vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_otg0_pwren_h>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_usb_otg0"; + vin-supply = <&vcc5v0_sys_s5>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vcc_1v1_nldo_s3"; + vin-supply = <&vcc5v0_sys_s5>; + }; + + vcc_1v8_s0: regulator-vcc-1v8-s0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + vin-supply = <&vcc_1v8_s3>; + }; + + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-name = "vcc_2v0_pldo_s3"; + vin-supply = <&vcc5v0_sys_s5>; + }; + + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s0"; + vin-supply = <&vcc_3v3_s3>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&hdptxphy { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + pmic@23 { + compatible = "rockchip,rk806"; + reg = <0x23>; + #gpio-cells = <2>; + gpio-controller; + interrupt-parent = <&gpio0>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + system-power-controller; + + vcc1-supply = <&vcc5v0_sys_s5>; + vcc2-supply = <&vcc5v0_sys_s5>; + vcc3-supply = <&vcc5v0_sys_s5>; + vcc4-supply = <&vcc5v0_sys_s5>; + vcc5-supply = <&vcc5v0_sys_s5>; + vcc6-supply = <&vcc5v0_sys_s5>; + vcc7-supply = <&vcc5v0_sys_s5>; + vcc8-supply = <&vcc5v0_sys_s5>; + vcc9-supply = <&vcc5v0_sys_s5>; + vcc10-supply = <&vcc5v0_sys_s5>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys_s5>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys_s5>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs1_pwrdn: dvs1-pwrdn-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun2"; + }; + + rk806_dvs1_rst: dvs1-rst-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun3"; + }; + + rk806_dvs1_slp: dvs1-slp-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun1"; + }; + + rk806_dvs2_dvs: dvs2-dvs-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun4"; + }; + + rk806_dvs2_gpio: dvs2-gpio-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun5"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs2_pwrdn: dvs2-pwrdn-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun2"; + }; + + rk806_dvs2_rst: dvs2-rst-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun3"; + }; + + rk806_dvs2_slp: dvs2-slp-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun1"; + }; + + rk806_dvs3_dvs: dvs3-dvs-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun4"; + }; + + rk806_dvs3_gpio: dvs3-gpio-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun5"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + rk806_dvs3_pwrdn: dvs3-pwrdn-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun2"; + }; + + rk806_dvs3_rst: dvs3-rst-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun3"; + }; + + rk806_dvs3_slp: dvs3-slp-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun1"; + }; + + regulators { + vdd_cpu_big_s0: dcdc-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_cpu_big_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_npu_s0: dcdc-reg2 { + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vcc_3v3_s3: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd_gpu_s0: dcdc-reg5 { + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vddq_ddr_s0: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <800000>; + regulator-name = "vdd_logic_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo2_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pldo2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdda_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_3v3_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdda_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v75_hdmi_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <837500>; + regulator-max-microvolt = <837500>; + regulator-name = "vdda0v75_hdmi_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdda_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdda_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c2 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int_l>; + wakeup-source; + }; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_perstn>; + reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc_3v3_s3>; + status = "okay"; +}; + +&pcie1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie1_perstn>; + reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc_3v3_s3>; + status = "okay"; +}; + +&pinctrl { + bt { + bt_reg_on_h: bt-reg-on-h { + rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_wake_host_h: bt-wake-host-h { + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + host_wake_bt_h: host-wake-bt-h { + rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-keys { + user_but_pin: user-but-pin { + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-leds { + led_sys_h: led-sys-h { + rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led1_h: led1-h { + rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led2_h: led2-h { + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hym8563 { + rtc_int_l: rtc-int-l { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie0_perstn: pcie0-perstn { + rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + pcie1_perstn: pcie1-perstn { + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + usb_otg0_pwren_h: usb-otg0-pwren-h { + rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + wifi_wake_host_h: wifi-wake-host-h { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + wifi_reg_on_h: wifi-reg-on-h { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sai6 { + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&sdio { + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + no-mmc; + no-sd; + non-removable; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vcc_1v8_s3>; + wakeup-source; + status = "okay"; + + rtl8822cs: wifi@1 { + reg = <1>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_wake_host_h>; + }; +}; + +&sdhci { + bus-width = <8>; + cap-mmc-highspeed; + full-pwr-cycle-in-suspend; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + no-sdio; + no-sd; + non-removable; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8_s0>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + phy-supply = <&vcc5v0_usb_otg0>; + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8822cs-bt"; + enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; + device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_wake_host_h &host_wake_bt_h &bt_reg_on_h>; + }; +}; + +&usbdp_phy { + status = "okay"; +}; + +&usb_drd0_dwc3 { + dr_mode = "host"; + extcon = <&u2phy0>; + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; -- 2.52.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R76S 2026-01-08 14:35 ` [PATCH 1/2] arm64: dts: rockchip: Add devicetree for the " Jonas Karlman @ 2026-03-09 14:35 ` Kever Yang 0 siblings, 0 replies; 6+ messages in thread From: Kever Yang @ 2026-03-09 14:35 UTC (permalink / raw) To: Jonas Karlman, Simon Glass, Philipp Tomsich, Tom Rini, Sumit Garg Cc: Tianling Shen, u-boot, Heiko Stuebner On 2026/1/8 22:35, Jonas Karlman wrote: > From: Tianling Shen <cnsztl@gmail.com> > > The NanoPi R76S (as "R76S") is an open-sourced mini IoT gateway > device with two 2.5G, designed and developed by FriendlyElec. > > Specification: > - Rockchip RK3576 > - 2/4GB LPDDR4X RAM > - 2x 2500Base-T (PCIe, rtl8125b) > - 3x LEDs (Power, LAN, WAN) > - 32GB eMMC > - MicroSD Slot > - MDMI 1.4/2.0 OUT > - M.2 E-Key SDIO slot > - USB 3.0 Port > - USB Type-C 5V Power > > Signed-off-by: Tianling Shen <cnsztl@gmail.com> > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > > [ upstream commit: 7fee88882704a5ed7657f467ecb44e39b20f42aa ] > > (cherry picked from commit e30e000e62268ab43c96f2e6f9dd62b29b81a48c) > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > .../src/arm64/rockchip/rk3576-nanopi-r76s.dts | 860 ++++++++++++++++++ > 1 file changed, 860 insertions(+) > create mode 100644 dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts > > diff --git a/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts b/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts > new file mode 100644 > index 000000000000..31fbefaeceab > --- /dev/null > +++ b/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts > @@ -0,0 +1,860 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. > + * (http://www.friendlyelec.com) > + * > + * Copyright (c) 2025 Tianling Shen <cnsztl@gmail.com> > + */ > + > +/dts-v1/; > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/leds/common.h> > +#include <dt-bindings/pinctrl/rockchip.h> > +#include <dt-bindings/soc/rockchip,vop2.h> > + > +#include "rk3576.dtsi" > + > +/ { > + model = "FriendlyElec NanoPi R76S"; > + compatible = "friendlyarm,nanopi-r76s", "rockchip,rk3576"; > + > + aliases { > + mmc0 = &sdhci; > + mmc1 = &sdmmc; > + mmc2 = &sdio; > + }; > + > + chosen { > + stdout-path = "serial0:1500000n8"; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-names = "default"; > + pinctrl-0 = <&user_but_pin>; > + > + button-reset { > + label = "reset"; > + gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; > + debounce-interval = <50>; > + linux,code = <KEY_RESTART>; > + wakeup-source; > + }; > + }; > + > + gpio-leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&led1_h>, <&led_sys_h>, <&led2_h>; > + > + led-0 { > + color = <LED_COLOR_ID_GREEN>; > + function = LED_FUNCTION_LAN; > + gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; > + }; > + > + led-1 { > + color = <LED_COLOR_ID_RED>; > + function = LED_FUNCTION_POWER; > + gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + }; > + > + led-2 { > + color = <LED_COLOR_ID_GREEN>; > + function = LED_FUNCTION_WAN; > + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; > + }; > + }; > + > + hdmi-con { > + compatible = "hdmi-connector"; > + hdmi-pwr-supply = <&vcc5v_hdmi_tx>; > + type = "a"; > + > + port { > + hdmi_con_in: endpoint { > + remote-endpoint = <&hdmi_out_con>; > + }; > + }; > + }; > + > + sdio_pwrseq: sdio-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + clocks = <&hym8563>; > + clock-names = "ext_clock"; > + pinctrl-names = "default"; > + pinctrl-0 = <&wifi_reg_on_h>; > + post-power-on-delay-ms = <200>; > + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > + }; > + > + vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc3v3_rtc_s5"; > + vin-supply = <&vcc5v0_sys_s5>; > + }; > + > + vcc5v_dcin: regulator-vcc5v-dcin { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "vcc5v_dcin"; > + }; > + > + vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hdmi_tx_on_h>; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "vcc5v_hdmi_tx"; > + vin-supply = <&vcc5v0_sys_s5>; > + }; > + > + vcc5v0_device_s0: regulator-vcc5v0-device-s0 { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "vcc5v0_device_s0"; > + vin-supply = <&vcc5v_dcin>; > + }; > + > + vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "vcc5v0_sys_s5"; > + vin-supply = <&vcc5v_dcin>; > + }; > + > + vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb_otg0_pwren_h>; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "vcc5v0_usb_otg0"; > + vin-supply = <&vcc5v0_sys_s5>; > + }; > + > + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + regulator-name = "vcc_1v1_nldo_s3"; > + vin-supply = <&vcc5v0_sys_s5>; > + }; > + > + vcc_1v8_s0: regulator-vcc-1v8-s0 { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc_1v8_s0"; > + vin-supply = <&vcc_1v8_s3>; > + }; > + > + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <2000000>; > + regulator-max-microvolt = <2000000>; > + regulator-name = "vcc_2v0_pldo_s3"; > + vin-supply = <&vcc5v0_sys_s5>; > + }; > + > + vcc_3v3_s0: regulator-vcc-3v3-s0 { > + compatible = "regulator-fixed"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc_3v3_s0"; > + vin-supply = <&vcc_3v3_s3>; > + }; > +}; > + > +&combphy0_ps { > + status = "okay"; > +}; > + > +&combphy1_psu { > + status = "okay"; > +}; > + > +&cpu_b0 { > + cpu-supply = <&vdd_cpu_big_s0>; > +}; > + > +&cpu_b1 { > + cpu-supply = <&vdd_cpu_big_s0>; > +}; > + > +&cpu_b2 { > + cpu-supply = <&vdd_cpu_big_s0>; > +}; > + > +&cpu_b3 { > + cpu-supply = <&vdd_cpu_big_s0>; > +}; > + > +&cpu_l0 { > + cpu-supply = <&vdd_cpu_lit_s0>; > +}; > + > +&cpu_l1 { > + cpu-supply = <&vdd_cpu_lit_s0>; > +}; > + > +&cpu_l2 { > + cpu-supply = <&vdd_cpu_lit_s0>; > +}; > + > +&cpu_l3 { > + cpu-supply = <&vdd_cpu_lit_s0>; > +}; > + > +&gpu { > + mali-supply = <&vdd_gpu_s0>; > + status = "okay"; > +}; > + > +&hdmi { > + status = "okay"; > +}; > + > +&hdmi_in { > + hdmi_in_vp0: endpoint { > + remote-endpoint = <&vp0_out_hdmi>; > + }; > +}; > + > +&hdmi_out { > + hdmi_out_con: endpoint { > + remote-endpoint = <&hdmi_con_in>; > + }; > +}; > + > +&hdmi_sound { > + status = "okay"; > +}; > + > +&hdptxphy { > + status = "okay"; > +}; > + > +&i2c1 { > + status = "okay"; > + > + pmic@23 { > + compatible = "rockchip,rk806"; > + reg = <0x23>; > + #gpio-cells = <2>; > + gpio-controller; > + interrupt-parent = <&gpio0>; > + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, > + <&rk806_dvs2_null>, <&rk806_dvs3_null>; > + system-power-controller; > + > + vcc1-supply = <&vcc5v0_sys_s5>; > + vcc2-supply = <&vcc5v0_sys_s5>; > + vcc3-supply = <&vcc5v0_sys_s5>; > + vcc4-supply = <&vcc5v0_sys_s5>; > + vcc5-supply = <&vcc5v0_sys_s5>; > + vcc6-supply = <&vcc5v0_sys_s5>; > + vcc7-supply = <&vcc5v0_sys_s5>; > + vcc8-supply = <&vcc5v0_sys_s5>; > + vcc9-supply = <&vcc5v0_sys_s5>; > + vcc10-supply = <&vcc5v0_sys_s5>; > + vcc11-supply = <&vcc_2v0_pldo_s3>; > + vcc12-supply = <&vcc5v0_sys_s5>; > + vcc13-supply = <&vcc_1v1_nldo_s3>; > + vcc14-supply = <&vcc_1v1_nldo_s3>; > + vcca-supply = <&vcc5v0_sys_s5>; > + > + rk806_dvs1_null: dvs1-null-pins { > + pins = "gpio_pwrctrl1"; > + function = "pin_fun0"; > + }; > + > + rk806_dvs1_pwrdn: dvs1-pwrdn-pins { > + pins = "gpio_pwrctrl1"; > + function = "pin_fun2"; > + }; > + > + rk806_dvs1_rst: dvs1-rst-pins { > + pins = "gpio_pwrctrl1"; > + function = "pin_fun3"; > + }; > + > + rk806_dvs1_slp: dvs1-slp-pins { > + pins = "gpio_pwrctrl1"; > + function = "pin_fun1"; > + }; > + > + rk806_dvs2_dvs: dvs2-dvs-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun4"; > + }; > + > + rk806_dvs2_gpio: dvs2-gpio-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun5"; > + }; > + > + rk806_dvs2_null: dvs2-null-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun0"; > + }; > + > + rk806_dvs2_pwrdn: dvs2-pwrdn-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun2"; > + }; > + > + rk806_dvs2_rst: dvs2-rst-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun3"; > + }; > + > + rk806_dvs2_slp: dvs2-slp-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun1"; > + }; > + > + rk806_dvs3_dvs: dvs3-dvs-pins { > + pins = "gpio_pwrctrl3"; > + function = "pin_fun4"; > + }; > + > + rk806_dvs3_gpio: dvs3-gpio-pins { > + pins = "gpio_pwrctrl3"; > + function = "pin_fun5"; > + }; > + > + rk806_dvs3_null: dvs3-null-pins { > + pins = "gpio_pwrctrl3"; > + function = "pin_fun0"; > + }; > + > + rk806_dvs3_pwrdn: dvs3-pwrdn-pins { > + pins = "gpio_pwrctrl3"; > + function = "pin_fun2"; > + }; > + > + rk806_dvs3_rst: dvs3-rst-pins { > + pins = "gpio_pwrctrl3"; > + function = "pin_fun3"; > + }; > + > + rk806_dvs3_slp: dvs3-slp-pins { > + pins = "gpio_pwrctrl3"; > + function = "pin_fun1"; > + }; > + > + regulators { > + vdd_cpu_big_s0: dcdc-reg1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-enable-ramp-delay = <400>; > + regulator-min-microvolt = <550000>; > + regulator-max-microvolt = <950000>; > + regulator-name = "vdd_cpu_big_s0"; > + regulator-ramp-delay = <12500>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_npu_s0: dcdc-reg2 { > + regulator-boot-on; > + regulator-enable-ramp-delay = <400>; > + regulator-min-microvolt = <550000>; > + regulator-max-microvolt = <950000>; > + regulator-name = "vdd_npu_s0"; > + regulator-ramp-delay = <12500>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_cpu_lit_s0: dcdc-reg3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <550000>; > + regulator-max-microvolt = <950000>; > + regulator-name = "vdd_cpu_lit_s0"; > + regulator-ramp-delay = <12500>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + regulator-suspend-microvolt = <750000>; > + }; > + }; > + > + vcc_3v3_s3: dcdc-reg4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc_3v3_s3"; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vdd_gpu_s0: dcdc-reg5 { > + regulator-boot-on; > + regulator-enable-ramp-delay = <400>; > + regulator-min-microvolt = <550000>; > + regulator-max-microvolt = <900000>; > + regulator-name = "vdd_gpu_s0"; > + regulator-ramp-delay = <12500>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + regulator-suspend-microvolt = <850000>; > + }; > + }; > + > + vddq_ddr_s0: dcdc-reg6 { > + regulator-always-on; > + regulator-boot-on; > + regulator-name = "vddq_ddr_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_logic_s0: dcdc-reg7 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <550000>; > + regulator-max-microvolt = <800000>; > + regulator-name = "vdd_logic_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_1v8_s3: dcdc-reg8 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc_1v8_s3"; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vdd2_ddr_s3: dcdc-reg9 { > + regulator-always-on; > + regulator-boot-on; > + regulator-name = "vdd2_ddr_s3"; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vdd_ddr_s0: dcdc-reg10 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <550000>; > + regulator-max-microvolt = <1200000>; > + regulator-name = "vdd_ddr_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca_1v8_s0: pldo-reg1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcca_1v8_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca1v8_pldo2_s0: pldo-reg2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcca1v8_pldo2_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda_1v2_s0: pldo-reg3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-name = "vdda_1v2_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca_3v3_s0: pldo-reg4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcca_3v3_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vccio_sd_s0: pldo-reg5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vccio_sd_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca1v8_pldo6_s3: pldo-reg6 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcca1v8_pldo6_s3"; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vdd_0v75_s3: nldo-reg1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <750000>; > + regulator-name = "vdd_0v75_s3"; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <750000>; > + }; > + }; > + > + vdda_ddr_pll_s0: nldo-reg2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <850000>; > + regulator-max-microvolt = <850000>; > + regulator-name = "vdda_ddr_pll_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda0v75_hdmi_s0: nldo-reg3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <837500>; > + regulator-max-microvolt = <837500>; > + regulator-name = "vdda0v75_hdmi_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda_0v85_s0: nldo-reg4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <850000>; > + regulator-max-microvolt = <850000>; > + regulator-name = "vdda_0v85_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda_0v75_s0: nldo-reg5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <750000>; > + regulator-name = "vdda_0v75_s0"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + }; > +}; > + > +&i2c2 { > + status = "okay"; > + > + hym8563: rtc@51 { > + compatible = "haoyu,hym8563"; > + reg = <0x51>; > + #clock-cells = <0>; > + clock-output-names = "hym8563"; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&rtc_int_l>; > + wakeup-source; > + }; > +}; > + > +&pcie0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie0_perstn>; > + reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; > + vpcie3v3-supply = <&vcc_3v3_s3>; > + status = "okay"; > +}; > + > +&pcie1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie1_perstn>; > + reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; > + vpcie3v3-supply = <&vcc_3v3_s3>; > + status = "okay"; > +}; > + > +&pinctrl { > + bt { > + bt_reg_on_h: bt-reg-on-h { > + rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + > + bt_wake_host_h: bt-wake-host-h { > + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + > + host_wake_bt_h: host-wake-bt-h { > + rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + gpio-keys { > + user_but_pin: user-but-pin { > + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + gpio-leds { > + led_sys_h: led-sys-h { > + rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + led1_h: led1-h { > + rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + led2_h: led2-h { > + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + hdmi { > + hdmi_tx_on_h: hdmi-tx-on-h { > + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + hym8563 { > + rtc_int_l: rtc-int-l { > + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + pcie { > + pcie0_perstn: pcie0-perstn { > + rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + > + pcie1_perstn: pcie1-perstn { > + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + usb { > + usb_otg0_pwren_h: usb-otg0-pwren-h { > + rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + wifi { > + wifi_wake_host_h: wifi-wake-host-h { > + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + > + wifi_reg_on_h: wifi-reg-on-h { > + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&sai6 { > + status = "okay"; > +}; > + > +&sdmmc { > + bus-width = <4>; > + cap-mmc-highspeed; > + cap-sd-highspeed; > + disable-wp; > + no-mmc; > + no-sdio; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc_3v3_s3>; > + vqmmc-supply = <&vccio_sd_s0>; > + status = "okay"; > +}; > + > +&sdio { > + #address-cells = <1>; > + #size-cells = <0>; > + bus-width = <4>; > + cap-sd-highspeed; > + cap-sdio-irq; > + disable-wp; > + keep-power-in-suspend; > + mmc-pwrseq = <&sdio_pwrseq>; > + no-mmc; > + no-sd; > + non-removable; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc_3v3_s3>; > + vqmmc-supply = <&vcc_1v8_s3>; > + wakeup-source; > + status = "okay"; > + > + rtl8822cs: wifi@1 { > + reg = <1>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "host-wake"; > + pinctrl-names = "default"; > + pinctrl-0 = <&wifi_wake_host_h>; > + }; > +}; > + > +&sdhci { > + bus-width = <8>; > + cap-mmc-highspeed; > + full-pwr-cycle-in-suspend; > + mmc-hs400-1_8v; > + mmc-hs400-enhanced-strobe; > + no-sdio; > + no-sd; > + non-removable; > + status = "okay"; > +}; > + > +&saradc { > + vref-supply = <&vcca_1v8_s0>; > + status = "okay"; > +}; > + > +&u2phy0 { > + status = "okay"; > +}; > + > +&u2phy0_otg { > + phy-supply = <&vcc5v0_usb_otg0>; > + status = "okay"; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&uart5 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>; > + uart-has-rtscts; > + status = "okay"; > + > + bluetooth { > + compatible = "realtek,rtl8822cs-bt"; > + enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; > + device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; > + host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&bt_wake_host_h &host_wake_bt_h &bt_reg_on_h>; > + }; > +}; > + > +&usbdp_phy { > + status = "okay"; > +}; > + > +&usb_drd0_dwc3 { > + dr_mode = "host"; > + extcon = <&u2phy0>; > + status = "okay"; > +}; > + > +&vop { > + status = "okay"; > +}; > + > +&vop_mmu { > + status = "okay"; > +}; > + > +&vp0 { > + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { > + reg = <ROCKCHIP_VOP2_EP_HDMI0>; > + remote-endpoint = <&hdmi_in_vp0>; > + }; > +}; ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi R76S 2026-01-08 14:35 [PATCH 0/2] board: rockchip: Add FriendlyElec NanoPi R76S Jonas Karlman 2026-01-08 14:35 ` [PATCH 1/2] arm64: dts: rockchip: Add devicetree for the " Jonas Karlman @ 2026-01-08 14:35 ` Jonas Karlman 2026-01-14 16:52 ` Quentin Schulz 1 sibling, 1 reply; 6+ messages in thread From: Jonas Karlman @ 2026-01-08 14:35 UTC (permalink / raw) To: Kever Yang, Simon Glass, Philipp Tomsich, Jonas Karlman, Tom Rini Cc: Tianling Shen, u-boot The NanoPi R76S (as "R76S") is an open-sourced mini IoT gateway device with two 2.5G, designed and developed by FriendlyElec. Features tested on a NanoPi R76S 2411: - SD-card boot - eMMC boot - LEDs and button - PCIe/Ethernet - USB host Signed-off-by: Jonas Karlman <jonas@kwiboo.se> --- arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi | 3 ++ arch/arm/mach-rockchip/rk3576/MAINTAINERS | 6 +++ configs/nanopi-r76s-rk3576_defconfig | 60 +++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + 4 files changed, 70 insertions(+) create mode 100644 arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi create mode 100644 configs/nanopi-r76s-rk3576_defconfig diff --git a/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi new file mode 100644 index 000000000000..632fabb6af56 --- /dev/null +++ b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3576-u-boot.dtsi" diff --git a/arch/arm/mach-rockchip/rk3576/MAINTAINERS b/arch/arm/mach-rockchip/rk3576/MAINTAINERS index 393edd3984ce..79cf9e97f70b 100644 --- a/arch/arm/mach-rockchip/rk3576/MAINTAINERS +++ b/arch/arm/mach-rockchip/rk3576/MAINTAINERS @@ -10,6 +10,12 @@ S: Maintained F: arch/arm/dts/rk3576-nanopi-m5* F: configs/nanopi-m5-rk3576_defconfig +NANOPI-R76S-RK3576 +M: Jonas Karlman <jonas@kwiboo.se> +S: Maintained +F: arch/arm/dts/rk3576-nanopi-r76s* +F: configs/nanopi-r76s-rk3576_defconfig + OMNI3576-RK3576 M: Jonas Karlman <jonas@kwiboo.se> S: Maintained diff --git a/configs/nanopi-r76s-rk3576_defconfig b/configs/nanopi-r76s-rk3576_defconfig new file mode 100644 index 000000000000..af149dc4ba56 --- /dev/null +++ b/configs/nanopi-r76s-rk3576_defconfig @@ -0,0 +1,60 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3576-nanopi-r76s" +CONFIG_ROCKCHIP_RK3576=y +CONFIG_SYS_LOAD_ADDR=0x40c00800 +CONFIG_DEBUG_UART_BASE=0x2AD40000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-nanopi-r76s.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMINFO_MAP=y +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MISC=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_RNG=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 7a8532b49fc5..c1683bfe4212 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -140,6 +140,7 @@ List of mainline supported Rockchip boards: - ArmSoM Sige5 (sige5-rk3576) - Firefly ROC-RK3576-PC (roc-pc-rk3576) - FriendlyElec NanoPi M5 (nanopi-m5-rk3576) + - FriendlyElec NanoPi R76S (nanopi-r76s-rk3576) - Generic RK3576 (generic-rk3576) - Luckfox Omni3576 (omni3576-rk3576) - Radxa ROCK 4D (rock-4d-rk3576) -- 2.52.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi R76S 2026-01-08 14:35 ` [PATCH 2/2] board: rockchip: Add " Jonas Karlman @ 2026-01-14 16:52 ` Quentin Schulz 2026-03-09 23:49 ` Jonas Karlman 0 siblings, 1 reply; 6+ messages in thread From: Quentin Schulz @ 2026-01-14 16:52 UTC (permalink / raw) To: Jonas Karlman, Kever Yang, Simon Glass, Philipp Tomsich, Tom Rini Cc: Tianling Shen, u-boot Hi Jonas, On 1/8/26 3:35 PM, Jonas Karlman wrote: > The NanoPi R76S (as "R76S") is an open-sourced mini IoT gateway > device with two 2.5G, designed and developed by FriendlyElec. > > Features tested on a NanoPi R76S 2411: > - SD-card boot > - eMMC boot > - LEDs and button > - PCIe/Ethernet > - USB host > > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> > --- > arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi | 3 ++ > arch/arm/mach-rockchip/rk3576/MAINTAINERS | 6 +++ > configs/nanopi-r76s-rk3576_defconfig | 60 +++++++++++++++++++++ > doc/board/rockchip/rockchip.rst | 1 + > 4 files changed, 70 insertions(+) > create mode 100644 arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi > create mode 100644 configs/nanopi-r76s-rk3576_defconfig > > diff --git a/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi > new file mode 100644 > index 000000000000..632fabb6af56 > --- /dev/null > +++ b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi > @@ -0,0 +1,3 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > + > +#include "rk3576-u-boot.dtsi" I don't think that should be necessary? U-Boot should fallback to rj3576-u-boot.dtsi if there's no rk3576-nanopi-r76s-u-boot.dtsi, because SYS_SOC is rk3576 in arch/arm/mach-rockchip/rk3576/Kconfig and the wildcard list in u_boot_dtsi_options in scripts/Makefile.lib. More comments below but they are definitely not blocker for merging this. > diff --git a/arch/arm/mach-rockchip/rk3576/MAINTAINERS b/arch/arm/mach-rockchip/rk3576/MAINTAINERS > index 393edd3984ce..79cf9e97f70b 100644 > --- a/arch/arm/mach-rockchip/rk3576/MAINTAINERS > +++ b/arch/arm/mach-rockchip/rk3576/MAINTAINERS > @@ -10,6 +10,12 @@ S: Maintained > F: arch/arm/dts/rk3576-nanopi-m5* > F: configs/nanopi-m5-rk3576_defconfig > > +NANOPI-R76S-RK3576 > +M: Jonas Karlman <jonas@kwiboo.se> > +S: Maintained > +F: arch/arm/dts/rk3576-nanopi-r76s* > +F: configs/nanopi-r76s-rk3576_defconfig > + > OMNI3576-RK3576 > M: Jonas Karlman <jonas@kwiboo.se> > S: Maintained > diff --git a/configs/nanopi-r76s-rk3576_defconfig b/configs/nanopi-r76s-rk3576_defconfig > new file mode 100644 > index 000000000000..af149dc4ba56 > --- /dev/null > +++ b/configs/nanopi-r76s-rk3576_defconfig > @@ -0,0 +1,60 @@ > +CONFIG_ARM=y > +CONFIG_SKIP_LOWLEVEL_INIT=y > +CONFIG_SYS_HAS_NONCACHED_MEMORY=y > +CONFIG_COUNTER_FREQUENCY=24000000 > +CONFIG_ARCH_ROCKCHIP=y > +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3576-nanopi-r76s" > +CONFIG_ROCKCHIP_RK3576=y > +CONFIG_SYS_LOAD_ADDR=0x40c00800 Should we think about adding a default value for various Rockchip SoCs in root Kconfig for SYS_LOAD_ADDR? > +CONFIG_DEBUG_UART_BASE=0x2AD40000 > +CONFIG_DEBUG_UART_CLOCK=24000000 Same here. I'm assuming there's a reference design most people are basing their HW on, so having a default DEBUG_UART_BASE common for the SoC makes sense (and we could even then have a comment specifying which UART controller that is). As for the clock speed, I'm wondering if we ever had something different than that. And also wondering if it's related (should be in sync?) with &uart0/clock-frequency? > +CONFIG_PCI=y > +CONFIG_DEBUG_UART=y > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-nanopi-r76s.dtb" > +# CONFIG_DISPLAY_CPUINFO is not set Why not :)? > +CONFIG_SPL_MAX_SIZE=0x40000 > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > +CONFIG_CMD_MEMINFO=y > +CONFIG_CMD_MEMINFO_MAP=y > +CONFIG_CMD_ADC=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_GPT=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_MISC=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_PCI=y > +CONFIG_CMD_USB=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_RNG=y > +CONFIG_CMD_REGULATOR=y > +# CONFIG_SPL_DOS_PARTITION is not set > +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" > +CONFIG_BUTTON=y > +CONFIG_BUTTON_GPIO=y > +CONFIG_ROCKCHIP_GPIO=y > +CONFIG_SYS_I2C_ROCKCHIP=y > +CONFIG_LED=y > +CONFIG_LED_GPIO=y > +CONFIG_SUPPORT_EMMC_RPMB=y > +CONFIG_MMC_DW=y > +CONFIG_MMC_DW_ROCKCHIP=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_SDMA=y > +CONFIG_MMC_SDHCI_ROCKCHIP=y > +CONFIG_RTL8169=y > +CONFIG_PCIE_DW_ROCKCHIP=y > +CONFIG_PHY_ROCKCHIP_INNO_USB2=y > +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > +CONFIG_PHY_ROCKCHIP_USBDP=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_RK8XX=y > +CONFIG_REGULATOR_RK8XX=y > +CONFIG_BAUDRATE=1500000 > +CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_SYS_NS16550_MEM32=y The two above also are always the same on Rockchip no? By default, the expected baudrate is probably 1500000 on Rockchip, wondering if we shouldn't make that the default either? > +CONFIG_SYSRESET_PSCI=y > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_DWC3=y > +CONFIG_USB_DWC3_GENERIC=y > +CONFIG_ERRNO_STR=y I'm wondering whether we should think about setting WERROR on by default for new boards? What do you think? Cheers, Quentin ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] board: rockchip: Add FriendlyElec NanoPi R76S 2026-01-14 16:52 ` Quentin Schulz @ 2026-03-09 23:49 ` Jonas Karlman 0 siblings, 0 replies; 6+ messages in thread From: Jonas Karlman @ 2026-03-09 23:49 UTC (permalink / raw) To: Quentin Schulz Cc: Kever Yang, Simon Glass, Philipp Tomsich, Tom Rini, Tianling Shen, u-boot Hi Quentin, On 1/14/2026 5:52 PM, Quentin Schulz wrote: > Hi Jonas, > > On 1/8/26 3:35 PM, Jonas Karlman wrote: >> The NanoPi R76S (as "R76S") is an open-sourced mini IoT gateway >> device with two 2.5G, designed and developed by FriendlyElec. >> >> Features tested on a NanoPi R76S 2411: >> - SD-card boot >> - eMMC boot >> - LEDs and button >> - PCIe/Ethernet >> - USB host >> >> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> >> --- >> arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi | 3 ++ >> arch/arm/mach-rockchip/rk3576/MAINTAINERS | 6 +++ >> configs/nanopi-r76s-rk3576_defconfig | 60 +++++++++++++++++++++ >> doc/board/rockchip/rockchip.rst | 1 + >> 4 files changed, 70 insertions(+) >> create mode 100644 arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi >> create mode 100644 configs/nanopi-r76s-rk3576_defconfig >> >> diff --git a/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi >> new file mode 100644 >> index 000000000000..632fabb6af56 >> --- /dev/null >> +++ b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi >> @@ -0,0 +1,3 @@ >> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >> + >> +#include "rk3576-u-boot.dtsi" > > I don't think that should be necessary? You are correct, I have removed this file in v2. > U-Boot should fallback to rj3576-u-boot.dtsi if there's no > rk3576-nanopi-r76s-u-boot.dtsi, because SYS_SOC is rk3576 in > arch/arm/mach-rockchip/rk3576/Kconfig and the wildcard list in > u_boot_dtsi_options in scripts/Makefile.lib. > > More comments below but they are definitely not blocker for merging this. > >> diff --git a/arch/arm/mach-rockchip/rk3576/MAINTAINERS b/arch/arm/mach-rockchip/rk3576/MAINTAINERS >> index 393edd3984ce..79cf9e97f70b 100644 >> --- a/arch/arm/mach-rockchip/rk3576/MAINTAINERS >> +++ b/arch/arm/mach-rockchip/rk3576/MAINTAINERS >> @@ -10,6 +10,12 @@ S: Maintained >> F: arch/arm/dts/rk3576-nanopi-m5* >> F: configs/nanopi-m5-rk3576_defconfig >> >> +NANOPI-R76S-RK3576 >> +M: Jonas Karlman <jonas@kwiboo.se> >> +S: Maintained >> +F: arch/arm/dts/rk3576-nanopi-r76s* >> +F: configs/nanopi-r76s-rk3576_defconfig >> + >> OMNI3576-RK3576 >> M: Jonas Karlman <jonas@kwiboo.se> >> S: Maintained >> diff --git a/configs/nanopi-r76s-rk3576_defconfig b/configs/nanopi-r76s-rk3576_defconfig >> new file mode 100644 >> index 000000000000..af149dc4ba56 >> --- /dev/null >> +++ b/configs/nanopi-r76s-rk3576_defconfig >> @@ -0,0 +1,60 @@ >> +CONFIG_ARM=y >> +CONFIG_SKIP_LOWLEVEL_INIT=y >> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y >> +CONFIG_COUNTER_FREQUENCY=24000000 >> +CONFIG_ARCH_ROCKCHIP=y >> +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3576-nanopi-r76s" >> +CONFIG_ROCKCHIP_RK3576=y >> +CONFIG_SYS_LOAD_ADDR=0x40c00800 > > Should we think about adding a default value for various Rockchip SoCs > in root Kconfig for SYS_LOAD_ADDR? Possible, I do not even know if this is a fully safe default for SYS_LOAD_ADDR or what will really use this addr, but it matches what is used by many other Rockchip boards. > >> +CONFIG_DEBUG_UART_BASE=0x2AD40000 >> +CONFIG_DEBUG_UART_CLOCK=24000000 > > Same here. I'm assuming there's a reference design most people are > basing their HW on, so having a default DEBUG_UART_BASE common for the > SoC makes sense (and we could even then have a comment specifying which > UART controller that is). As for the clock speed, I'm wondering if we > ever had something different than that. And also wondering if it's > related (should be in sync?) with &uart0/clock-frequency? Agree, there are some defaults that we could and probably should set on SoC level. And yes, there are multiple possible duplicated 24 MHz ref clocks in use for UART, e.g.: DEBUG_UART_CLOCK, &uart0/clock-frequency and CFG_SYS_NS16550_CLK. To my knowledge all Rockchip SoCs use a 24 MHz ref clock. > >> +CONFIG_PCI=y >> +CONFIG_DEBUG_UART=y >> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-nanopi-r76s.dtb" >> +# CONFIG_DISPLAY_CPUINFO is not set > > Why not :)? It requires asm/arch-rockchip/cru.h to have a soc specific #ifdef to make it work to print out and set a reset reason. Something I rather see being reworked to use sysresed uclass or similar than enable for "new" SoCs. > >> +CONFIG_SPL_MAX_SIZE=0x40000 >> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set >> +CONFIG_CMD_MEMINFO=y >> +CONFIG_CMD_MEMINFO_MAP=y >> +CONFIG_CMD_ADC=y >> +CONFIG_CMD_GPIO=y >> +CONFIG_CMD_GPT=y >> +CONFIG_CMD_I2C=y >> +CONFIG_CMD_MISC=y >> +CONFIG_CMD_MMC=y >> +CONFIG_CMD_PCI=y >> +CONFIG_CMD_USB=y >> +# CONFIG_CMD_SETEXPR is not set >> +CONFIG_CMD_RNG=y >> +CONFIG_CMD_REGULATOR=y >> +# CONFIG_SPL_DOS_PARTITION is not set >> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" >> +CONFIG_BUTTON=y >> +CONFIG_BUTTON_GPIO=y >> +CONFIG_ROCKCHIP_GPIO=y >> +CONFIG_SYS_I2C_ROCKCHIP=y >> +CONFIG_LED=y >> +CONFIG_LED_GPIO=y >> +CONFIG_SUPPORT_EMMC_RPMB=y >> +CONFIG_MMC_DW=y >> +CONFIG_MMC_DW_ROCKCHIP=y >> +CONFIG_MMC_SDHCI=y >> +CONFIG_MMC_SDHCI_SDMA=y >> +CONFIG_MMC_SDHCI_ROCKCHIP=y >> +CONFIG_RTL8169=y >> +CONFIG_PCIE_DW_ROCKCHIP=y >> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y >> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y >> +CONFIG_PHY_ROCKCHIP_USBDP=y >> +CONFIG_DM_PMIC=y >> +CONFIG_PMIC_RK8XX=y >> +CONFIG_REGULATOR_RK8XX=y >> +CONFIG_BAUDRATE=1500000 >> +CONFIG_DEBUG_UART_SHIFT=2 >> +CONFIG_SYS_NS16550_MEM32=y > > The two above also are always the same on Rockchip no? Yes, to my knowledge most reg access on RK is 32-bit based and should use readl/writel instead of readb/writeb. > > By default, the expected baudrate is probably 1500000 on Rockchip, > wondering if we shouldn't make that the default either? Agree, there are only a few SoCs/boards that > >> +CONFIG_SYSRESET_PSCI=y >> +CONFIG_USB=y >> +CONFIG_USB_XHCI_HCD=y >> +CONFIG_USB_DWC3=y >> +CONFIG_USB_DWC3_GENERIC=y >> +CONFIG_ERRNO_STR=y > > I'm wondering whether we should think about setting WERROR on by default > for new boards? What do you think? Sounds like a good idea but no other board in-tree seem to enable it. My local build script always injected -Werror using CFLAGS, but maybe better to enable CONFIG_WERROR. Regards, Jonas > > Cheers, > Quentin ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2026-03-09 23:49 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-01-08 14:35 [PATCH 0/2] board: rockchip: Add FriendlyElec NanoPi R76S Jonas Karlman 2026-01-08 14:35 ` [PATCH 1/2] arm64: dts: rockchip: Add devicetree for the " Jonas Karlman 2026-03-09 14:35 ` Kever Yang 2026-01-08 14:35 ` [PATCH 2/2] board: rockchip: Add " Jonas Karlman 2026-01-14 16:52 ` Quentin Schulz 2026-03-09 23:49 ` Jonas Karlman
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