From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
To: u-boot@lists.denx.de
Subject: [rockchip] broken SPI on RockPro64 and other RK3399 targets
Date: Thu, 5 Nov 2020 19:49:02 +0300 [thread overview]
Message-ID: <d695fa06-fa41-43f6-91ca-d7e8b7250b5f@gmail.com> (raw)
In-Reply-To: <31af4240-d2ed-5500-ffc4-ddd353457ac3@juszkiewicz.com.pl>
On 05/11/2020 18:55, Marcin Juszkiewicz wrote:
> I wanted to update U-Boot on my RockPro64 board from some random build
> of 2020.07-rc with out of tree patches to official one. Built, flashed
> and then got this:
>
> Loading Environment from SPI Flash... Invalid bus 0 (err=-19)
> *** Warning - spi_flash_probe_bus_cs() failed, using default environment
>
> According to Peter Robinson it happens also on other RK3399 boards.
FYI: SPI flash commands work for me on rk3399-gru-kevin after just
adding the JEDEC ID things for its chip (with CONFIG_SF_DEFAULT_BUS=1)
but I haven't tried loading environment from it yet (doing weird
out-of-tree things to run U-Boot anyway).
> As I had a bit of time I started bisecting and found reason:
>
> 16:43 (7s) hrw at puchatek:u-boot$ git bisect good
> c4cea2bbf995764f325a907061c22ecd6768cf7b is the first bad commit
> commit c4cea2bbf995764f325a907061c22ecd6768cf7b
> Author: Simon Glass <sjg@chromium.org>
> Date: Sun Jul 19 13:55:58 2020 -0600
>
> rockchip: Enable building a SPI ROM image on bob
>
> Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot
> produces a ROM for bob.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
>
> arch/arm/dts/rk3399-gru-u-boot.dtsi | 4 ++++
> arch/arm/dts/rk3399-gru.dtsi | 2 +-
> arch/arm/dts/rk3399-u-boot.dtsi | 27 +++++++++++++++++++++++++++
> arch/arm/mach-rockchip/rk3399/Kconfig | 2 ++
> 4 files changed, 34 insertions(+), 1 deletion(-)
>
> Then I checked out HEAD of master branch, reverted that patch and SPI
> flash got detected properly.
>
> Not looked yet on how it should be fixed.
I suspect this change in that commit (rk3399-u-boot.dtsi):
> / {
> aliases {
> mmc0 = &sdhci;
> mmc1 = &sdmmc;
> pci0 = &pcie0;
> + spi1 = &spi1;
> };
Can you test adding spi0 = &spi0; above that in the list?
next prev parent reply other threads:[~2020-11-05 16:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 15:55 [rockchip] broken SPI on RockPro64 and other RK3399 targets Marcin Juszkiewicz
2020-11-05 16:49 ` Alper Nebi Yasak [this message]
2020-11-05 17:04 ` Marcin Juszkiewicz
2020-11-05 19:50 ` Alper Nebi Yasak
2020-11-10 19:45 ` Simon South
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