[PATCH v2 09/10] riscv: Add device tree bindings for SPI

Sean Anderson
2020-08-07T14:43:16Z

This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix
Bit.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---
This patch was previously part of
https://patchwork.ozlabs.org/project/uboot/list/?series=161576

Changes in v2:
- Remove broken-wp property (implicit due to no wp gpio)
- Remove ctrl0 field offsets from device tree
- Switch to new compatible strings
- Switch to new pinmux binding style

arch/riscv/dts/k210-maix-bit.dts | 46 +++++++++++++++++++++++++++++++-
arch/riscv/dts/k210.dtsi | 2 ++
2 files changed, 47 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
index e840e04ada..73892c6450 100644
--- a/arch/riscv/dts/k210-maix-bit.dts
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -141,7 +141,7 @@
pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
<K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
<K210_FPIOA(28, K210_PCF_SPI1_D0)>,
- <K210_FPIOA(29, K210_PCF_GPIOHS13)>;
+ <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
};
};

@@ -149,3 +149,47 @@
pinctrl-0 = <&fpioa_dvp>;
pinctrl-names = "default";
};
+
+&spi0 {
+ pinctrl-0 = <&fpioa_spi0>;
+ pinctrl-names = "default";
+ num-cs = <1>;
+ cs-gpios = <&gpio0 20 0>;
+
+ panel at 0 {
+ compatible = "sitronix,st7789v";
+ reg = <0>;
+ reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ dc-gpios = <&gpio0 22 0>;
+ spi-max-frequency = <15000000>;
+ status = "disabled";
+ };
+};
+
+&spi1 {
+ pinctrl-0 = <&fpioa_spi1>;
+ pinctrl-names = "default";
+ num-cs = <1>;
+ cs-gpios = <&gpio0 13 0>;
+ status = "okay";
+
+ slot at 0 {
+ compatible = "mmc-spi-slot";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ voltage-ranges = <3300 3300>;
+ broken-cd;
+ };
+};
+
+&spi3 {
+ status = "okay";
+
+ spi-flash at 0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ broken-flash-reset;
+ };
+};
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 429891d651..fe47ee7aaf 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -495,6 +495,8 @@
interrupts = <24>;
clocks = <&sysclk K210_CLK_DVP>;
resets = <&sysrst K210_RST_DVP>;
+ kendryte,sysctl = <&sysctl>;
+ kendryte,misc-offset = <K210_SYSCTL_MISC>;
status = "disabled";
};

--
2.28.0