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From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To: Xiang W <merlew4n6@gmail.com>
Cc: Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
	Sughosh Ganu <sughosh.ganu@linaro.org>,
	Anup Patel <apatel@ventanamicro.com>,
	Kautuk Consul <kconsul@ventanamicro.com>,
	Chanho Park <chanho61.park@samsung.com>,
	u-boot@lists.denx.de
Subject: Re: [RFC v2 1/2] riscv: allow resume after exception
Date: Tue, 31 Oct 2023 14:09:06 +0200	[thread overview]
Message-ID: <de0fc9e4-00a2-4069-8017-151d2d348311@canonical.com> (raw)
In-Reply-To: <CAJ8bkyx5=CBLkGGDkeWGevJNwffkU7sAady=5q58a+FFErO9jg@mail.gmail.com>

On 10/31/23 09:53, Xiang W wrote:
> setjmp can be called in set_resume.

Unfortunately this is not possible. A longjmp buffer only stores 
register values and not the stack content.

Let's assume that setjmp() is moved into set_resume():

Let a function call set_resume(). The caller's address will be on the 
stack. Once the set_resume returns and the caller invokes another 
function the original stack content will be overwritten. When an 
exception occurs the longjmp will reenter set_resume() with the original 
stack pointer value pointing to a stack that does not match the original 
call to set_resume and set_resume will return to a random address.

Best regards

Heinrich

> 
> Regards,
> Xiang W
> 
> Heinrich Schuchardt <heinrich.schuchardt@canonical.com> 于2023年10月29日周日 16:56写道:
>>
>> If CSRs like seed are readable by S-mode, may not be determinable by
>> S-mode. For safe driver probing allow to resume via a longjmp after an
>> exception.
>>
>> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
>> ---
>> v2:
>>          new patch
>> ---
>>   arch/riscv/lib/interrupts.c | 13 +++++++++++++
>>   include/interrupt.h         | 22 ++++++++++++++++++++++
>>   2 files changed, 35 insertions(+)
>>   create mode 100644 include/interrupt.h
>>
>> diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
>> index 02dbcfd423..a26ccc721f 100644
>> --- a/arch/riscv/lib/interrupts.c
>> +++ b/arch/riscv/lib/interrupts.c
>> @@ -12,6 +12,7 @@
>>   #include <linux/compat.h>
>>   #include <efi_loader.h>
>>   #include <hang.h>
>> +#include <interrupt.h>
>>   #include <irq_func.h>
>>   #include <asm/global_data.h>
>>   #include <asm/ptrace.h>
>> @@ -21,6 +22,13 @@
>>
>>   DECLARE_GLOBAL_DATA_PTR;
>>
>> +static struct resume_data *resume;
>> +
>> +void set_resume(struct resume_data *data)
>> +{
>> +       resume = data;
>> +}
>> +
>>   static void show_efi_loaded_images(uintptr_t epc)
>>   {
>>          efi_print_image_infos((void *)epc);
>> @@ -105,6 +113,11 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs)
>>                  "Store/AMO page fault",
>>          };
>>
>> +       if (resume) {
>> +               resume->code = code;
>> +               longjmp(resume->jump, 1);
>> +       }
>> +
>>          if (code < ARRAY_SIZE(exception_code))
>>                  printf("Unhandled exception: %s\n", exception_code[code]);
>>          else
>> diff --git a/include/interrupt.h b/include/interrupt.h
>> new file mode 100644
>> index 0000000000..1baa60bcf2
>> --- /dev/null
>> +++ b/include/interrupt.h
>> @@ -0,0 +1,22 @@
>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>> +
>> +#include <asm/setjmp.h>
>> +
>> +/**
>> + * struct resume_data - data for resume after interrupt
>> + */
>> +struct resume_data {
>> +       /** @jump: longjmp buffer */
>> +       jmp_buf jump;
>> +       /** @code: exception code */
>> +       ulong code;
>> +};
>> +
>> +/**
>> + * set_resume() - set longjmp buffer for resuming after interrupt
>> + *
>> + * When resuming the exception code will be returned in @data->code.
>> + *
>> + * @data:      pointer to structure with longjmp address
>> + */
>> +void set_resume(struct resume_data *data);
>> --
>> 2.40.1
>>


  reply	other threads:[~2023-10-31 12:09 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-29  8:45 [RFC v2 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension Heinrich Schuchardt
2023-10-29  8:45 ` [RFC v2 1/2] riscv: allow resume after exception Heinrich Schuchardt
2023-10-30  8:24   ` Leo Liang
2023-10-31  7:53   ` Xiang W
2023-10-31 12:09     ` Heinrich Schuchardt [this message]
2023-10-31 15:19       ` Xiang W
2023-10-29  8:45 ` [RFC v2 2/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension Heinrich Schuchardt
2023-10-30  8:25   ` Leo Liang
2023-10-31  6:16   ` merle w
2023-10-31  6:38     ` Heinrich Schuchardt
2023-10-31  6:43     ` Leo Liang
2023-10-31  7:55       ` Xiang W

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