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Thu, 16 Nov 2023 05:29:35 -0800 (PST) Received: from ThinkPad-T490 ([2401:4900:57e3:f37f:7382:f75f:c0ae:4df7]) by smtp.gmail.com with ESMTPSA id y3-20020aa79423000000b006c4d371beeasm4466890pfo.217.2023.11.16.05.29.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Nov 2023 05:29:34 -0800 (PST) Message-ID: Subject: Re: [PATCH v2] drivers: pcie_xilinx: Fix "reg" not found error From: mchitale@ventanamicro.com To: Michal Simek , Bo Gan , Puhan Zhou , Eugen Hristev , Heinrich Schuchardt , Jonas Karlman , Valentin Caron , Shengyu Qu Cc: u-boot@lists.denx.de, Simon Glass , Tom Rini Date: Thu, 16 Nov 2023 18:59:27 +0530 In-Reply-To: References: <20231111173604.93103-1-mchitale@ventanamicro.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.36.5-0ubuntu1 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Mon, 2023-11-13 at 09:10 +0100, Michal Simek wrote: > > On 11/11/23 18:36, Mayuresh Chitale wrote: > > Fix the driver to use the dev_read_addr_size API to fetch the reg > > property from the DT. > > > > Signed-off-by: Mayuresh Chitale > > --- > > Changes in v2: > > ==== > > - Remove global_data.h from include > > - Use devm_ioremap instead of map_phsymem > > > > drivers/pci/pcie_xilinx.c | 26 +++++++++----------------- > > 1 file changed, 9 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c > > index 53fd121e90..c1f5bbbb1b 100644 > > --- a/drivers/pci/pcie_xilinx.c > > +++ b/drivers/pci/pcie_xilinx.c > > @@ -8,11 +8,9 @@ > > #include > > #include > > #include > > -#include > > #include > > #include > > - > > -#include > > +#include > > > > /** > > * struct xilinx_pcie - Xilinx PCIe controller state > > @@ -140,20 +138,14 @@ static int pcie_xilinx_write_config(struct > > udevice *bus, pci_dev_t bdf, > > static int pcie_xilinx_of_to_plat(struct udevice *dev) > > { > > struct xilinx_pcie *pcie = dev_get_priv(dev); > > - struct fdt_resource reg_res; > > - DECLARE_GLOBAL_DATA_PTR; > > - int err; > > - > > - err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg", > > - 0, ®_res); > > - if (err < 0) { > > - pr_err("\"reg\" resource not found\n"); > > - return err; > > - } > > - > > - pcie->cfg_base = map_physmem(reg_res.start, > > - fdt_resource_size(®_res), > > - MAP_NOCACHE); > > + fdt_addr_t addr; > > + fdt_size_t size; > > + > > + addr = dev_read_addr_size(dev, &size); > > + if (addr == FDT_ADDR_T_NONE) > > + return -EINVAL; > > + > > + pcie->cfg_base = devm_ioremap(dev, addr, size); > > this can also fail. > > Just put there. > if (IS_ERR(pcie->cfg_base)) > return PTR_ERR(pcie->cfg_base); Ok. > > M