[PATCH 2/2] ARM: at91: remove default values for PMC_PLL_ACR

Manikandan Muralidharan
2025-09-23T09:58:54Z

Remove default values for PMC PLL Analog Control Register(ACR) as the
values are specific for each SoC and PLL, so load them from PLL
characteristics structure

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
drivers/clk/at91/clk-sam9x60-pll.c | 7 ++-----
include/linux/clk/at91_pmc.h | 2 --
2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c
index 65be2775ac3..66f01472739 100644
--- a/drivers/clk/at91/clk-sam9x60-pll.c
+++ b/drivers/clk/at91/clk-sam9x60-pll.c
@@ -183,11 +183,8 @@ static int sam9x60_frac_pll_enable(struct clk *clk)
AT91_PMC_PLL_UPDT_ID_MSK,
AT91_PMC_PLL_UPDT_STUPTIM(0x3f) | pll->id);

- /* Recommended value for AT91_PMC_PLL_ACR */
- if (pll->characteristics->upll)
- val = AT91_PMC_PLL_ACR_DEFAULT_UPLL;
- else
- val = AT91_PMC_PLL_ACR_DEFAULT_PLLA;
+ /* Load recommended value for PMC_PLL_ACR */
+ val = pll->characteristics->acr;
pmc_write(base, AT91_PMC_PLL_ACR, val);

if (pll->characteristics->upll) {
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index ee39e72e2b3..a48b15e049a 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -45,8 +45,6 @@
#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */

#define AT91_PMC_PLL_ACR 0x18 /* PLL Analog Control Register [for SAM9X60] */
-#define AT91_PMC_PLL_ACR_DEFAULT_UPLL 0x12020010UL /* Default PLL ACR value for UPLL */
-#define AT91_PMC_PLL_ACR_DEFAULT_PLLA 0x00020010UL /* Default PLL ACR value for PLLA */
#define AT91_PMC_PLL_ACR_UTMIVR (1 << 12) /* UPLL Voltage regulator Control */
#define AT91_PMC_PLL_ACR_UTMIBG (1 << 13) /* UPLL Bandgap Control */

--
2.25.1