[PATCH v4] armv8: Handle EL2 Host mode

Mark Kettenis
2021-02-10T19:14:55Z

On implementations that support VHE, the layout of the CPTR_EL2
register depends on whether HCR_EL2.E2H is set. If the bit is
set, CPTR_EL2 uses the same layout as CPACR_EL1 and can in fact
be accessed through that register. In that case, jump to the
EL1 code to enable access to the FP/SIMD registers. This allows
U-Boot to run on systems that pass control to U-Boot in EL2 with
EL2 Host mode enabled such as machines using Apple's M1 SoC.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---

v4: use EL1 codepath when HCR_EL2.E2H is set
suggested by Marc Zyngier <maz@kernel.org>

v2: rename label

arch/arm/cpu/armv8/start.S | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 662449156b..9e9c6140cd 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -132,11 +132,13 @@ pie_fixup_done:
msr cntfrq_el0, x0 /* Initialize CNTFRQ */
#endif
b 0f
-2: set_vbar vbar_el2, x0
+2: mrs x1, hcr_el2
+ tbnz x1, #34, 1f /* HCR_EL2.E2H */
+ set_vbar vbar_el2, x0
mov x0, #0x33ff
msr cptr_el2, x0 /* Enable FP/SIMD */
b 0f
-1: set_vbar vbar_el1, x0
+1: set_vbar vbar_el1, x0
mov x0, #3 << 20
msr cpacr_el1, x0 /* Enable FP/SIMD */
0:
--
2.30.0