Re: [RFC PATCH 13/17] sunxi: add early Allwinner R528/T113 SoC support

[Sam Edwards <cfsworks@gmail.com>]

On 12/5/22 17:45, Andre Przywara wrote:
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index 3763ec3d2e4..33331cda5e2 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -148,6 +148,10 @@ static int gpio_init(void)
>   	sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
>   	sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
>   	sunxi_gpio_set_pull(SUNXI_GPH(13), SUNXI_GPIO_PULL_UP);
> +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_R528)
> +	sunxi_gpio_set_cfgpin(SUNXI_GPE(2), 6);
> +	sunxi_gpio_set_cfgpin(SUNXI_GPE(3), 6);
> +	sunxi_gpio_set_pull(SUNXI_GPE(3), SUNXI_GPIO_PULL_UP);
>   #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV)
>   	sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPE_UART0);
>   	sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPE_UART0);

I'm a relative outsider to sunxi, but it does look like the NCAT2 
generation's MUX is a lot more flexible in its UART assignments: e.g. 
while H3's UART1-3 only had one set of pins each UART could use, the 
T113 (my target) supports anywhere from 2-6 (typically 4) different 
options for each of its UARTs. It is not as simple as configuring which 
UART is the serial console anymore, because different boards might wire 
the console header to different pins. My particular target uses UART3 on 
pins PB6/PB7, for example.

Since this patchset is updating the PIO driver anyway, maybe it's worth 
updating the (preprocessor, not runtime) logic in gpio_init to support 
getting the UART TX/RX pins from Kconfig, validating that the 
CONFIG_CONS_INDEX and pin selection are compatible, and setting the 
correct MUX function for those pins with a value pulled from a table?