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[212.197.176.189]) by smtp.gmail.com with ESMTPSA id o12-20020a5d62cc000000b001f048bc25dfsm872545wrv.67.2022.03.02.09.00.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Mar 2022 09:00:28 -0800 (PST) Message-ID: Date: Wed, 2 Mar 2022 18:00:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US To: u-boot@lists.denx.de, dillon.minfei@gmail.com, patrice.chotard@foss.st.com From: "Johannes (krjdev) Krottmayer" Subject: drivers: clk: stm32h7: Endless loop of dead in driver probe function Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi, Some IMHO fatal issues in the the clock driver for the STM32H7 series driver. Affected driver: drivers/clk/clk_stm32h7.c Affected configs (boards): configs/stm32h750-art-pi_defconfig configs/stm32h743-disco_defconfig configs/stm32h743-eval_defconfig Description: The driver currently requires a external working clock source (HSE). No issues in the circuit are accepted by the current implementation. Also a fixed (defined) frequency of the external clock source. In the probe function stm32_clk_probe() from the driver there will be configure_clocks() called. Here are the issues. As code snippet from configure_clocks(): /* Switch on HSE */ setbits_le32(®s->cr, RCC_CR_HSEON); while (!(readl(®s->cr) & RCC_CR_HSERDY)) ; RCC_CR_HSERDY will here never set, when there is no external clock source or an issue in the circuit. -> Endless loop of dead. My possible fixes: At a timeout when reading the register and if the timeout is elapsed, print an error message and return with ETIMEDOUT, so the dm manger can call the hang() function. Johannes K.