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From: Patrice CHOTARD <patrice.chotard@foss.st.com>
To: Patrick Delaunay <patrick.delaunay@foss.st.com>, <u-boot@lists.denx.de>
Cc: <uboot-stm32@st-md-mailman.stormreply.com>,
	Joe Hershberger <joe.hershberger@ni.com>
Subject: Re: [Uboot-stm32] [PATCH 1/3] phy: stm32-usbphyc: add counter of PLL consumer
Date: Tue, 10 May 2022 13:50:57 +0200	[thread overview]
Message-ID: <eef7ed55-ebe4-f7fa-3cff-1842aaee90ee@foss.st.com> (raw)
In-Reply-To: <35055a10-b07d-8478-c4ca-d98cb176c5f2@foss.st.com>



On 5/10/22 09:45, Patrice CHOTARD wrote:
> 
> 
> On 5/6/22 16:18, Patrice CHOTARD wrote:
>> Hi Patrick
>>
>> On 4/26/22 14:37, Patrick Delaunay wrote:
>>> Add the counter of the PLL user n_pll_cons managed by the 2 functions
>>> stm32_usbphyc_pll_enable / stm32_usbphyc_pll_disable.
>>>
>>> This counter allow to remove the function stm32_usbphyc_is_init
>>> and it is a preliminary step for ck_usbo_48m introduction.
>>>
>>> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
>>> ---
>>>
>>>  drivers/phy/phy-stm32-usbphyc.c | 76 +++++++++++++++++++++------------
>>>  1 file changed, 48 insertions(+), 28 deletions(-)
>>>
>>> diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
>>> index 9c1dcfae52..16c8799eca 100644
>>> --- a/drivers/phy/phy-stm32-usbphyc.c
>>> +++ b/drivers/phy/phy-stm32-usbphyc.c
>>> @@ -65,6 +65,7 @@ struct stm32_usbphyc {
>>>  		bool init;
>>>  		bool powered;
>>>  	} phys[MAX_PHYS];
>>> +	int n_pll_cons;
>>>  };
>>>  
>>>  static void stm32_usbphyc_get_pll_params(u32 clk_rate,
>>> @@ -124,18 +125,6 @@ static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc)
>>>  	return 0;
>>>  }
>>>  
>>> -static bool stm32_usbphyc_is_init(struct stm32_usbphyc *usbphyc)
>>> -{
>>> -	int i;
>>> -
>>> -	for (i = 0; i < MAX_PHYS; i++) {
>>> -		if (usbphyc->phys[i].init)
>>> -			return true;
>>> -	}
>>> -
>>> -	return false;
>>> -}
>>> -
>>>  static bool stm32_usbphyc_is_powered(struct stm32_usbphyc *usbphyc)
>>>  {
>>>  	int i;
>>> @@ -148,18 +137,17 @@ static bool stm32_usbphyc_is_powered(struct stm32_usbphyc *usbphyc)
>>>  	return false;
>>>  }
>>>  
>>> -static int stm32_usbphyc_phy_init(struct phy *phy)
>>> +static int stm32_usbphyc_pll_enable(struct stm32_usbphyc *usbphyc)
>>>  {
>>> -	struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev);
>>> -	struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id;
>>>  	bool pllen = readl(usbphyc->base + STM32_USBPHYC_PLL) & PLLEN ?
>>>  		     true : false;
>>>  	int ret;
>>>  
>>> -	dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
>>> -	/* Check if one phy port has already configured the pll */
>>> -	if (pllen && stm32_usbphyc_is_init(usbphyc))
>>> -		goto initialized;
>>> +	/* Check if one consumer has already configured the pll */
>>> +	if (pllen && usbphyc->n_pll_cons) {
>>> +		usbphyc->n_pll_cons++;
>>> +		return 0;
>>> +	}
>>>  
>>>  	if (usbphyc->vdda1v1) {
>>>  		ret = regulator_set_enable(usbphyc->vdda1v1, true);
>>> @@ -190,23 +178,19 @@ static int stm32_usbphyc_phy_init(struct phy *phy)
>>>  	if (!(readl(usbphyc->base + STM32_USBPHYC_PLL) & PLLEN))
>>>  		return -EIO;
>>>  
>>> -initialized:
>>> -	usbphyc_phy->init = true;
>>> +	usbphyc->n_pll_cons++;
>>>  
>>>  	return 0;
>>>  }
>>>  
>>> -static int stm32_usbphyc_phy_exit(struct phy *phy)
>>> +static int stm32_usbphyc_pll_disable(struct stm32_usbphyc *usbphyc)
>>>  {
>>> -	struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev);
>>> -	struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id;
>>>  	int ret;
>>>  
>>> -	dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
>>> -	usbphyc_phy->init = false;
>>> +	usbphyc->n_pll_cons--;
>>>  
>>> -	/* Check if other phy port requires pllen */
>>> -	if (stm32_usbphyc_is_init(usbphyc))
>>> +	/* Check if other consumer requires pllen */
>>> +	if (usbphyc->n_pll_cons)
>>>  		return 0;
>>>  
>>>  	clrbits_le32(usbphyc->base + STM32_USBPHYC_PLL, PLLEN);
>>> @@ -235,6 +219,42 @@ static int stm32_usbphyc_phy_exit(struct phy *phy)
>>>  	return 0;
>>>  }
>>>  
>>> +static int stm32_usbphyc_phy_init(struct phy *phy)
>>> +{
>>> +	struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev);
>>> +	struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id;
>>> +	int ret;
>>> +
>>> +	dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
>>> +	if (usbphyc_phy->init)
>>> +		return 0;
>>> +
>>> +	ret = stm32_usbphyc_pll_enable(usbphyc);
>>> +	if (ret)
>>> +		return log_ret(ret);
>>> +
>>> +	usbphyc_phy->init = true;
>>> +
>>> +	return 0;
>>> +}
>>> +
>>> +static int stm32_usbphyc_phy_exit(struct phy *phy)
>>> +{
>>> +	struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev);
>>> +	struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id;
>>> +	int ret;
>>> +
>>> +	dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
>>> +	if (!usbphyc_phy->init)
>>> +		return 0;
>>> +
>>> +	ret = stm32_usbphyc_pll_disable(usbphyc);
>>> +
>>> +	usbphyc_phy->init = false;
>>> +
>>> +	return log_ret(ret);
>>> +}
>>> +
>>>  static int stm32_usbphyc_phy_power_on(struct phy *phy)
>>>  {
>>>  	struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev);
>> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
>>
>> Thanks
>> Patrice

After discussion with Patrick, the whole series will not be merged in stm32 git custodian master branch

Patrice

>> _______________________________________________
>> Uboot-stm32 mailing list
>> Uboot-stm32@st-md-mailman.stormreply.com
>> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
> Applied to u-boot-stm32
> 
> Thanks
> Patrice
> _______________________________________________
> Uboot-stm32 mailing list
> Uboot-stm32@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32

  reply	other threads:[~2022-05-10 11:51 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-26 12:37 [PATCH 0/3] stm32mp: handle ck_usbo_48m clock provided by USBPHYC Patrick Delaunay
2022-04-26 12:37 ` [PATCH 1/3] phy: stm32-usbphyc: add counter of PLL consumer Patrick Delaunay
2022-05-06 14:18   ` Patrice CHOTARD
2022-05-10  7:45     ` [Uboot-stm32] " Patrice CHOTARD
2022-05-10 11:50       ` Patrice CHOTARD [this message]
2022-05-08 18:21   ` Sean Anderson
2022-05-09 14:37     ` Patrick DELAUNAY
2022-05-10  9:51       ` Amelie Delaunay
2022-05-11 16:48         ` Sean Anderson
2022-05-17  7:42           ` Patrick DELAUNAY
2022-06-11 15:43             ` Sean Anderson
2022-09-07 13:31   ` Patrick DELAUNAY
2022-04-26 12:37 ` [PATCH 2/3] phy: stm32-usbphyc: usbphyc is a clock provider of ck_usbo_48m clock Patrick Delaunay
2022-05-06 14:24   ` Patrice CHOTARD
2022-05-10  7:45     ` [Uboot-stm32] " Patrice CHOTARD
2022-05-08 18:23   ` Sean Anderson
2022-05-09 15:44     ` Patrick DELAUNAY
2022-09-07 13:31   ` Patrick DELAUNAY
2022-04-26 12:37 ` [PATCH 3/3] clk: stm32mp: handle ck_usbo_48m clock provided by USBPHYC Patrick Delaunay
2022-05-06 14:26   ` Patrice CHOTARD
2022-05-10  7:45     ` [Uboot-stm32] " Patrice CHOTARD
2022-09-07 13:32   ` Patrick DELAUNAY

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