From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC4B8C433EF for ; Wed, 9 Mar 2022 08:09:00 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1E26F837E4; Wed, 9 Mar 2022 09:08:58 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.b="3i+MMjVi"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C11CF83829; Wed, 9 Mar 2022 09:08:55 +0100 (CET) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C425482F5E for ; Wed, 9 Mar 2022 09:08:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=prvs=906754a836=patrice.chotard@foss.st.com Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2294p9rg031694; Wed, 9 Mar 2022 09:08:50 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=message-id : date : mime-version : subject : to : references : from : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=5fCfdw+iGyZnUB3MlQeApzysnx0WQsZaRACYRoH1yKo=; b=3i+MMjVi+dOsoCYa3ICiEJ1XZFQWORU1ZoIUcbGvAsycNuAuVGctpgVavsOJlmEX0gvM ZUViIw5bYY8u3uUQVof/Oo+art6cXeJvneiaozRz8izrexZlMR8A/L3J15xKuXxGW492 ATdg4ptG/DLPW/XKS+q7D42hNszO/AdMJcb0sn/vnQYaO+OEfBW7aENsE+IBBge06WYB LuXvRQcwvGLe789ky4oe28w8/FQP9Fm2Mb3hVH7Kj1RzBVMREfTUyXEgzu4ZbHBSOlyd L6OEpS5DDXDSJIFtCJfQQ6mrLUQDYdQgNxRtrYbMutovYJ9/AOiWZLM7YpVQmCukvfuF tQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3em0346a1w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 09 Mar 2022 09:08:50 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AEBAE10003E; Wed, 9 Mar 2022 09:08:49 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A788A212FBA; Wed, 9 Mar 2022 09:08:49 +0100 (CET) Received: from [10.201.21.201] (10.75.127.48) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Wed, 9 Mar 2022 09:08:49 +0100 Message-ID: Date: Wed, 9 Mar 2022 09:08:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: drivers: clk: stm32h7: Endless loop of dead in driver probe function Content-Language: en-US To: "Johannes (krjdev) Krottmayer" , Patrick DELAUNAY , , References: <5affc0c0-f2e8-5dd7-54b1-cb7f30168ed5@foss.st.com> <6bab2e77-3827-dbc0-8592-39da1a51d187@gmail.com> From: Patrice CHOTARD In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-09_03,2022-03-04_01,2022-02-23_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On 3/9/22 09:02, Johannes (krjdev) Krottmayer wrote: > Hi Patrice! > > On 09.03.22 08:43, Patrice CHOTARD wrote: >> Hi johannes >> >> On 3/9/22 08:24, Johannes (krjdev) Krottmayer wrote: >>> Hi Patrick! >>> >>> Sorry, for my late response. :( >>> >>> On 08.03.22 10:00, Patrick DELAUNAY wrote:> Yes, the current clock >>> driver for STM32 MCU is not perfect,> > as the all U-Boot and the >>> Linux support on STM32 MCU.> >>>> >>>> For information, in the other driver based on a other version of RCC for >>>> STM32 MPU >>>> >>>> STM32MP1 = clk_stm32mp1.c, it is correctly managed in >>>> >>>> stm32mp1_osc_wait(1, rcc, RCC_OCRDYR, RCC_OCRDYR_HSERDY); >>>> >>>> by using readl_poll_timeout() function. >>>> >>>> >>>>> My possible fixes: >>>>> At a timeout when reading the register and if the timeout is >>>>> elapsed, print an error message and return with ETIMEDOUT, so >>>>> the dm manger can call the hang() function. >>>> >>>> I agree, it is a correct management: at least indicate this hardware issue >>>> >>>> even if the rdy bit can't be stay at 0 in normal use case when HSE is >>>> >>>> present.> >>>> => replace all while() in the RCC clock driver with readl_poll_timeout >>>> >>>> >>>> but to call readl_poll_timeout(), the arch timer need to ready >>>> >>>> (timer_init() already called) when RCC clokc driver probe is executed. >>>> >>>> >>>> An issue the I encounters on STM32MP need to be checked in MCU driver: >>>> >>>> the timer can't dependant of RCC probe when polling function is used. >>>> >>>> >>>> This issue was solved in STM32MP by using the generic armv7 timer >>>> >>>> (only dependant of Cortex core) and call the initialization in >>>> >>>> arch/arm/mach-stm32mp/cpu.c: >>>> >>>> int arch_cpu_init(void) >>>> { >>>> .... >>>> >>>>     /* early armv7 timer init: needed for polling */ >>>>     timer_init(); >>>> >>>>     return 0; >>>> } >>> >>> Is there any reason why not use the ARMv7-M SysTick Timer? There >>> exists an initialization routine in the U-Boot source tree: >> >> Simply because when i introduced stm32h7 board, i didn't need it ;-) >> >>> >>> arch/arm/cpu/armv4m/systick-timer.c >>> >>> The routines should work for Cortex-M3/M4/M7. >>> >>> timer_init() and all required functions for mdelay() which are will >>> be called by the polling functions are implemented. >>> >>> Don't looked into other TRM's, other than for STM32H745/STM32H747 and >>> STM32H755/STM32H757 yet, but according the TRM, the SysTick timer for >>> the core Cortex-M7 should run at 8MHz, after reset: >>> >>> - HSI should be selected as system clock (sys_ck), running at 64MHz >>> - Domain 1 prescaler (D1CPRE) with scale 1 >>> - SysTick timer at default configuration (external source) which >>> has a fixed prescale from 8, according the block schematic in >>> TRM. >>> >>> Correct me please, if I'm wrong. >>> >>>> The timer management on MCU need to be check before any patch. >>> >>> Yes, but I can currently only test the correct behavior on a >>> STM32H747I-DISCO board. Currently creating the device-tree for >>> the SoC. >>> >>>> Can you propose something ? >>> >>> I would use the SysTick Timer on the other devices from the STM32H7 >>> series too, so I would change the current code. >>> >>> Before I release a patch series here in the official mailing list, >>> I would suggest, if some other developers or users can verify my >>> modification on their real hardware. >>> >>> My GitHub repo: >>> https://github.com/krjdev/stm32_u-boot >>> (branch stm32h747_disco) >>> >>> That I can offer. :) >> >> I have a stm21h7xxi-disco (MB1248) i can give it a try this week. >> I will keep you in touch. > > Please can you give me some additional time for this? The device-tree > needs some fixes. Missing clocks and resets for the required driver. > > I will create a git tag, when I'm ready and I have tested to run > U-Boot on my board. :) > > Working since sunday on the device-trees...Maybe tommorrow. :) No problem, i will wait your green light :-D Patrice > >> Thanks >> Patrice >> >>> >>> Kind regards, >>> >>> Johannes > > Kind regards > > Johannes