RE: [PATCH] riscv: dts: jh7110: Enable PLL node in SPL

Hal Feng
2024-03-12T11:12:22Z

> On 06.03.24 11:00, Bo Gan wrote:
>
> Previously PLL node was missing from SPL dts. This caused BUS_ROOT to stay on
> OSC clock (24Mhz). As a result, all peripherals have to run at a much lower
> frequency, and loading from sdcard/emmc is slow.
> Thus, enabling PLL node in dts to fix this.
>
> Signed-off-by: Bo Gan <ganboing@gmail.com>

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>