Re: [PATCH] riscv: dts: jh7110: Enable PLL node in SPL

Bo Gan
2024-04-10T06:44:35Z

On 4/9/24 6:55 PM, E Shattow wrote:
> Original speed class SD cards fail with this change "unable to change mode".
>
> On Tue, Mar 12, 2024 at 4:12 AM Hal Feng <hal.feng@starfivetech.com> wrote:
>>
>>> On 06.03.24 11:00, Bo Gan wrote:
>>>
>>> Previously PLL node was missing from SPL dts. This caused BUS_ROOT to stay on
>>> OSC clock (24Mhz). As a result, all peripherals have to run at a much lower
>>> frequency, and loading from sdcard/emmc is slow.
>>> Thus, enabling PLL node in dts to fix this.
>>>
>>> Signed-off-by: Bo Gan <ganboing@gmail.com>
>>
>> Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
>>

The BUS_ROOT clock will have to be switched to PLL2 anyway in U-Boot proper or
in Linux, because it's the parent or grandparent clock for *lots* of devices,
including PCIe, i2c, spi, qspi... If there's an issue with this change, then
I suspect there's something wrong with the dw_mmc driver.

Bo