From: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RESEND PATCH v2 04/15] arm: socfpga: agilex: Add reset manager support
Date: Tue, 9 Jul 2019 22:43:29 +0200 [thread overview]
Message-ID: <fd1cc0d1-d4e9-ef23-79e6-be26a65acd36@gmail.com> (raw)
In-Reply-To: <7f98b41f-ec7d-49fd-31aa-871c0c38762e@denx.de>
Am 09.07.2019 um 22:33 schrieb Marek Vasut:
> On 7/9/19 10:01 PM, Simon Goldschmidt wrote:
>> Am 04.07.2019 um 10:56 schrieb Ley Foon Tan:
>>> Add reset manager support for Agilex.
>>>
>>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
>>> ---
>>> .../mach-socfpga/include/mach/reset_manager.h | 5 ++-
>>> .../include/mach/reset_manager_agilex.h | 38 +++++++++++++++++++
>>> arch/arm/mach-socfpga/reset_manager.c | 9 +++--
>>> 3 files changed, 48 insertions(+), 4 deletions(-)
>>> create mode 100644
>>> arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
>>>
>>> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
>>> b/arch/arm/mach-socfpga/include/mach/reset_manager.h
>>> index e2dce4b4fb..f752f7abb8 100644
>>> --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
>>> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
>>> @@ -36,7 +36,8 @@ void socfpga_per_reset_all(void);
>>> /* Create a human-readable reference to SoCFPGA reset. */
>>> #define SOCFPGA_RESET(_name) RSTMGR_##_name
>>> -#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
>>> +#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
>>> + defined(CONFIG_TARGET_SOCFPGA_AGILEX)
>>> void reset_deassert_peripherals_handoff(void);
>>> int cpu_has_been_warmreset(void);
>>> @@ -68,6 +69,8 @@ void socfpga_bridges_reset(int enable);
>>> #include <asm/arch/reset_manager_arria10.h>
>>> #elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
>>> #include <asm/arch/reset_manager_s10.h>
>>> +#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
>>> +#include <asm/arch/reset_manager_agilex.h>
>>> #endif
>>> #endif /* _RESET_MANAGER_H_ */
>>> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
>>> b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
>>> new file mode 100644
>>> index 0000000000..c209fb439b
>>> --- /dev/null
>>> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
>>> @@ -0,0 +1,38 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/*
>>> + * Copyright (C) 2019 Intel Corporation <www.intel.com>
>>> + */
>>> +
>>> +#ifndef _RESET_MANAGER_AGILEX_
>>> +#define _RESET_MANAGER_AGILEX_
>>> +
>>> +struct socfpga_reset_manager {
>>> + u32 status;
>>> + u32 mpu_rst_stat;
>>> + u32 misc_stat;
>>> + u32 padding1;
>>> + u32 hdsk_en;
>>> + u32 hdsk_req;
>>> + u32 hdsk_ack;
>>> + u32 hdsk_stall;
>>> + u32 mpumodrst;
>>> + u32 per0modrst;
>>> + u32 per1modrst;
>>> + u32 brgmodrst;
>>> + u32 padding2;
>>> + u32 cold_mod_reset;
>>> + u32 padding3;
>>> + u32 dbg_mod_reset;
>>
>> So the only difference is that 'padding4' got renamed to
>> 'tap_mod_reset'? Do you even use 'tap_mod_reset' in U-Boot?
>>
>> This looks like another file to be combined for S10 and Agilex?
>
> btw. I am slowly starting to realize that switching to this
> structure-based approach might've been a horrible mistake right from the
> beginning.
Yeah, well, from a documentation point of view, I prefer structs. But
here it shows that you may end up with many members you never need, so
yes, declaring offsets might be better at some point...
Regards,
Simon
next prev parent reply other threads:[~2019-07-09 20:43 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-04 8:55 [U-Boot] [RESEND PATCH v2 00/15] Add Intel Agilex SoC support Ley Foon Tan
2019-07-04 8:55 ` [U-Boot] [RESEND PATCH v2 01/15] arm: socfpga: agilex: Add base address for Intel Agilex SoC Ley Foon Tan
2019-07-09 19:40 ` Simon Goldschmidt
2019-07-04 8:55 ` [U-Boot] [RESEND PATCH v2 02/15] arm: socfpga: Move firewall code to firewall file Ley Foon Tan
2019-07-09 19:41 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 03/15] arm: socfpga: Move Stratix10 and Agilex reset manager common code Ley Foon Tan
2019-07-09 19:56 ` Simon Goldschmidt
2019-07-10 22:48 ` Ley Foon Tan
2019-07-12 10:27 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 04/15] arm: socfpga: agilex: Add reset manager support Ley Foon Tan
2019-07-09 20:01 ` Simon Goldschmidt
2019-07-09 20:33 ` Marek Vasut
2019-07-09 20:43 ` Simon Goldschmidt [this message]
2019-07-09 21:06 ` Marek Vasut
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 05/15] arm: socfpga: Move Stratix10 and Agilex system manager common code Ley Foon Tan
2019-07-09 20:04 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 06/15] arm: socfpga: agilex: Add system manager support Ley Foon Tan
2019-07-09 20:08 ` Simon Goldschmidt
2019-07-10 22:56 ` Ley Foon Tan
2019-07-12 10:50 ` Simon Goldschmidt
2019-08-06 9:24 ` Ley Foon Tan
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 07/15] clk: agilex: Add clock driver for Agilex Ley Foon Tan
2019-07-09 20:13 ` Simon Goldschmidt
2019-07-10 23:03 ` Ley Foon Tan
2019-07-12 10:47 ` Simon Goldschmidt
2019-08-06 9:19 ` Ley Foon Tan
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 08/15] arm: socfpga: agilex: Add clock manager support Ley Foon Tan
2019-07-09 20:15 ` Simon Goldschmidt
2019-07-10 23:08 ` Ley Foon Tan
2019-07-12 10:30 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 09/15] arm: socfpga: agilex: Add CCU support for Agilex Ley Foon Tan
2019-07-09 20:19 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 10/15] ddr: altera: Restructure Stratix 10 SDRAM driver Ley Foon Tan
2019-07-09 20:35 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 11/15] ddr: altera: agilex: Add SDRAM driver for Agilex Ley Foon Tan
2019-07-09 20:37 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 12/15] board: intel: agilex: Add socdk board support for Intel Agilex SoC Ley Foon Tan
2019-07-09 20:38 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 13/15] arm: socfpga: agilex: Add SPL for " Ley Foon Tan
2019-07-09 20:39 ` Simon Goldschmidt
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 14/15] arm: dts: agilex: Add base dtsi and devkit dts Ley Foon Tan
2019-07-09 20:41 ` Simon Goldschmidt
2019-07-10 22:40 ` Ley Foon Tan
2019-07-04 8:56 ` [U-Boot] [RESEND PATCH v2 15/15] arm: socfpga: agilex: Enable Agilex SoC build Ley Foon Tan
2019-07-09 20:42 ` Simon Goldschmidt
2019-07-09 19:35 ` [U-Boot] [RESEND PATCH v2 00/15] Add Intel Agilex SoC support Simon Goldschmidt
2019-07-10 12:36 ` Tom Rini
2019-07-10 13:08 ` Simon Goldschmidt
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