From mboxrd@z Thu Jan 1 00:00:00 1970 From: Giulio Benetti Date: Thu, 18 Jun 2009 17:30:49 +0200 Subject: [U-Boot] [PATCH 2/2] at91sam9263ek: active watchdog support via at91sam9263ek_wdt_config References: <20090615124422.GQ22102@game.jcrosoft.org> <1233505762-23290-1-git-send-email-plagnioj@jcrosoft.com> <1233505762-23290-2-git-send-email-plagnioj@jcrosoft.com> <20090308231923.C8F86832E8B8@gemini.denx.de> <20090613123700.GD3814@game.jcrosoft.org> <20090615130120.GA2747@mail.gnudd.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de I think that with this patch at91 watchdog is enough, it reduces code that is not yet used and I think it HAS NOT to be used(no wdt init). Signed-off-by: giulio.benetti at micronovasrl.com diff -urpN b/drivers/watchdog/at91sam9_wdt.c a/drivers/watchdog/at91sam9_wdt.c --- b/drivers/watchdog/at91sam9_wdt.c 2009-06-14 21:30:39.000000000 +0200 +++ a/drivers/watchdog/at91sam9_wdt.c 2009-06-18 17:26:26.000000000 +0200 @@ -5,6 +5,7 @@ * * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD * Copyright (C) 2008 Renaud CERRATO r.cerrato at til-technologies.fr + * Giulio Benetti * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -24,56 +25,7 @@ #include #include -/* - * AT91SAM9 watchdog runs a 12bit counter @ 256Hz, - * use this to convert a watchdog - * value from/to milliseconds. - */ -#define ms_to_ticks(t) (((t << 8) / 1000) - 1) -#define ticks_to_ms(t) (((t + 1) * 1000) >> 8) - -/* Hardware timeout in seconds */ -#define WDT_HW_TIMEOUT 2 - -/* - * Set the watchdog time interval in 1/256Hz (write-once) - * Counter is 12 bit. - */ -static int at91_wdt_settimeout(unsigned int timeout) -{ - unsigned int reg; - unsigned int mr; - - /* Check if disabled */ - mr = at91_sys_read(AT91_WDT_MR); - if (mr & AT91_WDT_WDDIS) { - printf("sorry, watchdog is disabled\n"); - return -1; - } - - /* - * All counting occurs at SLOW_CLOCK / 128 = 256 Hz - * - * Since WDV is a 12-bit counter, the maximum period is - * 4096 / 256 = 16 seconds. - */ - reg = AT91_WDT_WDRSTEN /* causes watchdog reset */ - /* | AT91_WDT_WDRPROC causes processor reset only */ - | AT91_WDT_WDDBGHLT /* disabled in debug mode */ - | AT91_WDT_WDD /* restart at any time */ - | (timeout & AT91_WDT_WDV); /* timer value */ - at91_sys_write(AT91_WDT_MR, reg); - - return 0; -} - void hw_watchdog_reset(void) { at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); } - -void hw_watchdog_init(void) -{ - /* 16 seconds timer, resets enabled */ - at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); -} -- Giulio Benetti R&D Micronova srl