[U-Boot] u-boot boot process is broken, how do i recover?

Albert ARIBAUD
2013-04-03T11:55:43Z

Hi JPT,

On Wed, 03 Apr 2013 13:30:46 +0200, JPT <j-p-t@gmx.net> wrote:

> hi,
>
>
> Am 03.04.2013 11:00, schrieb Albert ARIBAUD:
> >
> >> apt-get install uboot-envtools
> >> fw_printenv bootcmd
> >
> > No result there? There should be.
>
> sure.
> it's what I set into bootcmd.bak:
>
> >> fw_setenv bootcmd.bak 'nand read.e 0x1200000 0x200000 0x600000;nand
> >> read.e 0x2000000 0x800000 0x1000000;bootm 0x1200000 0x2000000'

Ok.

> the outputs all looked fine, after I changed the offset in config file
> to 0x0. Else I wouln't have written anything. But still I am not 100%
> sure about the sector size of 0x20000 (128KByte)

Well, the exact value can only be known with the source code for the
U-Boot your board is running. Speaking of which... Did you look /
ask Netgear for the source code? They should provide it to you as per
GPL.

> > Yes: get control through JTAG.
>
> Ok. I'll try.
>
> > Don't consider unsoldering / resoldering, all the more if sockets are
> > involved, as long as you board has JTAG, either as a header or at least
> > as contact points. A dumb JTAG probe and OpenOCD will cost you little
> > and go a long way.
>
> I've got the following soldering points:
>
> - a 1x3 Pin at 2,54mm connector labeld J7 which could be a FAN connector.
>
> - a 2x5=10 PIN at 2mm connector J1 near the ROM chip.
>
> both connectors are on this picture:
> http://natisbad.org/NAS/pics/NETGEAR_ReadyNAS_Duo_v2_RND2000-200EUS_J1_and_J7_provisions.jpg
>
> - 1x4 PIN @ 2,54mm connector.
>
> So which one?
> Do I have to guess the pins?

Well, without information from Netgear, it's going to be hard to find
out which is which. Considering the number of signals in a JTAG I/F, J7
and the 1x4 pin connector can be ruled out. However, it does not mean
J1 is JTAG, and anyway, you'll have trouble finding the right pinout.

> which probe should I chose? Something like these?
> - Embedded Projects OpenOCD-USB Adapter
> - Xilinx JTAG Parallel Cable III FPGA CPLD programmer LPT
> - SainSmart USB Blaster Programmer Cable For FPGA CPLD JTAG Development
> Board
> - found a LPT programmer having nothing more than a 74HC244 chip.
>
> Id' prefer the USB adapter...

I cannot advise on the compared merits of those. The ones I know are
the BusPirate or BusBlaster (very versatile boards, no casing) and the
Olimex ARM-USB-OCD[-H] (less generic than the BusPirate/Blaster but has
a casing and comes with a serial port.

In any case, choose a probe for which your JTAG software will work.

> btw, I found out there is a boot menu.
> When I hold the reset button during bootup, there is a boot menu offering:
> [...]
> Won't help much, I believe, since most rely on the boot process which is
> broken.

I think so too. For now, your best chance for recovery will be JTAG.

BTW, this becomes unrelated to U-Boot per se (at most, it's a
non-mainline U-Boot, which should not be discussed here). I suggest
moving the discussion outside of this list unless you have generic
questions left regarding U-boot.

Amicalement,
--
Albert.