From mboxrd@z Thu Jan 1 00:00:00 1970 From: Detlev Zundel Date: Wed, 10 Aug 2011 14:29:19 +0200 Subject: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors In-Reply-To: <1312960344-1499-1-git-send-email-joe.hershberger@ni.com> (Joe Hershberger's message of "Wed, 10 Aug 2011 02:12:24 -0500") References: <1312960344-1499-1-git-send-email-joe.hershberger@ni.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Joe, > Previously only the last N were included based on the current one in use. > > Signed-off-by: Joe Hershberger > Cc: Joe Hershberger > Cc: Mingkai Hu > Cc: Andy Fleming > Cc: Kumar Gala > Cc: Detlev Zundel > --- > drivers/net/tsec.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c > index 78ffc95..1805ca0 100644 > --- a/drivers/net/tsec.c > +++ b/drivers/net/tsec.c > @@ -250,8 +250,8 @@ static void startup_tsec(struct eth_device *dev) > txIdx = 0; > > /* Point to the buffer descriptors */ > - out_be32(®s->tbase, (unsigned int)(&rtx.txbd[txIdx])); > - out_be32(®s->rbase, (unsigned int)(&rtx.rxbd[rxIdx])); > + out_be32(®s->tbase, (unsigned int)(&rtx.txbd[0])); > + out_be32(®s->rbase, (unsigned int)(&rtx.rxbd[0])); > > /* Initialize the Rx Buffer descriptors */ > for (i = 0; i < PKTBUFSRX; i++) { I see these two lines just before the code you change (one is even in the context of your patch): /* reset the indices to zero */ rxIdx = 0; txIdx = 0; So can you tell me, what your change actually does? I cannot remember that we have concurrency issues here, or do we? Cheers Detlev -- Don't trust everything you read, and don't assume every poster in a thread is actually relevant to the problem. -- Stefan Monnier -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de