From: Detlev Zundel <dzu@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] mpc83xx: update LCRR register handling
Date: Fri, 28 Aug 2009 12:36:00 +0200 [thread overview]
Message-ID: <m2tyzsw7hr.fsf@ohwell.denx.de> (raw)
In-Reply-To: <20090827154941.0bd08f5a.kim.phillips@freescale.com> (Kim Phillips's message of "Thu, 27 Aug 2009 15:49:41 -0500")
Hi Kim,
> On Thu, 27 Aug 2009 13:11:25 +0200
> Detlev Zundel <dzu@denx.de> wrote:
>
>> Hi Kim,
>>
>> > o LCRR_PDYP, granted dangerous in your case, is obviously a writeable
>> > bit (not read-only), and documented as such in later documentation. In
>> > fact, there are no non-writeable bits in LCRR.
>>
>> Well, "reserved" != "non-writable" (usually there is a comment that
>> writing reserved bits produces undefined behaviour) so I agree with
>> Heiko that as long the documentation that we have access to, designates
>> bits as reserved, it makes sense to have such a mask.
>
> I think we should allow board-configurable writes to the DBYP bit, which
> is documented as "reserved" on some 83xx, on the 83xx parts that /do/
> implement it. So instead of having a mask, perhaps setting absolute
> values for CONFIG_SYS_LCRR should be replaced with a better scheme that
> allows board configs to just set LCRR bits by field, such as what the
> SCCR setting code does. I.e, deprecate CONFIG_SYS_LCRR and replace with
> individually-specified CONFIG_SYS_LCRR_{CLKDIV,EADC,ECL,BUDCMDC,DBYP}
> values.
>
> This will allow the reserved bits, whether 1 on reset or
> not, to be preserved across all 83xx (and 85xx for that matter).
Hm, you mean like the SCCR stuff in mpc83xx/cpu_init.c? Please don't.
This code is plain ugly - and even more, as I have pointed out multiple
times, in not more than 50 lines there are "only" 1024 non-trivially
differing c input possibilities coded. This is what I call bad.
Thinking about it, why not do a compromise like e.g. the following:
u32 sccr_mask = 0 \
#ifdef CONFIG_SYS_SCCR_ENCCM
| SCCR_ENCCM \
#endif
#ifdef CONFIG_SYS_SCCR_PCICM
| SCCR_PCICM \
#endif
....
#endif
;
u32 sccr_value = 0 \
#ifdef CONFIG_SYS_SCCR_ENCCM
| CONFIG_SYS_SCCR_ENCCM \
#endif
#ifdef CONFIG_SYS_SCCR_PCICM
| CONFIG_SYS_SCCR_PCICM \
#endif
....
#endif
;
out_be32(&im->clk.sccr, i(n_be32(&im->clk.sccr) & ~sccr_mask) | sccr_value);
This not only looks a bit nicer, but also (I hope) compiles the *exact*
same code for all possibilites, only with changing data values.
Cheers
Detlev
--
Or go for generality ... Add a programming language for extensibility
and write part of the program in that language.
--- GNU Coding Standards
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de
next prev parent reply other threads:[~2009-08-28 10:36 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-25 9:05 [U-Boot] mpc83xx: update LCRR register handling Heiko Schocher
2009-08-25 9:14 ` Liu Dave-R63238
2009-08-25 11:31 ` [U-Boot] [PATCH v2] " Heiko Schocher
2009-08-25 12:19 ` Liu Dave-R63238
2009-08-25 15:39 ` Kim Phillips
2009-08-26 6:28 ` Heiko Schocher
2009-08-26 22:36 ` Kim Phillips
2009-08-27 6:20 ` [U-Boot] [PATCH v3] " Heiko Schocher
2009-08-27 11:41 ` Jerry Van Baren
2009-08-27 20:53 ` Kim Phillips
2009-09-16 4:51 ` Kumar Gala
2009-09-25 23:19 ` [U-Boot] [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields (was: Re: [PATCH v3] mpc83xx: update LCRR register handling) Kim Phillips
2009-09-26 10:37 ` [U-Boot] [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields Heiko Schocher
2009-09-27 1:46 ` Kim Phillips
2009-09-27 1:54 ` Kim Phillips
2009-08-27 11:11 ` [U-Boot] [PATCH v2] mpc83xx: update LCRR register handling Detlev Zundel
2009-08-27 20:49 ` Kim Phillips
2009-08-28 10:36 ` Detlev Zundel [this message]
2009-08-28 12:02 ` Wolfgang Denk
2009-08-28 16:01 ` Kim Phillips
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