From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 468DCC25B4E for ; Tue, 24 Jan 2023 14:46:23 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 29BC485408; Tue, 24 Jan 2023 15:46:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=suse.de header.i=@suse.de header.b="Jxh07ibP"; dkim=permerror (0-bit key) header.d=suse.de header.i=@suse.de header.b="2Uh2ainw"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5E66785282; Tue, 24 Jan 2023 15:46:17 +0100 (CET) Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0078885622 for ; Tue, 24 Jan 2023 15:46:05 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=schwab@suse.de Received: from relay2.suse.de (relay2.suse.de [149.44.160.134]) by smtp-out1.suse.de (Postfix) with ESMTP id 9D0742187A; Tue, 24 Jan 2023 14:46:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1674571565; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=A6XT/iqqCqAvfxpjmB5aN5Arc/wXCgXbrV2Vk9ObCno=; b=Jxh07ibPwRK20+0coUIaLW+n8RES50oDmBke1sKUhBxNz2gVdcND4nnCsrv3ex/f6Pf8Kh AxTSHy28lb6agonnou+AkVlfZlAU5itYxDaP6wCZ6J+lImWl3Pyg/vLphh12S0bL8pZwXb lHYIC2kUiG/WH1Xm9yireo4at2FjAKI= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1674571565; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=A6XT/iqqCqAvfxpjmB5aN5Arc/wXCgXbrV2Vk9ObCno=; b=2Uh2ainwikcnCTlb8O9rCbOBRJG/QWe3VhlPS99rVWA1ZbgZPrIsAwoE4WwB8tFCn9908g Ih6cvkg1xo+xgqCg== Received: from hawking.suse.de (unknown [10.168.4.11]) by relay2.suse.de (Postfix) with ESMTP id 54E522C141; Tue, 24 Jan 2023 14:46:05 +0000 (UTC) Received: by hawking.suse.de (Postfix, from userid 17005) id D51E744384A; Tue, 24 Jan 2023 15:46:04 +0100 (CET) From: Andreas Schwab To: Yanhong Wang Cc: , Rick Chen , Leo , Lukasz Majewski , Sean Anderson , Lee Kuan Lim , Jianlong Huang , Emil Renner Berthing Subject: Re: [PATCH v2 00/17] Basic StarFive JH7110 RISC-V SoC support References: <20230118081132.31403-1-yanhong.wang@starfivetech.com> X-Yow: Zippy's brain cells are straining to bridge synapses... Date: Tue, 24 Jan 2023 15:46:04 +0100 In-Reply-To: <20230118081132.31403-1-yanhong.wang@starfivetech.com> (Yanhong Wang's message of "Wed, 18 Jan 2023 16:11:15 +0800") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Jan 18 2023, Yanhong Wang wrote: > This series of patches base on the latest branch/master, and add support > for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for > this to be achieved, the respective DT nodes have been added, and the > required defconfigs have been added to the boards' defconfig. What is more, > the basic required DM drivers have been added, such as reset, clock, pinctrl, > uart, ram etc. > > Note that the register base address of reset controller is same with the > clock controller. Therefore, there is no device tree node alone for reset > driver. It binds device node in the clock driver. > > The u-boot-spl and u-boot has been tested on the VisionFive V2 boards which > equip with JH7110 SoC and works normally. I tried to put that on an SD card for testing and boot from it, but the SPL cannot read it, thus fails to load U-Boot proper. U-Boot SPL 2023.01-00735-gc8fc99adce (Jan 24 2023 - 15:11:27 +0100) DDR version: dc2e84f0. Trying to boot from MMC2 spl: partition error SPL: failed to boot from all boot devices -- Andreas Schwab, SUSE Labs, schwab@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."