[U-Boot] [PATCH 1/5] ARM: mxs: make lowlevel_init() weak

[U-Boot] [PATCH 1/5] ARM: mxs: make lowlevel_init() weak

[Mans Rullgard]

With the full SPL framework enabled, lowlevel_init() is required.
Make the empty stub weak so boards can override it.

Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 arch/arm/cpu/arm926ejs/mxs/mxs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 7a68a8f3ca74..5c7817074fd6 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -24,7 +24,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* Lowlevel init isn't used on i.MX28, so just have a dummy here */
-void lowlevel_init(void) {}
+__weak void lowlevel_init(void) {}
 
 void reset_cpu(ulong ignored) __attribute__((noreturn));
 
-- 
2.17.0

[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[Mans Rullgard]

The code attempts to preserve the value of LR by storing it in R12/IP
across the lowevel_init() call.  However, this register is not saved
by the callee.  Use a register that guaranteed to be preserved instead.

Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 arch/arm/cpu/arm926ejs/start.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 959d1ed86d8a..a6f0bdb70345 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -105,9 +105,9 @@ flush_dcache:
 	/*
 	 * Go setup Memory and board specific bits prior to relocation.
 	 */
-	mov	ip, lr		/* perserve link reg across call */
+	mov	r4, lr		/* perserve link reg across call */
 	bl	lowlevel_init	/* go setup pll,mux,memory */
-	mov	lr, ip		/* restore link */
+	mov	lr, r4		/* restore link */
 #endif
 	mov	pc, lr		/* back to my caller */
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-- 
2.17.0

[U-Boot] [PATCH 3/5] ARM: spl: include arm/thumb glue sections

[Mans Rullgard]

When building in Thumb mode, the linker might generate mode switching
stubs in .glue sections.  Include these in the final link.

Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 arch/arm/cpu/u-boot-spl.lds | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index 65f7b68861e2..38fc9b44c8c7 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -21,6 +21,7 @@ SECTIONS
 		*(.vectors)
 		CPUDIR/start.o (.text*)
 		*(.text*)
+		*(.glue*)
 	}
 
 	. = ALIGN(4);
-- 
2.17.0

[U-Boot] [PATCH 4/5] ARM: mxs: move spl data

[Mans Rullgard]

With full SPL enabled, the loaded image overwrites the mxs_spl_data
location.  Moving it a slightly lower address fixes this.

Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 arch/arm/cpu/arm926ejs/mxs/mxs.c          | 6 ++----
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c     | 3 +--
 arch/arm/include/asm/arch-mxs/sys_proto.h | 2 ++
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 5c7817074fd6..09b5c04cc9d2 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -178,8 +178,7 @@ const char *get_imx_type(u32 imxtype)
 int print_cpuinfo(void)
 {
 	u32 cpurev;
-	struct mxs_spl_data *data = (struct mxs_spl_data *)
-		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
+	struct mxs_spl_data *data = MXS_SPL_DATA;
 
 	cpurev = get_cpu_rev();
 	printf("CPU:   Freescale i.MX%s rev%d.%d at %d MHz\n",
@@ -277,8 +276,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 
 int mxs_dram_init(void)
 {
-	struct mxs_spl_data *data = (struct mxs_spl_data *)
-		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
+	struct mxs_spl_data *data = MXS_SPL_DATA;
 
 	if (data->mem_dram_size == 0) {
 		printf("MXS:\n"
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index d9d1d73d1af4..0c3925640dc9 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -120,8 +120,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
 			 const iomux_cfg_t *iomux_setup,
 			 const unsigned int iomux_size)
 {
-	struct mxs_spl_data *data = (struct mxs_spl_data *)
-		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
+	struct mxs_spl_data *data = MXS_SPL_DATA;
 	uint8_t bootmode = mxs_get_bootmode_index();
 	gd = &gdata;
 
diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h
index 609676375b55..b23ee6d88768 100644
--- a/arch/arm/include/asm/arch-mxs/sys_proto.h
+++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
@@ -85,6 +85,8 @@ static const struct mxs_pair mxs_boot_modes[] = {
 #define MXS_BM_SDMMC1_3V3		0x0a
 #define MXS_BM_SDMMC1_1V8		0x1a
 
+#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_SYS_TEXT_BASE - 0x200))
+
 struct mxs_spl_data {
 	uint8_t		boot_mode_idx;
 	uint32_t	mem_dram_size;
-- 
2.17.0

[U-Boot] [PATCH 5/5] ARM: mxs: support full SPL framework

[Mans Rullgard]

This allows using the full SPL framework on mxs devices.  In this
mode, the u-boot.sb image loaded by the boot ROM contains only the
SPL which then loads U-Boot proper or a kernel in falcon mode.

Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 arch/arm/Kconfig                                 | 2 +-
 arch/arm/cpu/arm926ejs/mxs/Makefile              | 4 ++--
 arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg | 5 +++++
 arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg | 6 ++++++
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c            | 2 ++
 include/configs/mxs.h                            | 2 ++
 6 files changed, 18 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7212fc5afa72..0acdd162b4b3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1352,7 +1352,7 @@ source "arch/arm/Kconfig.debug"
 endmenu
 
 config SPL_LDSCRIPT
-        default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if ARCH_MX23 || ARCH_MX28
+        default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
         default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
 	default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
 
diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile
index 71c2c0e7b40c..83b05acfa4eb 100644
--- a/arch/arm/cpu/arm926ejs/mxs/Makefile
+++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
@@ -14,8 +14,8 @@ obj-y	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
 endif
 
 # Specify the target for use in elftosb call
-MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage.mx23.cfg
-MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage.mx28.cfg
+MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx23.cfg
+MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx28.cfg
 
 # Generate HAB-capable IVT
 #
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg
new file mode 100644
index 000000000000..ab2183ed3795
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg
@@ -0,0 +1,5 @@
+DISPLAYPROGRESS
+SECTION 0x0 BOOTABLE
+ TAG LAST
+ LOAD     0x1000     spl/u-boot-spl.bin
+ CALL     0x1000     0x0
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg
new file mode 100644
index 000000000000..0d95064ff7f1
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg
@@ -0,0 +1,6 @@
+DISPLAYPROGRESS
+SECTION 0x0 BOOTABLE
+ TAG LAST
+ LOAD     0x1000     spl/u-boot-spl.bin
+ LOAD IVT 0x8000     0x1000
+ CALL HAB 0x8000     0x0
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 0c3925640dc9..bc39465fc4e0 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -146,6 +146,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
 	}
 }
 
+#ifndef CONFIG_SPL_FRAMEWORK
 /* Support aparatus */
 inline void board_init_f(unsigned long bootflag)
 {
@@ -158,3 +159,4 @@ inline void board_init_r(gd_t *id, ulong dest_addr)
 	for (;;)
 		;
 }
+#endif
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index f07f81c8415c..0fe0770e13f0 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -44,8 +44,10 @@
 /* Startup hooks */
 
 /* SPL */
+#ifndef CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
 #define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
+#endif
 
 /* Memory sizes */
 #define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-- 
2.17.0

[U-Boot] [PATCH 1/5] ARM: mxs: make lowlevel_init() weak

[Stefano Babic]

On 21/04/2018 17:11, Mans Rullgard wrote:
> With the full SPL framework enabled, lowlevel_init() is required.
> Make the empty stub weak so boards can override it.
> 
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
>  arch/arm/cpu/arm926ejs/mxs/mxs.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
> index 7a68a8f3ca74..5c7817074fd6 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
> @@ -24,7 +24,7 @@
>  DECLARE_GLOBAL_DATA_PTR;
>  
>  /* Lowlevel init isn't used on i.MX28, so just have a dummy here */
> -void lowlevel_init(void) {}
> +__weak void lowlevel_init(void) {}
>  
>  void reset_cpu(ulong ignored) __attribute__((noreturn));
>  
> 
Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[Stefano Babic]

On 21/04/2018 17:11, Mans Rullgard wrote:
> The code attempts to preserve the value of LR by storing it in R12/IP
> across the lowevel_init() call.  However, this register is not saved
> by the callee.  Use a register that guaranteed to be preserved instead.
> 
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
>  arch/arm/cpu/arm926ejs/start.S | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
> index 959d1ed86d8a..a6f0bdb70345 100644
> --- a/arch/arm/cpu/arm926ejs/start.S
> +++ b/arch/arm/cpu/arm926ejs/start.S
> @@ -105,9 +105,9 @@ flush_dcache:
>  	/*
>  	 * Go setup Memory and board specific bits prior to relocation.
>  	 */
> -	mov	ip, lr		/* perserve link reg across call */
> +	mov	r4, lr		/* perserve link reg across call */
>  	bl	lowlevel_init	/* go setup pll,mux,memory */
> -	mov	lr, ip		/* restore link */
> +	mov	lr, r4		/* restore link */
>  #endif
>  	mov	pc, lr		/* back to my caller */
>  #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 3/5] ARM: spl: include arm/thumb glue sections

[Stefano Babic]

On 21/04/2018 17:11, Mans Rullgard wrote:
> When building in Thumb mode, the linker might generate mode switching
> stubs in .glue sections.  Include these in the final link.
> 
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
>  arch/arm/cpu/u-boot-spl.lds | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
> index 65f7b68861e2..38fc9b44c8c7 100644
> --- a/arch/arm/cpu/u-boot-spl.lds
> +++ b/arch/arm/cpu/u-boot-spl.lds
> @@ -21,6 +21,7 @@ SECTIONS
>  		*(.vectors)
>  		CPUDIR/start.o (.text*)
>  		*(.text*)
> +		*(.glue*)
>  	}
>  
>  	. = ALIGN(4);
> 
Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 4/5] ARM: mxs: move spl data

[Stefano Babic]

On 21/04/2018 17:11, Mans Rullgard wrote:
> With full SPL enabled, the loaded image overwrites the mxs_spl_data
> location.  Moving it a slightly lower address fixes this.
> 
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
>  arch/arm/cpu/arm926ejs/mxs/mxs.c          | 6 ++----
>  arch/arm/cpu/arm926ejs/mxs/spl_boot.c     | 3 +--
>  arch/arm/include/asm/arch-mxs/sys_proto.h | 2 ++
>  3 files changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
> index 5c7817074fd6..09b5c04cc9d2 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
> @@ -178,8 +178,7 @@ const char *get_imx_type(u32 imxtype)
>  int print_cpuinfo(void)
>  {
>  	u32 cpurev;
> -	struct mxs_spl_data *data = (struct mxs_spl_data *)
> -		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
> +	struct mxs_spl_data *data = MXS_SPL_DATA;
>  
>  	cpurev = get_cpu_rev();
>  	printf("CPU:   Freescale i.MX%s rev%d.%d at %d MHz\n",
> @@ -277,8 +276,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
>  
>  int mxs_dram_init(void)
>  {
> -	struct mxs_spl_data *data = (struct mxs_spl_data *)
> -		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
> +	struct mxs_spl_data *data = MXS_SPL_DATA;
>  
>  	if (data->mem_dram_size == 0) {
>  		printf("MXS:\n"
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> index d9d1d73d1af4..0c3925640dc9 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> @@ -120,8 +120,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
>  			 const iomux_cfg_t *iomux_setup,
>  			 const unsigned int iomux_size)
>  {
> -	struct mxs_spl_data *data = (struct mxs_spl_data *)
> -		((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
> +	struct mxs_spl_data *data = MXS_SPL_DATA;
>  	uint8_t bootmode = mxs_get_bootmode_index();
>  	gd = &gdata;
>  
> diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h
> index 609676375b55..b23ee6d88768 100644
> --- a/arch/arm/include/asm/arch-mxs/sys_proto.h
> +++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
> @@ -85,6 +85,8 @@ static const struct mxs_pair mxs_boot_modes[] = {
>  #define MXS_BM_SDMMC1_3V3		0x0a
>  #define MXS_BM_SDMMC1_1V8		0x1a
>  
> +#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_SYS_TEXT_BASE - 0x200))
> +
>  struct mxs_spl_data {
>  	uint8_t		boot_mode_idx;
>  	uint32_t	mem_dram_size;
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 5/5] ARM: mxs: support full SPL framework

[Stefano Babic]

On 21/04/2018 17:11, Mans Rullgard wrote:
> This allows using the full SPL framework on mxs devices.  In this
> mode, the u-boot.sb image loaded by the boot ROM contains only the
> SPL which then loads U-Boot proper or a kernel in falcon mode.
> 
> Signed-off-by: Mans Rullgard <mans@mansr.com>
> ---
>  arch/arm/Kconfig                                 | 2 +-
>  arch/arm/cpu/arm926ejs/mxs/Makefile              | 4 ++--
>  arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg | 5 +++++
>  arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg | 6 ++++++
>  arch/arm/cpu/arm926ejs/mxs/spl_boot.c            | 2 ++
>  include/configs/mxs.h                            | 2 ++
>  6 files changed, 18 insertions(+), 3 deletions(-)
>  create mode 100644 arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg
>  create mode 100644 arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 7212fc5afa72..0acdd162b4b3 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1352,7 +1352,7 @@ source "arch/arm/Kconfig.debug"
>  endmenu
>  
>  config SPL_LDSCRIPT
> -        default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if ARCH_MX23 || ARCH_MX28
> +        default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
>          default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
>  	default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
>  
> diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile
> index 71c2c0e7b40c..83b05acfa4eb 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/Makefile
> +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
> @@ -14,8 +14,8 @@ obj-y	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
>  endif
>  
>  # Specify the target for use in elftosb call
> -MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage.mx23.cfg
> -MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage.mx28.cfg
> +MKIMAGE_TARGET-$(CONFIG_MX23) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx23.cfg
> +MKIMAGE_TARGET-$(CONFIG_MX28) = mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx28.cfg
>  
>  # Generate HAB-capable IVT
>  #
> diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg
> new file mode 100644
> index 000000000000..ab2183ed3795
> --- /dev/null
> +++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg
> @@ -0,0 +1,5 @@
> +DISPLAYPROGRESS
> +SECTION 0x0 BOOTABLE
> + TAG LAST
> + LOAD     0x1000     spl/u-boot-spl.bin
> + CALL     0x1000     0x0
> diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg
> new file mode 100644
> index 000000000000..0d95064ff7f1
> --- /dev/null
> +++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg
> @@ -0,0 +1,6 @@
> +DISPLAYPROGRESS
> +SECTION 0x0 BOOTABLE
> + TAG LAST
> + LOAD     0x1000     spl/u-boot-spl.bin
> + LOAD IVT 0x8000     0x1000
> + CALL HAB 0x8000     0x0
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> index 0c3925640dc9..bc39465fc4e0 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
> @@ -146,6 +146,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
>  	}
>  }
>  
> +#ifndef CONFIG_SPL_FRAMEWORK
>  /* Support aparatus */
>  inline void board_init_f(unsigned long bootflag)
>  {
> @@ -158,3 +159,4 @@ inline void board_init_r(gd_t *id, ulong dest_addr)
>  	for (;;)
>  		;
>  }
> +#endif
> diff --git a/include/configs/mxs.h b/include/configs/mxs.h
> index f07f81c8415c..0fe0770e13f0 100644
> --- a/include/configs/mxs.h
> +++ b/include/configs/mxs.h
> @@ -44,8 +44,10 @@
>  /* Startup hooks */
>  
>  /* SPL */
> +#ifndef CONFIG_SPL_FRAMEWORK
>  #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
>  #define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
> +#endif
>  
>  /* Memory sizes */
>  #define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
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[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[Chris Packham]

Hi Mans, Stefano,

On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic <sbabic@denx.de> wrote:

> On 21/04/2018 17:11, Mans Rullgard wrote:
> > The code attempts to preserve the value of LR by storing it in R12/IP
> > across the lowevel_init() call.  However, this register is not saved
> > by the callee.  Use a register that guaranteed to be preserved instead.
> >
> > Signed-off-by: Mans Rullgard <mans@mansr.com>
> > ---
> >  arch/arm/cpu/arm926ejs/start.S | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S
> > index 959d1ed86d8a..a6f0bdb70345 100644
> > --- a/arch/arm/cpu/arm926ejs/start.S
> > +++ b/arch/arm/cpu/arm926ejs/start.S
> > @@ -105,9 +105,9 @@ flush_dcache:
> >       /*
> >        * Go setup Memory and board specific bits prior to relocation.
> >        */
> > -     mov     ip, lr          /* perserve link reg across call */
> > +     mov     r4, lr          /* perserve link reg across call */
> >       bl      lowlevel_init   /* go setup pll,mux,memory */
> > -     mov     lr, ip          /* restore link */
> > +     mov     lr, r4          /* restore link */
> >  #endif
> >       mov     pc, lr          /* back to my caller */
> >  #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
> >

> Applied to u-boot-imx, thanks !

I think this might be causing me a problem on a Marvell Kirkwood board I'm
working on getting into upstream. It may also be problematic for orion5x
boards. Both of these use r4 in lowlevel_init.

Obviously I can fix the board that I'm working on. Is there some
expectation as to which registers can be clobbered?

[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[klaus.goger at theobroma-systems.com]

> On 07.05.2018, at 10:25, Chris Packham <judge.packham@gmail.com> wrote:
> 
> Hi Mans, Stefano,
> 
> On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic <sbabic@denx.de> wrote:
> 
>> On 21/04/2018 17:11, Mans Rullgard wrote:
>>> The code attempts to preserve the value of LR by storing it in R12/IP
>>> across the lowevel_init() call.  However, this register is not saved
>>> by the callee.  Use a register that guaranteed to be preserved instead.
>>> 
>>> Signed-off-by: Mans Rullgard <mans@mansr.com>
>>> ---
>>> arch/arm/cpu/arm926ejs/start.S | 4 ++--
>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>> 
>>> diff --git a/arch/arm/cpu/arm926ejs/start.S
> b/arch/arm/cpu/arm926ejs/start.S
>>> index 959d1ed86d8a..a6f0bdb70345 100644
>>> --- a/arch/arm/cpu/arm926ejs/start.S
>>> +++ b/arch/arm/cpu/arm926ejs/start.S
>>> @@ -105,9 +105,9 @@ flush_dcache:
>>>      /*
>>>       * Go setup Memory and board specific bits prior to relocation.
>>>       */
>>> -     mov     ip, lr          /* perserve link reg across call */
>>> +     mov     r4, lr          /* perserve link reg across call */
>>>      bl      lowlevel_init   /* go setup pll,mux,memory */
>>> -     mov     lr, ip          /* restore link */
>>> +     mov     lr, r4          /* restore link */
>>> #endif
>>>      mov     pc, lr          /* back to my caller */
>>> #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
>>> 
> 
>> Applied to u-boot-imx, thanks !
> 
> I think this might be causing me a problem on a Marvell Kirkwood board I'm
> working on getting into upstream. It may also be problematic for orion5x
> boards. Both of these use r4 in lowlevel_init.
> 
> Obviously I can fix the board that I'm working on. Is there some
> expectation as to which registers can be clobbered?

The "Procedure Call Standard for the ARM® Architecture” may help:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042f/IHI0042F_aapcs.pdf
Page 15

   A subroutine must preserve the contents of the registers r4-r8, r10, r11 and
   SP (and r9 in PCS variants that designate r9 as v6).

So for thumb r1-r3 and r12 should be usable  without taking any care of them.
Maybe r13 depending if you already have a stack or not. 

Regards,
Klaus

[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[Måns Rullgård]

Chris Packham <judge.packham@gmail.com> writes:

> Hi Mans, Stefano,
>
> On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic <sbabic@denx.de> wrote:
>
>> On 21/04/2018 17:11, Mans Rullgard wrote:
>> > The code attempts to preserve the value of LR by storing it in R12/IP
>> > across the lowevel_init() call.  However, this register is not saved
>> > by the callee.  Use a register that guaranteed to be preserved instead.
>> >
>> > Signed-off-by: Mans Rullgard <mans@mansr.com>
>> > ---
>> >  arch/arm/cpu/arm926ejs/start.S | 4 ++--
>> >  1 file changed, 2 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/arch/arm/cpu/arm926ejs/start.S
> b/arch/arm/cpu/arm926ejs/start.S
>> > index 959d1ed86d8a..a6f0bdb70345 100644
>> > --- a/arch/arm/cpu/arm926ejs/start.S
>> > +++ b/arch/arm/cpu/arm926ejs/start.S
>> > @@ -105,9 +105,9 @@ flush_dcache:
>> >       /*
>> >        * Go setup Memory and board specific bits prior to relocation.
>> >        */
>> > -     mov     ip, lr          /* perserve link reg across call */
>> > +     mov     r4, lr          /* perserve link reg across call */
>> >       bl      lowlevel_init   /* go setup pll,mux,memory */
>> > -     mov     lr, ip          /* restore link */
>> > +     mov     lr, r4          /* restore link */
>> >  #endif
>> >       mov     pc, lr          /* back to my caller */
>> >  #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
>> >
>
>> Applied to u-boot-imx, thanks !
>
> I think this might be causing me a problem on a Marvell Kirkwood board I'm
> working on getting into upstream. It may also be problematic for orion5x
> boards. Both of these use r4 in lowlevel_init.

I've just sent an untested patch for orion5x.

-- 
Måns Rullgård

[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[Chris Packham]

On Mon, May 7, 2018 at 10:11 PM Måns Rullgård <mans@mansr.com> wrote:

> Chris Packham <judge.packham@gmail.com> writes:

> > Hi Mans, Stefano,
> >
> > On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic <sbabic@denx.de> wrote:
> >
> >> On 21/04/2018 17:11, Mans Rullgard wrote:
> >> > The code attempts to preserve the value of LR by storing it in R12/IP
> >> > across the lowevel_init() call.  However, this register is not saved
> >> > by the callee.  Use a register that guaranteed to be preserved
instead.
> >> >
> >> > Signed-off-by: Mans Rullgard <mans@mansr.com>
> >> > ---
> >> >  arch/arm/cpu/arm926ejs/start.S | 4 ++--
> >> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >> >
> >> > diff --git a/arch/arm/cpu/arm926ejs/start.S
> > b/arch/arm/cpu/arm926ejs/start.S
> >> > index 959d1ed86d8a..a6f0bdb70345 100644
> >> > --- a/arch/arm/cpu/arm926ejs/start.S
> >> > +++ b/arch/arm/cpu/arm926ejs/start.S
> >> > @@ -105,9 +105,9 @@ flush_dcache:
> >> >       /*
> >> >        * Go setup Memory and board specific bits prior to relocation.
> >> >        */
> >> > -     mov     ip, lr          /* perserve link reg across call */
> >> > +     mov     r4, lr          /* perserve link reg across call */
> >> >       bl      lowlevel_init   /* go setup pll,mux,memory */
> >> > -     mov     lr, ip          /* restore link */
> >> > +     mov     lr, r4          /* restore link */
> >> >  #endif
> >> >       mov     pc, lr          /* back to my caller */
> >> >  #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
> >> >
> >
> >> Applied to u-boot-imx, thanks !
> >
> > I think this might be causing me a problem on a Marvell Kirkwood board
I'm
> > working on getting into upstream. It may also be problematic for orion5x
> > boards. Both of these use r4 in lowlevel_init.

> I've just sent an untested patch for orion5x.


Thanks for that.

[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[Chris Packham]

Hi Klaus,

On Mon, May 7, 2018 at 8:48 PM <klaus.goger@theobroma-systems.com> wrote:



> > On 07.05.2018, at 10:25, Chris Packham <judge.packham@gmail.com> wrote:
> >
> > Hi Mans, Stefano,
> >
> > On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic <sbabic@denx.de> wrote:
> >
> >> On 21/04/2018 17:11, Mans Rullgard wrote:
> >>> The code attempts to preserve the value of LR by storing it in R12/IP
> >>> across the lowevel_init() call.  However, this register is not saved
> >>> by the callee.  Use a register that guaranteed to be preserved
instead.
> >>>
> >>> Signed-off-by: Mans Rullgard <mans@mansr.com>
> >>> ---
> >>> arch/arm/cpu/arm926ejs/start.S | 4 ++--
> >>> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/arch/arm/cpu/arm926ejs/start.S
> > b/arch/arm/cpu/arm926ejs/start.S
> >>> index 959d1ed86d8a..a6f0bdb70345 100644
> >>> --- a/arch/arm/cpu/arm926ejs/start.S
> >>> +++ b/arch/arm/cpu/arm926ejs/start.S
> >>> @@ -105,9 +105,9 @@ flush_dcache:
> >>>      /*
> >>>       * Go setup Memory and board specific bits prior to relocation.
> >>>       */
> >>> -     mov     ip, lr          /* perserve link reg across call */
> >>> +     mov     r4, lr          /* perserve link reg across call */
> >>>      bl      lowlevel_init   /* go setup pll,mux,memory */
> >>> -     mov     lr, ip          /* restore link */
> >>> +     mov     lr, r4          /* restore link */
> >>> #endif
> >>>      mov     pc, lr          /* back to my caller */
> >>> #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
> >>>
> >
> >> Applied to u-boot-imx, thanks !
> >
> > I think this might be causing me a problem on a Marvell Kirkwood board
I'm
> > working on getting into upstream. It may also be problematic for orion5x
> > boards. Both of these use r4 in lowlevel_init.
> >
> > Obviously I can fix the board that I'm working on. Is there some
> > expectation as to which registers can be clobbered?

> The "Procedure Call Standard for the ARM® Architecture” may help:

http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042f/IHI0042F_aapcs.pdf
> Page 15

>     A subroutine must preserve the contents of the registers r4-r8, r10,
r11 and
>     SP (and r9 in PCS variants that designate r9 as v6).

> So for thumb r1-r3 and r12 should be usable  without taking any care of
them.
> Maybe r13 depending if you already have a stack or not.

Thanks. I figured there was probably some document that described this. I
started looking at EABI docs but didn't find anything last night.