From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?iso-8859-1?Q?M=E5ns_Rullg=E5rd?= Date: Mon, 07 May 2018 11:11:35 +0100 Subject: [U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call In-Reply-To: (Chris Packham's message of "Mon, 07 May 2018 08:25:43 +0000") References: <20180421151110.20423-1-mans@mansr.com> <20180421151110.20423-2-mans@mansr.com> <76792a9b-0268-bb7f-908a-059ae5299372@denx.de> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de Chris Packham writes: > Hi Mans, Stefano, > > On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic wrote: > >> On 21/04/2018 17:11, Mans Rullgard wrote: >> > The code attempts to preserve the value of LR by storing it in R12/IP >> > across the lowevel_init() call. However, this register is not saved >> > by the callee. Use a register that guaranteed to be preserved instead. >> > >> > Signed-off-by: Mans Rullgard >> > --- >> > arch/arm/cpu/arm926ejs/start.S | 4 ++-- >> > 1 file changed, 2 insertions(+), 2 deletions(-) >> > >> > diff --git a/arch/arm/cpu/arm926ejs/start.S > b/arch/arm/cpu/arm926ejs/start.S >> > index 959d1ed86d8a..a6f0bdb70345 100644 >> > --- a/arch/arm/cpu/arm926ejs/start.S >> > +++ b/arch/arm/cpu/arm926ejs/start.S >> > @@ -105,9 +105,9 @@ flush_dcache: >> > /* >> > * Go setup Memory and board specific bits prior to relocation. >> > */ >> > - mov ip, lr /* perserve link reg across call */ >> > + mov r4, lr /* perserve link reg across call */ >> > bl lowlevel_init /* go setup pll,mux,memory */ >> > - mov lr, ip /* restore link */ >> > + mov lr, r4 /* restore link */ >> > #endif >> > mov pc, lr /* back to my caller */ >> > #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ >> > > >> Applied to u-boot-imx, thanks ! > > I think this might be causing me a problem on a Marvell Kirkwood board I'm > working on getting into upstream. It may also be problematic for orion5x > boards. Both of these use r4 in lowlevel_init. I've just sent an untested patch for orion5x. -- Måns Rullgård